Bitcoin Forum

So we can infer:
1. Final ASICs have been cut out from the wafer and will be tested.
2. PCBs will be assembled soon after.

It looks like December will be the month of ASICs and BFL will fall flat on shipping before anyone else.

For me sounds like
Order Processing Status
https://www.btcfpga.com/forum/index.php?topic=79.0
nothing more nothing less
Testing, debugging, bug fixing, bitstream develepmonet soon after......
ASIC's will be available next year - personal opinion

I'm pretty sure this is the case, as cablepair announced he had working ASIC prototypes at the end of September (https://bitcointalk.org/index.php?topic=113543.msg1228721#msg1228721).

But it seems everyone's forgotten about that after Inaba started running around the Custom Hardware board waving his penis in the air.

Don't act like you're not impressed!

http://canucksarmy.com/uploads/Image/anchorman.jpg

But srsly, check this out, it basically means nothing:

btcfpga and BFL both have a Dave doing PR? http://www.youtube.com/watch?v=N6wV7rAKMNE

IMO the whole race for fist production ASICs is at the finish line, we just have to wait a little more ;)

LOL @ bitstream development

Go bASIc go! Oh, wait, Go BFL, go! Lol! I'm not in the first batch so whatever. Good luck to everybody and let's see those ASICs mining.

What is so funny? Call it Firmware or whatever..but for sure some software development shall be done after the hardware production. Am i missing something here?

"develepmonet"  was pretty lol.

That's french aint it,  ??? It means making art,right  ::)

People probably forgot about it because it looks like nothing came of it. cablepair offered "raw" ASIC chips, which probably means they have not been coded to actually hash.


Topic is still listed as "Bounty Offered" from September. No posts by this user have referred to this again.


Referring to this topic, it's clear that payment processing and whatnot is all that is happening. Tom has not announced an actual timetable for completion and shipping, and as of a few days only said that things look like they "should be on time", meaning things are not finalized, and as with all things in life, are susceptible to unforeseen circumstances.

With that said, bAsic at least on paper sounds like it will be first out the door, time will tell.

Do you realise there is no such thing? ASICs must be "coded" before they can be produced. ASIC without the "code" is just a plain piece of silicon. Do you think that's what they offered? :D

Potentially, perhaps that is why no such deal was made? But I see your point, and retract that portion. I still foresee that it was a vapor-offer, as to why it was never finalized.

Having our orders Ready To Ship will save a lot of time for the ship team.  If we had waited until product was in the shop, sorting out all the orders, payments, free & paid upgrades, shipping upgrades and special customer requests would have brought our process to a standstill.  Mine and Tom's intention was to get everything staged as far as possible so we don't fall down at the goal line.
We'll have boxes & bubble wrap, shipping labels and everything ready so the units could literally be packaged while still warm.

Getting these bASICs out to customers on time will require a lot more than just having the product in hand...

Got an email about the status of my order. You guys are doing a great job of communicating dave. Keep up the good work.

How tempted are you to pop the bubbles in the bubble wrap?

Haha, good one!

Cuz bitstreams make no sense in asics.

Unless you are talking about a FPGA prototype and a fpga conversion asic, which oh btw I have been telling people all along.

I hope you guys are prestaging a lot of other things too, like the stations that are going to be used to load the firmware and test the devices.  Be sure you have lots of USB cables, power cables, power supplies, power strips, etc on hand, with spares, and test the cables and power supplies and PCs etc beforehand.

If I knew I could get one I'd have that cash fall out of my pocket so fast...

There might be a possibility.  I don't know where they are on 2nd batch pre-orders but they might have a surplus in the first run.  Also, some people are offering their first runs with a premium on the BTCFPGA forums.  You might be able to pick one up there.

So, let me get this straight. BFL is constantly harassed over every little detail. Meanwhile, on the other side of the aisle, bASIC fans are currently in a whirlwind of excitement simply because Tom didn't screw up some standard clerical work with his invoices?

This is due to the fact that Tom doesn't lie every time he says something, unlike the reps on the other side of the aisle.

...or do you consider the difference in ROI for BFL pre-order customers hashing in October against a 25m difficulty and 50BTC blocks and hashing in December against 40m difficulty and 25BTC blocks to be a "little detail"?

I dunno about a whirlwind of excitement. I think the emails were poorly worded and it's been misinterpreted, but the communication attempt and preparations for shipping are appreciated(at least by me).

I continually have to repeat that anyone expecting a device from BFL in October didn't do their research on the subject, and therefore their opinion doesn't matter anyway.

IOW...you think they were naive to believe what BFL reps said without researching BFL and identifying their history of lying?

Well, I was going to say their history of delays, but you're free to phrase it your own way.

If anyone wants to sell their first batch order bASIC, PM me.

Yeah they couldn't even get close with their shipping date on FPGAs. They were off by a factor of 4 on power consumption of their FPGA products. They assured everyone multiple times that their ASIC products would be treated differently. They assured everyone that October was REALLY the shipping date for their ASIC products. Every time they move the shipping date it's for realz this time! ...oh yeah and every single product in the BFL SC product line uses precisely 1w to produce one GH. ::)

They've benefited from each and every one of these delays and miscalculations. They're not stupid...they're dishonest.

Problem?  ;D


How do you mean?

I mean they're the market leader in ASIC pre-orders by a wide margin because they said they'd ship in October. Obviously this didn't happen.

After announcing a shipping delay they always have another date prepared that's only a few weeks out. These don't pan out either, but if you stack them all on top of each other and just admit that you won't be shipping till two months after you initially said you'd ship then you get a deluge of cancellations. Again, I simply cannot believe that they're this dumb or out of touch with their own production schedule. The only other alternative to my mind is that they're lying.

Or [Speculation]

That the COO (Chief Operations Officer) does not honestly  ;D know if there will be a delay of several weeks (months) until just 3 days before announcing it publicly... and of course, after having a meeting with the rest of the staff.

It's like a NASA meeting, they check with each department head first at a meeting to make sure they will be late before they then announce it. The shipping department looks at the COO and CEO and...stands up, pulls their pockets inside out, then in a grim monotone voice says the "no-go" signal and then the COO and CEO just suddenly realize they have to scrub the mission and postpone it for a few months.

http://galaxywire.net/wp-content/uploads/2009/08/sts-128-weather-scrub.jpg
http://www.guy-sports.com/fun_pictures/turkey_glitter.jpg
http://galaxywire.net/wp-content/uploads/2009/08/sts-128-scrub2.jpg

I am joking though...

I worked with a programmer like that once. Deadline would be on Friday. As the week progressed, he'd be all "yeah, I'll be done on Friday". Then on Friday, "oh, sorry, not done. It's going to take 4-6 more weeks". Let's just say he wasn't very skilled.

Yeah, I once worked at a big union plant.  Guys would screw around all week, knowing they wouldn't hit the numbers they would need and then they'd need to work the weekend (at double and triple time) to hit their numbers and the managers/foreman couldn't do a damn thing about it because the Union would jump all over them if they did.

Stupid Twinkie/Hoho Killing Unions...

Aren't you guys trying to derail the BTCFPGA's thread with all this stuff about BFL?

Every thread in 'mining' is suffering from this garbage.

Sure be nice when all the ASIC's ship and we can actually get back to discussing mining as opposed to rehashing the same sniping arguments over and over again.  Most likely after a month of "Neener Neener, mine shipped first", and "Haha, you suck, we told you so!" slew of posts,

I got them Ready To Ship emails too....Let's hope I get my 8 bASICs before christmas.

Awww,another BFL derailment............imagine that  ::)

https://www.btcfpga.com/forum/index.php?topic=104.msg817#msg817

Quoted this post from the btcfpga.com forums over to here, posted below. Hope this is OK to do here. From BuzzDave

"Thanks Tom, for taking time out on Thanksgiving to review my new post! I've been chewing through my leash wanting to release this info to you guys!

bASIC History
Development of the ASIC based mining hardware began almost 9 months ago, when Tom started hunting around for a Brute Force SHA256 core that could be used in an ASIC package.  Once the core was sourced, Tom tapped the open source elite from the Bitcoin community to help with changes necessary to make the core work for Bitcoin mining from a hardware, firmware and software perspective.

Was there a prototype?
Yes. The prototype consisted of two ASICs with our custom SHA256 hashing cores on a development board.  The IP core company said that each chip could do about 14GH/s each, which they did.  Until they didn't.  It was clear that these chips
were fast, but they needed to be run at a safer clock for longevity.


Where are we in the process?
With the MCU, ASICs and power supply circuitry figured out, the engineers are designing schematics for the routing and interconnect of all the components.  These guys are industry professionals and won't be rushed or cut corners.  This is where we have to wait patiently and not bother them.

Once the design, parts layout and routing work is locked down and tested, we will finalize the build - it will then take  approximately 8 days to produce the finished PCB and begin production.

Are you guys tracking on delivery targets?
Admittedly, its going to be tight - we lost a couple precious days to the Thanksgiving Holiday.  Tom expects to learn a lot more on Tuesday regarding schedule.

What about firmware and mining software?
We specifically chose this particular MCU because our firmware developer has already created the core infrastructure for it.  It will be fairly quick and easy to complete the firmware - we have full confidence in TheSeven and Luke-JR that they will be able to complete the firmware and make BFGMiner bASIC compatible in a timely fashion once the hardware hits the wild.

Where is the design at now?
The design of the smaller bASIC unit grew from 2 ASICs per board to 6 in a cluster, each ASIC producing 4.5GH/s (safely) for a total of 27 GH/s.  As you probably know, digital computers/microprocessors operate using the binary (base-2) number  system.  This somewhat naturally leads to architectures that most efficiently have their components (such as I/O signals, communications paths, memories, etc.) in quantities of powers of two - 2, 4, 8, 16, and so on.

***Important - please read closely***
It is for this reason that we are going to grow our hashing cluster to 8 ASICs.  With two clusters on the larger unit, it will conservatively produce 72GH/s.  Yes, this is very good news - a 33% increase in hashing power!  Yes, this means the 27G unit now becomes a 36G unit.  These initial numbers are conservative estimates, but we expect that firmware and software updates will be able to iteratively increase hashing power as well.


Other specs/stats:
The expected power consumption remains roughly as anticipated at 80 - 120 watts per unit.  Actual measured power consumption will be released as soon as possible.

For each hashing cluster, a high-performance heatsink will be used, with a high quality cooling fan, similar to the ones used on the MMQ. Specifics of the heatsink and fans will come next week.

Power plugs - same as always.  There will be a DC barrel plug suitable for a wall wart power supply, and a 4-pin Molex like the MMQ has.

USB - a single mini-USB plug will provide interface to the controller PC running Win7 or Linux.

MCU is based on the high-performance ARM®Cortex™-M3 32-bit RISC core operating at a frequency of up to 120 MHz.

Board dimensions are subject to change, due to the change in chip count - with the larger clusters, the engineers may have to make room for the extra chips.  4" x 9" is the current design size.

Look for more announcements on this forum - we have more surprises up our sleeves!"

Ok, so, one week to finish board layout, another week to produce boards, another week to assemble everything, another week till the things arrive to the users. 4 weeks. We will see them last week of December.

And if something goes wrong?  8)

I understood they have those ASICs chips already, but they are forced to underclock them to last longer, and so to change the board (and power circuit). There is nothing extraordinary in what is left, in theory we should not see them delaying more than a month, imo.
However, since their devices will now do more hashing than BFL, I wonder how will BFL react. Will they change too boards, overclock their ASICs (and risk to run into problems)? Or maybe they will just instruct users how to overclock them.

But what if they purposely "delay" things to "test" them more?

not this again....
They could, but it's a trade off: They'd sacrifice reputation vs. short term profits.

Holy crap! I'm pumped!

Suckers