Bitcoin Forum

I confess my ignorance about hardware up front, but I ran across this article and thought it looked like a faster way to get to custom ASICs from current FPGAs designs. 

Apparently you can do your entire development on an FPGA rig and then burn the design into the ARM chip.  They claim this slashes the cost of custom ASIC development, but yields ASIC like speed and power consumption.

I was hoping some one familiar with this technology could comment on whether or not it really could be applied to the problem of bitcoin mining if you burned the programmable part of the chip to just do hashing.

http://www.arm.com/files/pdf/WPFablesssSemi.pdf (http://www.arm.com/files/pdf/WPFablesssSemi.pdf)

Some quotes from the pdf:

"Fabless semiconductor companies are often
stuck between a rock and a hard place when it
comes to implementing new designs. FPGAs
with embedded soft core or external microcontroller
are not an option for fabless IC companies because the
company's "secret sauce" is vulnerable to theft and cloning
when implemented in an FPGA. In addition FPGAs have poor
performance and power characteristics. FPGAs typically
consume 44-times more power and operate at about 1/8 the
speed of an integrated SoC."

"A fourth option is a customizable microcontroller, based on
Atmel's second generation metal programmable cell fabric
(MPCF-II) technology that requires only a nominal NRE charge
of just $75k with low units costs of $5 to $10. Announced in
2007, the original MPCF technology achieved silicon efficiency
comparable to that of cell-based ASICs (between 170K and
210K gates/mm2 in 130 nm technology), which allowed low
unit costs. An MPCF cell implementing a D flip-flop (DFF)
versus a standard cell DFF both in a 130 nm process consumes
nearly the identical area."

"Second generation metal-programmable cell
fabric (MPCF-II) technology offers fabless IC vendors a cost
effective means of developing custom ARM processor-based
SoC, with nominal NRE charges, unit costs and performance
comparable to fullcustom ASICs, and no license fees."

These seem to be a variant of a cell based asic, just with an integrated uC. Might be worth a look if the Controller could be utilized to run the mining software for a standalone unit. But the uC would have to have enough resources to implement the bitcoin protocol ontop of tcp/ip and ethernet. So there would be additional peripherals needed.

But that said, 75k USD is still quite a chunk of money, and a dedicated mining appliance would only need one Controller and many Cell Asics, so you would waste alot of resources. The price per unit is still to high imo. (that depends on the space available or the hashes per second one unit can archive)

If that is though of a competing product against fpgas probably not as much. The fpgas people use for bitcoin are monsters, relative to the chips normally used. The Spartan-6 LX150 is the biggest low cost unit there is and only really, really expensive chips (~1000 USD) like high end Virtex-5 and 6 are bigger.

this might be the tech ArtFortz used early 2011, he talked about "metal ASICs" at one point, if I remember correctly.

Did he really order them? Guess we will find out at some point...  ::)

I think you're right that an entire cell based ASIC (with out he system-on-a-chip stuff) would work better.  The point of the cell based ASIC seems to be that you can avoid much of the upfront engineering by combining pre-engineered 'cells'.   It seems likely that some manufacturer already has a pre-designed SHA256 cell,  and so the engineering would be primarily how to organize arrays of SHA256 cells and to do any of the necessary input, output and comparison steps.  For someone experienced in working with cell based ASICs I would imagine this would not be any more difficult than programming an FPGA.

Although $75K is certainly a non-trivial amount, if your total upfront was $100K and you sold 200 chips, that would only be $500 per chip and well within what people are paying now for graphics cards.

I guess my thought is just that people talk about building an ASIC as if it's some mythically difficult and expensive process - but that does not seem to be true when you use a cell based ASIC process versus a totally custom design.

I could not find the the thread where ArtFortz discussed "metal ASICs", but he does seem like someone with the algorithmic knowledge necessary.  The question is whether or not he has experience with cell based ASIC design. 

It appears the business case would be easy to make unless the upfront engineering and layout was dramatically more than $100K and/or the performance was not the 44x less on power and 8x faster on speed mentioned when moving from FPGA to ASIC.

Well if those produce 150mW of power and produce 1.5GH/s it certainly would be worth it. (Compared to a spartan 6 lx150)

But the question is what kind of fpgas they are referring to, common fpgas used in high volume products normally have one or two magnitudes less logic elements than what we are using. In that case you would need many of those chips to reach decent hashing power.
That depends again on the packaging, putting a dozen QFP packages on a board wouldn't be a problem but if those are only available as BGAs it starts to get messy. (More pins == more failure rate)