Bitcoin Forum

There's a cool ground of people over in europe that make it pretty affordable to do prototype and short-run ASIC chips, in a bunch of different technologies too!

http://www.europractice-ic.com/prototyping.php
http://www.europractice-ic.com/access.php

For about 1100 EUR/year we can get access to the appropriate design tools and simulators. We already have core logic available to us in Verilog format. This would in theory allow us to (slowly) go from Verilog to a chip design....

Anybody wanna pool up for it? ;)

As far as I understand, the front-end design software is not included, only PUBLICLY FUNDED research organizations are eligible to obtain it for a low annual fee.

In other words, any Tom, Dick and Harry may participate in a multi-project wafer run, but only publicly funded research organizations pay a mere 1100 Euros per year for the Synopsys Design Compiler instead of about 100 times as much (or so the rumor goes).

Hmmm, nutz.

Looks like there's a few other places that offer MPW and prototyping stuff:

http://www.asicsystems.com/low-cost-ic-prototypes.htm
http://www.mosis.com

I'll have to actually try to get a quote, but i bet its more expensive =\ At lease there might not be an annual fee..

There is already something like a open source  VLSI flow http://opencircuitdesign.com/ but it's a little confusing when i comes to the cell libraries, there is a statment that the open source libraries are just for benchmarking and may require extra effort to make usable chips from them.

There were also a gate array system 'Occean' from a dutch university, but i am not aware  if these  still in use today.

At one of the universities here in the city they do submit their designs to Europractice for their ASIC design program.

Keep us posted. If there's enough interest, I'd be interested too.

There already is the magic suite, a collection of vlsi design tools, available as FOSS.
http://opencircuitdesign.com/magic/

If people were to team up having enough volume to pay for a set of masks should be possible.

I didn't see any pricing on there for the chips (just for the design kit).  Did you submit a quote request?  What technology generation (90nm, 45nm, etc) and reticle size?


You're quite right.  On the other hand, there are still a few people around who know how to do full-custom VLSI.  For something as regular and repetitive as SHA-256 it is possible (though certainly not easy!)

Upon someone's suggestion, I have been looking into eASIC. I have a buddy who is a professional ASIC designer, and he says that eASIC has an excellent reputation. On April 28th, less than a week from today, they will officially release their 28 nm design flow (on the 28th, geddit?). That said, right now I don't have the money for such a venture. A year from now - different story.

So what kind of cash is involved in that type of idea?

Including a one-year subscription to the Synopsys DC, probably between mid 100s and low 200s...
Just guessing.
I don't want to swing by eASIC right now and say "I'll have the money in a year", because the typical answer to that is "come back in a year".

eldentyrell said something in another thread about his improved FPGA design being potentially portable to some type of ASIC process, maybe it would be worth working out the costs of going that route and see if it can be crowdfunded, with the aim of producing huge huge numbers of small checp consumer-applicance mining-appliances? Also selling the chips in large numbers to people who want to make larger applicance involviong several chips?

-MarkM-

Definitely and in the long there should be whole fabs owned by bitcoin capital. This seems utopic now but if you consider that about every university has the capabilities to produce their own masks and etch their own layers that isn't that far away.
It hasn't have to be a cutting edge process like 22nm-45nm. In comparison a full custom chip would still blow away the competition with 180nm or something.

I also think that we shouldn't buy software to accomplish this goal, not because the costs but because openness and to stay in tune with the FOSS spirit.

Well I was assuming that even if we did pay for software we'd be releasing it as open source, at least once the massive bulk production run of chips has been done.

-MarkM-

Hrm, even the top universities that make their own masks are only doing it for truly, truly ancient process techs like 350nm -- and it's done by the people researching lithography and MEMS, not the people researching chip design.  I haven't heard of any university fabbing a mask themselves that was for an actual microprocessor in the last decade.

The research groups that do chip and circuit design sometimes have deals with the commercial fabs and maskmakers.  But these are really icky agreements if you look at them up close (which you can't since they're kept secret).  It's usually an unspoken "you send us smart grad students as summer interns and we'll make masks for you at a loss" sort of deal.  The companies are certainly losing money on it; they do it because they're getting some sort of other benefit.