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"They use a LAN router board, with modified firmware" Why do you think they are doing this why not just run (ASIC's x lots > FPGA/multiplexer > FTDI) to Host
Why? Because it's in the photos and described on the web site that way. I didn't just make it up. Look at the Avalon photos - see that little board hanging down between modules and the case. See the info on TP-Link router in section "User Guide", and "TP-LINK TL-WR703N". All on this page, https://en.bitcoin.it/wiki/Avalon#Chip_SpecificationIf you want to bypass the router then I'm sure you can take it out and attach direct to controller from a PC and run cgminer on the PC. That should work but the TP-Link lets it act as a standalone unit without PC. Sorry, I'm a dumb ass I've been sifting through swags of stuff and didn't notice. Your right it is a good idea and cheap. |
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I looked at a few things PCI-e too hard, and a few other ideas.
Why was PCIe too hard? The electronic side or physical side? Yes PCI-e under the conditions looks like a pain in the arse and then again you have to have a big box turned on, i thought that it would be neat to run a cluster off usb with external supply Ok in short you got to find a screw driver, pull a box apart, oh shit goes on... USB just plug it in 5 10 whatever, I kinda think the polling on usb makes sense too, i got some stuff my head but not all, shoot me down if I'm wrong i don't mind also think best not to redesign if Avalon is usb just do what they do, drivers etc etc.... What are they using not ethernet...? USB They use a LAN router board, with modified firmware, to provide a USB host, then have a simple FTDI serial-USB chip interface to an FPGA to interface serial to each 10 chip sub-unit. Presumably the FPGA is just a data selector/router for the 8 sub units. This, from just looking at photos. The router board has the cgminer software in it's firmware. It talks serial via USB to the modules. The cgminer driver for this is already on github for the Avalon. I had a look at it and saw the data format it sends out is simply a long stream ready to shift into each chip for each work unit. "They use a LAN router board, with modified firmware" Why do you think they are doing this why not just run (ASIC's x lots > FPGA/multiplexer > FTDI) to Host |
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I looked at a few things PCI-e too hard, and a few other ideas.
Why was PCIe too hard? The electronic side or physical side? Yes PCI-e under the conditions looks like a pain in the arse and then again you have to have a big box turned on, i thought that it would be neat to run a cluster off usb with external supply Ok in short you got to find a screw driver, pull a box apart, oh shit goes on... USB just plug it in 5 10 whatever, I kinda think the polling on usb makes sense too, i got some stuff my head but not all, shoot me down if I'm wrong i don't mind also think best not to redesign if Avalon is usb just do what they do, drivers etc etc.... What are they using not ethernet...? USB |
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Justing thinking out aloud, I've joined the nutty crowd designing shit without a data! what next all global currency inflates by 1000%
- USB external powered maybe a PC power supply 5volts (cheap)
- Microchip Technology micro support devices they handle PLL issues nice
- 80 devices asics
- Passive cooling (12 volt fans are cheap plug into same PC supply)
- Simple printed ABS plastic vertical PCB holder that stack 5
I just wonder what is going to be in the Avalon Doc's a PCB design, does anyone know what electronic CAD they use already?
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That's 80 right?
I looked at a few things PCI-e too hard, and a few other ideas.
- USB, external supply off the shelve
- 80 chips?
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Ok thanks so if the Avalon ASIC's 280 Mhs per chip how many do we want per PCB?
Or what the target output per PCB?
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Why not just set up a shopping cart with bitcoin payment and then build the database of where chips have to go, sorry did i miss somthing?
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Just another question about Avalon ASIC's i can't find the info any more but i read somewhere that they were going to sell the chips mounted
on PCB's because they figured that surface mount chips would be to hard for a DIY job. Can some clear this up?
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I didn't notice that nice find, a good scammer would have a board made.
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If this tread idea works it should standardise on on E-CAD or electronic CAD i would recommend using http://www.cadsoftusa.com/ - Supports many platforms - Fantastic library support - Ties in with component suppliers - Free or very cheap - Is an industry standard for open source type work - Easy to use Also people could get pcb's made anywhere I have Cadence and Altium but for this group kinda work Eagle cad is the best. And if any one could tell me where i can order a hand full of Avalon ASIC's that would be great. Eagle What's the limit on free board size? I recall 3"x4" but maybe it's 4"x6"? I've used this before but not for a while. It's pretty much standard for low budget open source projects due to being free and easily available by anyone. I'm sure experienced designers would want to use Altium but for most people that means a pirated version. edit: Just looked at their site again. Seems they have no free version now. ?? Even the hobbyist version is $169, limited to 4"x6". Well, I guess when I used it before it was pirated but I thought they had a free release too. Scratch that. Found it here, http://www.cadsoftusa.com/download-eagle/freeware/Limited to 10cm x 8cm and one sheet. And if any one could tell me where i can order a hand full of Avalon ASIC's that would be great.
They're available (to order, not ship) right now in this forum. Pay first, get in 9-10 weeks. I ordered 20 to play around with but others are ordering 500+. https://bitcointalk.org/index.php?topic=177827.0(Limitations: 99 schematic sheets, 6 signal layers, 160x100mm routing area) $69 or (Limitations: 99 schematic sheets, 6 signal layers, 160x100mm routing area)$820 That should be enough area, it used to be free! Will need more than 2 layer PCB... |
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I been hunting thought the forum for information as to how to go about trying to design hardware. I worked for Cadence Design Systems, and need a bit of a push in the right direction trying to get my head around how the hardware ties together. Are there any block diagrams? I've been looking into FPGA and ASIC's and decided that any good GPU is going to keep up with the latest FPGA's less power consumption. So ASIC cost is the problem and then IP core is there any Verilog/VHDL around to look at? And what about running OpenCL http://www.solarflare.com/Content/userfiles/documents/Altera-AOE-Acceleration-and-OpenCL.pdfon a an Altera? has anyone tried this, it looks great maybe price performance is crap. There are heaps of IP cores around and if Avalon give spec's on here device this will not be need......right? http://www.chipestimate.com/ lots of sha 256 ip cores here, We have Altuim designer, a SHA 256 core, Cadence InCyte, a soldering iron....... Needed a block diagram.... Please help me to shut all the bad ideas down in my head! Look at Icarus wiki/git to get an idea how bitcoin mining is done in fpga. Start with bitcoin wiki, understand how block header is structured, how to get "getwork()", what needs to be done to find the correct nonce. Basically, your fpga/asic board has to find a nonce for a given 64 bytes (32 bytes of midstate+20 bytes of fill+12 bytes of block header from getwork() request). You cannot just use off the shelf sha256 IP core, you have to modify it/have your own so that your board "looks" for the right nonce by scanning/hashing all 32 bit range or part of it, if you decide to distribute the search ranges to more than one chip. The objective is to test one nonce per clock cycle. Once the nonce is found, host is notified. You don't have to have any elaborate host/board protocol. Use Icarus as an example. It works. Unless you want temperature control or some other control features, cancelling work, restarting with different nonce ranges etc. If you just hash one sha 256 round per trip to the board, your host/board interaction would be extremely slow, and the overall bitcoin mining hash rate would be much slower than any GPU/CPU rates. BTW, put away that soldering iron, most likely you'll not need it. Thanks for that, best tip I've had since i joined. Found trying to run Verilog on OSX pain in the arse until i found the Eclipse marketplace plugin. |
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If this tread idea works it should standardise on on E-CAD or electronic CAD i would recommend using http://www.cadsoftusa.com/ - Supports many platforms - Fantastic library support - Ties in with component suppliers - Free or very cheap - Is an industry standard for open source type work - Easy to use Also people could get pcb's made anywhere I have Cadence and Altium but for this group kinda work Eagle cad is the best. And if any one could tell me where i can order a hand full of Avalon ASIC's that would be great. |
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I don't understand how you can come up with this without a data sheet from Avalon.
I don't want to be a bitch but a BOM how? and what go are you going to put in the PIC32MX210F016B-I/SP
I'm a Microchip design partner (C900-1156) how can anything go forward without the Avalon ASIC data sheet?
Do you have one, i happy to help out.
MC
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PCB Designer here to help....
contractor specifications
Electronics Engineer, consumer electronics
Registered Microchip Design Partner
Uses the following software tools and process
Alitum
Designer for PCB and electronics, Circuit maker for small jobs
has registered commercial licenses
Microchip
MPLAB-X, ASM, Picbasic Pro
Apple
Basic coding in Objective C for Xcode IOS and digital signing for the Apple store
Is a registered Apple developer.
Android
Eclipse Android SDK basic coding for Java and digital signing for Google Play
HANDS ON SKILLS COMPENTENCIES SUMMARY
Electronics
Very good product prototyping and soldering skills, SMD rework etc.
Schematic Entry, Printed Circuit Board Design using Altium
Basic code and testing; Xcode, IOS, Eclipse, Android SDK, Microchip MPLABX
Use of Analog & Digital simulation for design verification
Electronic product prototyping; understanding, reading and building from schematics
Design of analog and digital circuits, sourcing data and documentation
Technical sales, complex demonstration and presentation skills
Design of GPS based tracking hardware, BMS systems, Consumer
electronics,eg.Knog
Extensive experience in technical software sales for Electronics Engineering & M-Cad
Former Cadence Design Systems applications engineer
MC
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Not sure if their is any point if this is real. From Avalon. http://store.avalon-asics.com/?product=avalon-asic-chips-10000"Product Description the only payment accepted is Bitcoin. the chips being sold are packaged and tested. the lead time on the chips is 9 to 10 weeks. made to order from TSMC foundry and then packaged and shipped. the minimum order quantity is 10,000 chips and the maximum order quantity is 200,000. the chips are identical to those in Avalon, clocking 282Mh/s per chip. the password is I understand and agree. communication protocol, reference board design provided in early May. everything will be open source from FPGA to PCB design. we do not offer technical support of any kind, this is final. if you do not know what to do with the packaged chips, please do not purchase."" But i can't believe they are taking orders without a data sheet? Is it just me am i mad? MC |
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yep is available now, yifu has open up the order -- need about 780BTC equivalent to $50k
Avalon ASIC Chips 10,000
฿780.00
READ FIRST!
In stock
Correct In STOCK http://store.avalon-asics.com/?product=avalon-asic-chips-10000But this is a crazy place where you order chips from a company that has 10 week lead time and no reference design or data sheet! I think Avalon might need to move into the real world and start shipping to existing customers first right? MC |
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Do you have too register somewhere to get on a list?
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What a great cross section of telent this project has from simple mining people to Verilog and ASIC's this would be that most advanced banking transaction systems in the world,
what bank develops ASICS... Love it. And if this version fails it's open source and NEVER dies.... Thanks everyone...
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Oh stupid me thats where it is..
Thanks
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