thank you Kano!
I got the U formula.
What about if pool is not 1 diff shares let us say it is dynamic? If it is static let us say 2 diff shares all is easy - 2^33 right? Best
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kano,
It may sound stupid but i am little bit confused of values i see. As you noted with new bitstream and timing 2:70 Mhs reporting will not be correct. To make things easy, assuming that cgminer shows correct values for my gpu as follows:
MHS av MHS 3s Accepted Hardware Errors Utility 391.03 391.16 6,129 0 5.55/m
For my best lancelot board values are as follows: MHS av MHS 3s Accepted Hardware Errors Utility 506.35 662.20 6,651 131 6.02
What about calculating Lancelot performance in following way Lancelot Utility/GPU Utility*GPU MHS av 6.02/5.55*391.03 = 424 Mhs
What about HW errors - are they taken into account when calculating utility. In my case for Lancelot they are 1.97% (131/6,651*100). Shall i do something like: 424/100*98.03=415.64
Thanks
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http://i.minus.com/iOoHctgIXSDTB.JPG - picture from first post (courtesy of ngzhang). At the edge of the board you can see 4 holes (right side, white squares around it) labeled GND, V.CORE1, V.CORE2, V.AUX. Those are test points for this voltages. V.AUX is 3,3V for IO. Thanks! I got it...
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ngzhang mentioned that this resistor should be somwhere around 9k. R=(R1*R2)/(R1+R2)=(10*100)/(10+100)=1000/110=9.09k. 100k in parallel should be perfect. When board is placed in front of you as is on rgzen pictures, 4 holes for measure voltage are placed on the right edge of the board. They are visible on bottom picture, near 270uF capacitor and coil.
Hey, thank you for the update! It seems that you know hardware stuff better than me (i am not expert at all). From what i have seen in pdf (core_power) schematic (i might be wrong of course) we have to measure a voltage VCCINT1V2_A and VCCINT1V2_B. Is that true? If it is, are the wholes you are referring to equal to "VCCINT1V2_A and VCCINT1V2_B". If yes, would it be very hard for you just to mark them on the picture, because it is very hard for me to find them out:) Once again excuse me but as i said i am not an expert at all:)
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ok! then what resistor can we solder in parallel with the current one in order to get 1.24v-1.28v? and what are the pins where we measure the VCC voltage?
http://www.1728.org/resistrs.htmCalculation showed about 90-100K +1 for the question where to measure VCC out core voltage
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That is why i plan to bump voltage on mines little bit more using potentiometer (Zetex voltmod probably i will get 500K in parallel) I will do it this weekend and will share the results - i plan to bumop it around 1.28-1.29 < 1.30 just to be on a safe side as nghzang suggested:)
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5.63 seems like no improvment? What about utility before changing the res? Have you measured that?
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I have U: 6.6/m after 25 minutes, v1 with resistors changed.
Pls let us know what will happen with U 24 hours later. Have you measured Core voltage before/after changing resistors?
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I just wanna share my result so far... All Lancelot's are v1 lower core voltage
ICA 0: | 758.9M/858.7Mh/s | A:2699 R:0 HW:71 U: 5.62/m ICA 1: | 870.0M/888.8Mh/s | A:2822 R:1 HW:49 U: 5.87/m ICA 2: | 884.2M/889.8Mh/s | A:2780 R:2 HW:26 U: 5.78/m ICA 3: | 880.9M/874.2Mh/s | A:2757 R:0 HW:54 U: 5.74/m ICA 4: | 865.6M/880.2Mh/s | A:2724 R:2 HW:52 U: 5.67/m ICA 5: | 857.9M/876.1Mh/s | A:2748 R:0 HW:35 U: 5.72/m ICA 6: | 873.7M/865.3Mh/s | A:2777 R:0 HW:56 U: 5.78/m ICA 7: | 857.5M/867.4Mh/s | A:2735 R:0 HW:34 U: 5.69/m ICA 8: | 866.8M/866.5Mh/s | A:2790 R:0 HW:54 U: 5.80/m ICA 9: | 708.7M/861.4Mh/s | A:2698 R:0 HW:43 U: 5.61/m ICA 10: | 880.1M/874.1Mh/s | A:2736 R:0 HW:70 U: 5.69/m
Average utilization with stock v3 bitstream was about 5.2 - 5.3 which is about 10% improvement My next step will be to bump up core voltage to 1.26 as suggested and i will share results.. Nghzang, Can we bump input voltage a little bit more? Is it safe to stay below 1.3 V as you suggested. Probably 1.295 IDLE will be even better instead of 1.24?
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nghzang (or someone else), i am not good with hardware at all. is it possible just to take a shot of lancelot an mark where two resistors are. otherwise i have a friend to do soldering for me but pcb schematics are beyond our knowledge
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Super! ------------------------ add some core voltage will help, default Lancelot core voltage is 1.16V, you can change it to 1.26V by change R56 and R47 to 9.1K. certainly, there are risks and more heat. ------------------------ Can you give us some info what additional boost are you getting when changing the resistors. Heat and power are no issue since winter is comming:) I just want to know the numbers to make my decision. For instance difference in performance "%" between your best board with 42 bitstream stock resistors compared to same board with R56 and R47 to 9.1K?
10X
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That sounds great!
Ngzhang you are the one to be trusted!
Thank you very much!!!
I will test it in the evening. Just a side question. Where we can get default Lancelot Bitstream just in case? Is it same bitstream used with icarus V3? 10X
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Why is so quiet here? I hear my own thoughts which are not optimistic...
What are they saying to you? That competition will be first on the market? Or BTC price will collapse or both? What is meant to happen will happen we chose one road so we have to stay calm and cool. Any way except to loose some money nothing worst can happen right:)
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The pool seems to be running really sweetly with all the recent changes, my efficiency is over 500% now on my single GPU system, and my rejects are very very low compared to before ![Smiley](https://bitcointalk.org/Smileys/default/smiley.gif) Great work DrHaribo! +1 You are the man DOC:)
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Yifu Guo has been very helpful with my orders, and responds to emails quickly! Just want to put in a good word. I'm looking forward to receiving some of the first shipment of Avalons in a few months.
+1
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Don't bother loshia. Spartan3 500k will not perform faster than 2MH/s....
it is spartan 6 and it is performing...The git file source has been edited probably and what i see is commented
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Hmmmm... I haven't blown up any FPGAs lately. This is bitstream-compatible with Icarus, right?
AFAIK yes; Yes it is. The difference between cm1 and icarus should be https://github.com/ngzhang/Icarus/blob/master/FPGA_project/Src/fpgaminer_top.ucf# UCF for a Nexys2 500K board NET "osc_clk" LOC = "J1"; # serial port receive & transmit NET "RxD" LOC = "D1"; NET "TxD" LOC = "B1"; # TTL level serial port: ja3 = rxd, ja2 = txd NET "extminer_txd<0>" LOC = "D22"; NET "extminer_rxd<0>" LOC = "B22"; there is a chance your bitstream to work on one core only.... makomk, what do you think about that? Will your bitstream work?
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Did anyone bother using Google street view to check the address associated with the bank account for those who used the wire transfer as funding option? It's just a regular residential account. I dunno how BitSynCom is financially runned.. but.. it's kinda "ghetto" on how they do it.
jayeeyee, Did you got WT instructions? Were the instructions automatically sent to you with second wave or your order was from the first wave? I haven't gotten email confirmations on both waves regarding the wire xfer information. I found that information on the order status page associated with the account I created. I don't know if I should just send them the wire transfer with the information they provided or I should wait for the email confirmation.. but.. I think i'll do the latter. I do not have an account since it was not required in the first wave. All of us were in hurry, so..I do not have status page to watch. Anyway i will wait for mail WT instructions.. 10X
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Did anyone bother using Google street view to check the address associated with the bank account for those who used the wire transfer as funding option? It's just a regular residential account. I dunno how BitSynCom is financially runned.. but.. it's kinda "ghetto" on how they do it.
jayeeyee, Did you got WT instructions? Were the instructions automatically sent to you with second wave or your order was from the first wave?
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probably someone got 30+?
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