There already is the magic suite, a collection of vlsi design tools, available as FOSS.
http://opencircuitdesign.com/magic/

If people were to team up having enough volume to pay for a set of masks should be possible.

Can you guys please stop quoting him?
kthx

The main objective for a litecoin ASIC would be to incorporate DRAM.

LTC runs inside the CPU cache, but that is SRAM which is expensive to make. Since the time to rewrite taken to rewrite the cached hashes is sort of predictable the refreshing circuitry can be omitted or at least be very simple. That alone would make it 2 magnitudes more effective (ok I'll stfu now  )

the usual suspects.
you care to explain yourself?

 

FYI my hair are almost as long as that, should I dread them to fit your stereotypes better?

Yes.
That is the preposition which makes growth possible and while it it valuable it can only amplify existing (or in case of hoarded coins future-) development.

At current prices bitcoin is valued at 105 mio USD. That is 963 tesla roadsters.
They sold roughly 2100 of them from 2008 to 2010.

So bitcoin currently is valued at the yearly budget of a fairly large company. Right now it produces alpaca socks and ships drugs. (Dramatized)
The point of this?

Don't expect significant rise in value.

What's the point of the thread anyway, full day candlestick patterns contain more information.
So we have a doji = end of immediate trend followed by a hammer = strong support which would mean further sidewards movement.
It's not rocket science.

I have to admit I haven't looked into it detailed enough in order to justify a detailed response.
That was just a gut feeling, namely that you would need for example a neural network at some point of going from API data to a time & order price.

I don't know if I have the nerve to look into it, but thanks.
If you know of any further information on the subject I will appreciate it! 

Not if the looping is free. If there are abundant local resources at a specific place because of chip layout constraints the penalty used for looping and memory would decrease up to the point where it would be more efficient. But to be honest I have no idea how this should be implemented and don't even know if it is at all possible with available tools.
Nevertheless I think it is worth a thought and if FPGAs prevail over a long period as the status quo something will come up. I am certain of that.

Another speculative note: the I/O ports of the FPGA might eventually be used to obtain additional routing, this would of course restrict the layout but it should be worth it for cases where a slow rate data stream would consume unnecessary resources if routed over wide distances.

Well you still would need some model to make some kind of prediction.

That exclusively depends on the definition of a country.
http://en.wikipedia.org/wiki/Distributed_republic

Isn't the whole unrolling discussion really quite naive?

The optimal solution will be, depending on the layout of the chip, partly unrolled partly not, depending on which place inside the chip the operation takes place. It isn't really proficient to even talk about unrolling since depending on the amount of elements which can be used for memory, logic and routing a particular approach will be best.
Of course computing a solution which fits this paradigm would probably be too much, however if the tools permit programming the FPGA on a low level it should be at least possible to use close to 100% of all resources for something useful.

super cool story bro

FTFY

thanks, I knew I was missing something here  

To some extend it was possible to predict what the would be doing, not just now.
There are 2 kinds of big players out there: Early adopters & Moneybags.

The former wants to keep the price up but has to sell parts in order to keep at it.
The latter wants to keep the price down but has to buy at some point.

oh well.. do I make any sense here? 

idk, it's very hard to tell if we go up or down from here.