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This is actually the first Klondike - based design to be fully confirmed working with 16 chips & 400Mhz. Great job Marto & team
Wrong! look deeply into cgminer shot it says 500 so fully confirmed it works even better  Impressive work! Yet the best Avalon based miner available. |
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It looks like your not getting any accepted shares.
Has that timing capacitor been replaced on your boards ?
The klondike design is very sensitive with the nor gates and the phase shifter in front of it. It is a matter of the manufacturer of the nor gates, as well as capacitor/resistor. For less HW errors, the Tau of R and C has to fit the propagation and switching times of the nor gate, and these are sometimes higher, sometimes lower, and changing with every type of nor gate. So very hard to make this working properly.... In this case, it would be very easy to make it work by changing the R or C to meet Tau for a particular nor gate. Exactly, but this is a very empiric process and i think nobody really wants to do this for every new nor gate. |
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It looks like your not getting any accepted shares.
Has that timing capacitor been replaced on your boards ?
The klondike design is very sensitive with the nor gates and the phase shifter in front of it. It is a matter of the manufacturer of the nor gates, as well as capacitor/resistor. For less HW errors, the Tau of R and C has to fit the propagation and switching times of the nor gate, and these are sometimes higher, sometimes lower, and changing with every type of nor gate. So very hard to make this working properly.... |
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I was looking at the PCB for the K16 and noticed that the PLL ground is connected directly to digital ground under the Avalon chip.
Does anyone know if this I how the Avalon reference design connects the grounds together?
The PLL ground lead on the ASIC is lead 8.
There is no problem with this. Zero-Potential should be the same on the whole chip to prevent leakage currents. The only possible problem is that the digital ground is noisy and by connecting the this that way maybe the noise would get into the PLL circuit and cause problems. I was wondering if anyone knows where the PLL ground gets connected in the reference design. If the reference design connects the ground the same way as the K16 then I would not worry about it. It is. Please see attached the image from original avalon-ref  |
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So what is the overall state of the K16 project at the moment?
EDIT: Is anyone selling bare PCBs? I have all the components x 10 except for what BKKcoins sold on his website, as I was planning to get them there. And heatsinks.
Why don't you let them make by a pcb manufacturer? |
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I was looking at the PCB for the K16 and noticed that the PLL ground is connected directly to digital ground under the Avalon chip.
Does anyone know if this I how the Avalon reference design connects the grounds together?
The PLL ground lead on the ASIC is lead 8.
There is no problem with this. Zero-Potential should be the same on the whole chip to prevent leakage currents. |
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Great, I'll post back any responce I get from marto. Lets see if we can get you a board to work from. If Marto does not want to give his up, what components will you need ? Am guessing the most difficult would be the pic so if anyone has a couple please step forward.. That would be it actually. Plan is once everything is ready. I'll take vacation time and drive this out. 150 - 200 engineers hours should be enough to drive the klondike project to a working state. |
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I saw a post earlier that stated BKK Sent them a board... Could we use that address to find out how hes doing?
Kosta
I think he has his reasons for not being present any more.... |
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And between those instructions, is there a one, which changes what PORTC pins to use, when sending data out? Except the DATA_ONE and DATA_ZERO defines?
Therefore please look at the caller, which is in this case AsicPushWork in klondike.c, the argument there is DATA_SPLIT, which does the bits for single bank mode. In double bank mode one bank gets a one, the other a zero for MSB. Please also look what exactly the asm code tells, the last lines in send32 function differ from the others. Steamboat and Marty's group have been unable to get this design to work. Have you gotten a K16 working? He's being very "cryptic"  Us laymen non coders have no idea of what the significance of what he's saying is. A very clear "This should make the board work for 16 Chips" would be appreciated hah. Sorry gotta dumb it down for us! It is not that easy... I was designing my own board based on klondike several weeks ago. (It had some enhancements like software over/undervolting, over/underclocking, just search for "Dynamine D20" in this forum) I was working with klondike firmware and got several chips even with two banks working. Then all this YIFU happend and i stopped development. I can say that klondike firmware is well developed but not functional out of the box. A "This should make the board work for 16 Chips" is not that simple to do. There are also some hardware issues on klondike design with phase shifting NOR clock extractor as this only works for some specific gates from specific manufacturers. To get all that fully working some more work has to be done on this i think. |
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And between those instructions, is there a one, which changes what PORTC pins to use, when sending data out? Except the DATA_ONE and DATA_ZERO defines?
Therefore please look at the caller, which is in this case AsicPushWork in klondike.c, the argument there is DATA_SPLIT, which does the bits for single bank mode. In double bank mode one bank gets a one, the other a zero for MSB. Please also look what exactly the asm code tells, the last lines in send32 function differ from the others. |
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Can the remaining developers chime in and settle a debate?
Does anybody have a working 16 chip klondike running at 333*16?
To clarify on this, it would be a 16 chip Klondike at 282*16 (4.5GH as Advertised) with low HW Errors. Also if whoever did this, did so using Terrahash's code. You are using 260pF for C274 right? In order to hash with 16 chips, you need to make the following modifications in klondike.c, from line 159: Status.ChipCount = 16;
// pre-calc nonce range values
BankSize = (Status.ChipCount+1)/2;
Status.MaxCount = WORK_TICKS / BankSize / 2;
NonceRanges[0] = 0;
for(BYTE x = 1; x < BankSize; x++)
NonceRanges[x] = NonceRanges[x-1] + BankRanges[BankSize-1];
If you look at that code, you see, that only 8 nonce ranges are defined. How could this work with 16 chips? Any idea? Also, the NonceRanges were defined as NonceRanges[8]. And for everyone here, fully populated board with 16 chips IS NOT WORKING with those firmware modifications that Terrahash posted above. Look at asic.c especially in SendAsicData function. You will get your answer there and in the end of send32 function. But it is a bit tricky how its done there... In fact you only need 8 nonce ranges What are you implying The question is: Does it work? I can find NO ONE that can get the K16 to work. Okay so i will clarify this: This code NonceRanges[0] = 0;
for(BYTE x = 1; x < BankSize; x++)
NonceRanges[x] = NonceRanges[x-1] + BankRanges[BankSize-1];
generates the following nonce ranges for 8 chips (in hex): Nonce[0]:00000000
Nonce[1]:10000000
Nonce[2]:20000000
Nonce[3]:30000000
Nonce[4]:40000000
Nonce[5]:50000000
Nonce[6]:60000000
Nonce[7]:70000000
Then in SendAsicData you see: last_bit0 = last_bit1 = split;
send32_data = (WORD)&NonceRanges; send32_count = BankSize;
Send32();
and in Send32: MOVF _last_bit0 & 0x7F,W
CLRF LATC & 0x7F
BTFSC INDF1,7
MOVF _last_bit1 & 0x7F,W
MOVWF LATC & 0x7F
This changes the highest bit in nonce value to 1 and then you get the remaining 8 nonces. |
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Can the remaining developers chime in and settle a debate?
Does anybody have a working 16 chip klondike running at 333*16?
To clarify on this, it would be a 16 chip Klondike at 282*16 (4.5GH as Advertised) with low HW Errors. Also if whoever did this, did so using Terrahash's code. You are using 260pF for C274 right? In order to hash with 16 chips, you need to make the following modifications in klondike.c, from line 159: Status.ChipCount = 16;
// pre-calc nonce range values
BankSize = (Status.ChipCount+1)/2;
Status.MaxCount = WORK_TICKS / BankSize / 2;
NonceRanges[0] = 0;
for(BYTE x = 1; x < BankSize; x++)
NonceRanges[x] = NonceRanges[x-1] + BankRanges[BankSize-1];
If you look at that code, you see, that only 8 nonce ranges are defined. How could this work with 16 chips? Any idea? Also, the NonceRanges were defined as NonceRanges[8]. And for everyone here, fully populated board with 16 chips IS NOT WORKING with those firmware modifications that Terrahash posted above. Look at asic.c especially in SendAsicData function. You will get your answer there and in the end of send32 function. But it is a bit tricky how its done there... In fact you only need 8 nonce ranges |
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About the ROI, it really is gone now, but you have to take into account, that BTC price will likely go up, so even if you lose now, you can gain later. Especially if you've already made an investment in the HW, chips etc.
An investment that doesn't earn back its principal is called a loss. And about changing the HW for next gen Avalon chips (or any other chips), who is going to make this? Bkk seems to be gone (probably get sick of all the events regarding chips delivery, companies taking advantage of opensource project and giving nothing back) and there seems to be noone (even in the group of those companies, which started their business on this) who is able to make this change.
That's a great question! I don't have the answer, but I'd love to get some discussion going and find out. My older project which is to be found here : https://bitcointalk.org/index.php?topic=276728.0is based on klondike original but with some major modifications. I think it is also capable of using Avalon Gen2 chips. The main problem is that such a development is very costly and you get nothing back from it. Noone pays the development equipment nor the hundreds of hours for the project. The problem is also that there a newer chips available before the old ones are shipped. This was the case with Avalon Gen1. So such a development ist mostly not worth its time. |
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It is most likely a hardware bug in the circuit. During our testing we realized that the Dual NOR gates used in the design are too fast, and there needs to be some propagation delay. Using a cheap NOR gate chip from Fry's did the trick. We are still trying to see if this can be fixed in the firmware.
Maybe you may also want to try to use a bigger capacitor for the phase shifter in front of the NOR gate. A circuit should not depend on the propagation delays or fabrication tolerances of logic gates. I also tried to use the internal comparator of the PIC as a NOR gate, which is even better since it has some clock synchronization register. But it has shown that the comparator is not fast enough... |
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python ktest
Klondike device opened
tried I 0
Version:10, ProductID:K16, Serial#:deadbeef
Cmds [WAISCE.Q]:
S
State:R, ASICs:16, Slaves:0
WorkQ:0, WorkID:04, Temp:158, Fan:0, ErrCount:0, HashCount:2048, MaxCount:2048tried S 0
Cmds [WAISCE.Q]:
w
tried W 0 Cu÷?|?6?X?e1?"???}?.d?u!?R Q?G??N
State:W, ASICs:16, Slaves:0
WorkQ:0, WorkID:01, Temp:158, Fan:0, ErrCount:0, HashCount:0, MaxCount:2048
Cmds [WAISCE.Q]:
Is there something I am missing here, or something else I should be checking out? thanks I have seen this problem when you power up the PIC/ASIC and it is the first hash to be calculated. Possibly it will calculate valid results after you press w again. |
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Hat jemand nähere Infos zu der Bitfury Aktion?
Wie ist da das Preisleistungsverhältnis - macht das Sinn?
https://bitcointalk.org/index.php?topic=283992.0Da findet die Diskussion statt. Ob das Sinn macht? Wenn Bitfury rechtzeitig liefert und die Diff passt, ja. Auch dort gilt wieder: Die Einstiegsbarriere ist praktisch nicht existent, sprich jeder muss nur Geld investieren und nen Fertigungsauftrag erteilen, also ist auch da nicht mit grossen Profiten zu rechnen, da es sehr viele so einfach machen werden...Das Modell jeder kauft sich ne Gelddruckmaschine und wird reich kann einfach nicht funktionieren. |
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Das sehe ich auch so, das asiatische Geschäftsgebahren ist ein anderes: Es gibt keine Fehler! Es gibt nur ein Lächeln zu allem... Eins ist sicher: Egal wie mans macht, es wird entweder Leute in diesem Gruppenkauf geben die zwangsweise Chips geliefert bekommen müssen, oder Leute die gerne chips hätten aber keine mehr bekommen. Je nachdem wie viele Batches man refunden lässt. Die Frage ist mit welcher Alternative wie viele Leute in den sauren Apfel beissen müssen. Gibt es zu viele chips müssen die Leute aus den späteren Batches zwangsweise Miner bauen lassen die nur mit viel Glück ihren Wert wieder einspielen, gibt es zu wenige chips bekommen alle ihr Geld zurück und einige können halt nicht mit den chips spielen (...mehr ist das mit der Technologie ja nicht mehr). Hmmm...
Wenn Du bis Mittwoch wartest und dann Batch 1-6 tatsächlich verschickt werden, bekommen wir am Ende die quasi wertlosen Chips noch geliefert.
Hat jemand mal einen Mining-Calculator bedient?
Für 4 20er Boards haben wir 6,88 BTC zu 110 USD (chips) + 517 EUR (boards) gezahlt.
Das sind 1099 EUR.
Bei der heutigen Diff bekommt man mit vier _EXTREM_ übertakteten burnin Boards 36 MH/s und damit 1100 USD = 846 EUR im Monat.
(Am Tag der Bestellung war es ca. das 2,5 fache meine ich zu erinnern)
Vorausgesetzt die Diff würde 4 Wochen lang so bleiben - was totaler Quatsch ist mit Avalon + KNC in den Startlöchern.
Bis der Postbote an die Tür klopft und der Miner läuft, erwirtschaftet das Teil wahrscheinlich nur noch 500 EUR in den ersten vier Wochen
und danach geht es richtig bergab...
Also ich verstehe nicht, warum überhaupt irgendwer seine Chips behalten möchte, aber okay... ich kann es niemandem verbieten.
Ich nehme aber definitiv lieber die 30%-50% Verlust bei meinen 4 bestellten burnin Boards in Kauf (120.- bis 250.-, je nachdem ob man Bitfury kauft oder nicht)
anstatt mich an die Hoffnung zu klammern, den ROI zu erreichen....
Das könnte man geometrisches Mining nennen ;-) Angenommen die Profite halbieren sich jeden Monat. Man inverstiert 1100 Euro und bekommt im ersten Monat 500 zurück. Danach 250, dann 125 usw. Klingt erstmal gut. Aber selbst nach 100 Jahren hätte man nicht mal 1000 Euro wieder drin. ... |
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Yes, he did his best and is just sad that Yifu never full filled his part of the deal. We thank Bkkcoins for all that he has done for this
industry and the community. I am sure he got the skills to do and assemble any asic chips, other than the Avalon Chips, surely they
will be other vendors selling their chips soon.
ASIC that operate at current edge of technology (28nm) may solve the problem. The problem with Avalon was it was outdated before it was delivered. After even ASICs will operate on the edge of what is possible, the difficulty will stabilize and it will be worth making a custom board design. Same has been seen as GPUs were operating on the edge of what was possible. Constant (...even fallig) difficulty, but mining is also less profitable then. I think this will be the right time for development then. Everything else will outdate after weeks. (...see Bitburner) |
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die große Frage ist ob BURNIN die bereits bezahlten Bitburner zurückerstattet.... man man man hätte ich bloß nicht so früh bezahlt...
gibts da schon Antworten auf diese Frage?
Ich frage mich auch warum viele so früh bestellt haben. In der Hoffnung dann schneller bearbeitet zu werden? Wohl kaum, die Fertigungskapazität betrug 1000 Boards pro woche, das sind 20000 Chips. Es war nicht wahrscheinlich dass alle Batches gleichzeitig kommen, es also nicht zu Fertigungsengpässen kommt...Ich verstehe nicht wieso da wieder Pre-Orders gemacht wurden. |
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Ok emv kostet.. Aber macht ja auch spass, so nen projekt..  Und wissen ist immer gut, das hat er spätestens jetzt. Aber bin eh nicht beteiligt. Spass macht es, das stimmt, nur wenn es am Ende alles für die Katz war ist das schon eine Ernüchterung. Ich hab auch etwa 150h in mein Avalon DIY Projekt gesteckt...Platinen existieren auch schon. Nur Chips wirds keine geben. Und sebst wenn können die in ein Paar Wochen auch ins BitCoin Museum ;-) |
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