Actually it's not a silly question and you're not incorrect. You most likely will require a different bitstream for each board even though the Xilinx chip is the same. The reason for this is that the IO pins on the device are also configurable (i.e. you can change, within certain limits, which pins are connected to which external signals) and it is likely that the pins on the device have been connected up differently on each board. This may be a case of a simple recompile with no changes to the code but if the pinout is radially different you may have to reoptimise some of the timing to account for the differences in propagation delays between the pins and the logic.