Regarding overclock, my voltage setting seems to be ignored for chain1 and chain2.
I set the following params in my cgminer.conf:
"noauto": true,
"T1Pll1": "1425",
"T1Pll2": "1425",
"T1Pll3": "1425",
"T1VID1": "175",
"T1VID2": "175",
"T1VID3": "175"
According to the miner logs clock speed is set fine, but the vid is set correctly only for chain0.
Jan 29 11:36:02 InnoMiner mcompat_lib[1327]: chain0: set vid 160
...
Jan 29 11:36:11 InnoMiner mcompat_lib[1327]: chain0: chip0 set pll 0(30MHz) -> 150(300MHz)
Jan 29 11:36:12 InnoMiner mcompat_lib[1327]: chain0: set spi speed 2
Jan 29 11:36:12 InnoMiner mcompat_lib[1327]: chain0: chip0 set pll 150(300MHz) -> 300(900MHz)
Jan 29 11:36:14 InnoMiner mcompat_lib[1327]: chain0: set vid 160 -> 175
Jan 29 11:36:23 InnoMiner mcompat_lib[1327]: chain0: chip0 set pll 300(900MHz) -> 368(1416MHz)
...
Jan 29 11:36:26 InnoMiner mcompat_lib[1327]: chain1: set vid 160
...
Jan 29 11:36:34 InnoMiner mcompat_lib[1327]: chain1: chip0 set pll 0(30MHz) -> 150(300MHz)
Jan 29 11:36:36 InnoMiner mcompat_lib[1327]: chain1: set spi speed 2
Jan 29 11:36:36 InnoMiner mcompat_lib[1327]: chain1: chip0 set pll 150(300MHz) -> 300(900MHz)
Jan 29 11:36:38 InnoMiner mcompat_lib[1327]: chain1: set vid 160 -> 160
Jan 29 11:36:38 InnoMiner mcompat_lib[1327]: chain1: chip0 set pll 300(900MHz) -> 368(1416MHz)
...
Jan 29 11:36:40 InnoMiner mcompat_lib[1327]: chain2: set vid 160
...
Jan 29 11:36:49 InnoMiner mcompat_lib[1327]: chain2: chip0 set pll 0(30MHz) -> 150(300MHz)
Jan 29 11:36:50 InnoMiner mcompat_lib[1327]: chain2: set spi speed 2
Jan 29 11:36:50 InnoMiner mcompat_lib[1327]: chain2: chip0 set pll 150(300MHz) -> 300(900MHz)
Jan 29 11:36:52 InnoMiner mcompat_lib[1327]: chain2: set vid 160 -> 160
Jan 29 11:36:52 InnoMiner mcompat_lib[1327]: chain2: chip0 set pll 300(900MHz) -> 368(1416MHz)
Any ideas? What am I doing wrong?
I set the following params in my cgminer.conf:
"noauto": true,
"T1Pll1": "1425",
"T1Pll2": "1425",
"T1Pll3": "1425",
"T1VID1": "175",
"T1VID2": "175",
"T1VID3": "175"
According to the miner logs clock speed is set fine, but the vid is set correctly only for chain0.
Jan 29 11:36:02 InnoMiner mcompat_lib[1327]: chain0: set vid 160
...
Jan 29 11:36:11 InnoMiner mcompat_lib[1327]: chain0: chip0 set pll 0(30MHz) -> 150(300MHz)
Jan 29 11:36:12 InnoMiner mcompat_lib[1327]: chain0: set spi speed 2
Jan 29 11:36:12 InnoMiner mcompat_lib[1327]: chain0: chip0 set pll 150(300MHz) -> 300(900MHz)
Jan 29 11:36:14 InnoMiner mcompat_lib[1327]: chain0: set vid 160 -> 175
Jan 29 11:36:23 InnoMiner mcompat_lib[1327]: chain0: chip0 set pll 300(900MHz) -> 368(1416MHz)
...
Jan 29 11:36:26 InnoMiner mcompat_lib[1327]: chain1: set vid 160
...
Jan 29 11:36:34 InnoMiner mcompat_lib[1327]: chain1: chip0 set pll 0(30MHz) -> 150(300MHz)
Jan 29 11:36:36 InnoMiner mcompat_lib[1327]: chain1: set spi speed 2
Jan 29 11:36:36 InnoMiner mcompat_lib[1327]: chain1: chip0 set pll 150(300MHz) -> 300(900MHz)
Jan 29 11:36:38 InnoMiner mcompat_lib[1327]: chain1: set vid 160 -> 160
Jan 29 11:36:38 InnoMiner mcompat_lib[1327]: chain1: chip0 set pll 300(900MHz) -> 368(1416MHz)
...
Jan 29 11:36:40 InnoMiner mcompat_lib[1327]: chain2: set vid 160
...
Jan 29 11:36:49 InnoMiner mcompat_lib[1327]: chain2: chip0 set pll 0(30MHz) -> 150(300MHz)
Jan 29 11:36:50 InnoMiner mcompat_lib[1327]: chain2: set spi speed 2
Jan 29 11:36:50 InnoMiner mcompat_lib[1327]: chain2: chip0 set pll 150(300MHz) -> 300(900MHz)
Jan 29 11:36:52 InnoMiner mcompat_lib[1327]: chain2: set vid 160 -> 160
Jan 29 11:36:52 InnoMiner mcompat_lib[1327]: chain2: chip0 set pll 300(900MHz) -> 368(1416MHz)
Any ideas? What am I doing wrong?
Did you find a fix?