Put me in for 2...

Work looks good so far.

Heya,

Just got my board up and running (using the twin_test.bit), on MPBM...

All seems to be working well... on com22 and com23 I have it running at 378/377 MH's respectively.  The blockchain the total avg running at 755 MH's. (running for two and a half hours now).

My pool is only registering about 425HM's... no errors are showing up in the log however... no rejects.. and only 1.16% canceled.

Is this in line with best current performance?

Thanks in advance.

Hey guys, current stats using a 15sec getwork:

294.80 MH/s | 0: 3038/64/4 2.1% | 1: 2973/70/28 2.3% | 1d1h12m

This would be an FPGA Miner - although custom mining software may be required (as per every other FPGA Miner out there).

My main issue with FPGA Mining is the cost - with ASIC's on the way... cost price for a single LX150 is about $170, and that will get you ~200MH tops. So unless there is a breakthrough in the software, or a price drop in FPGA's then just look at what Butterfly Labs is offering.... (and take into account you are still looking at another $50 to $100 for PCB's and other components for the FPGA rig... that said I also use FPGA's for rainbow table generation and a few other things so for me its worth it, I cant say that will be the case for people just after a mining rig.
 

Hey guys,

I might start a new thread for this, but though I would gage interest here first. I too am very keen on a DIY FPGA mining kit. I have a few designs conceptually done up and am actively working on a "low cost" rig. Currently I am mining on a number of x6500's, and while these are great, I think there is a place in the market for a rig that people can assemble themselves (at their own risk). The basic concept is:

• The design should be compatible with current FPGA Mining software and bitstreams - atleast initially.
• The FPGA will be mounted on a daughterboard - to allow for upgrades, or if the baseboard supports multiple FPGA's, will allow for incremental adding of them.
• All components should be mounted on the top side of the board only (less header pins).
• All components should be capable of being hand soldered. - Less the FPGA to daughterboard - although skillet soldering is an option
• As many component functions should be put to daughterboards as possible - to allow for component re-use and ease of upgrade (eg the communications could be provided by an USB FTDI to JTAG board, maybe one of the sparkfun boards - or a bus pirate board)
• Would be interested in having the power regulators as daughterboards as well - I note that the x6500 does have these as daughterboards, but I am unsure if these are COTS or a custom board.
• I am keen to see as many pins brought forward as possible - from the FPGA - to allow for other uses of the board

If there is keen interest in this - I willing to share the work load and outcomes, if not I will develop alone. If it does work, I would be interested in selling the boards as kits - or even just the PCB's individually (I imagine most of the cost for this will be in the PCB fab, less the FPGA... larger orders = lower cost, all other components should be able to be sort cheep from digikey/mouser/rs). I understand some people might have already started work on something similar - if you have I am keen to here from you, I hate laying out PCB's.....

PM me if your interested in working on this...

I cant complain thats for sure... here is the latest from the other FPGA

Run Summary:
-------------
Device: 0
Serial: AH00WOWE
JTAG chain: 2
Number of FPGAs: 2
Running time: 20h15m
Getwork interval: 20 secs
Chain 0:
  Accepted: 2570
  Rejected: 61 (2.32%)
  Invalid: 5 (0.19%)
  Accepted hashrate: 151.32 MH/s
  Hashrate w/ rejects: 154.91 MH/s
  Hashrate w/ invalids: 155.20 MH/s
Chain 1:
  Accepted: 2460
  Rejected: 74 (2.92%)
  Invalid: 63 (2.43%)
  Accepted hashrate: 144.84 MH/s
  Hashrate w/ rejects: 149.20 MH/s
  Hashrate w/ invalids: 152.91 MH/s
Total hashrate for device: 296.16 MH/s / 304.11 MH/s / 308.11 MH/s

I seem to be getting a higher amount of invalids on FPGA1 vs FPGA0 - on both boards, which is odd.... just updating my getwork interval now though as well, ill drop it to 15seconds...

I can also say they are drawing 1.7A at 12V

..I have an 80mm fan for each board, blowing right ontop (not to the side as others seem to). When I measure the temp, I measure it using an IR thermometer on the back of the board - seems to be where most the heat on my setup...

Iv had about a 3 degree increase in temps from mine.. but other than that it seems all good. One of the chips has produced a lot of errors - but most were in the first few hours... so ill just keep an eye on it.

312.86 MH/s | 0: 2099/52/3 2.4% | 1: 2007/60/51 2.9% | 16h30m |

-------------
Device: 0
Serial: AH00WOWE
JTAG chain: 2
Number of FPGAs: 2
Running time: 59m39s
Getwork interval: 20 secs
Chain 0:
  Accepted: 133
  Rejected: 3 (2.21%)
  Invalid: 0 (0.00%)
  Accepted hashrate: 159.57 MH/s
  Hashrate w/ rejects: 163.16 MH/s
  Hashrate w/ invalids: 163.16 MH/s
Chain 1:
  Accepted: 103
  Rejected: 2 (1.90%)
  Invalid: 2 (1.87%)
  Accepted hashrate: 123.57 MH/s
  Hashrate w/ rejects: 125.97 MH/s
  Hashrate w/ invalids: 128.37 MH/s
Total hashrate for device: 283.14 MH/s / 289.14 MH/s / 291.54 MH/s

Thats using the 166MHz bitstream.

Certainly less errors:

Run Summary:                                                     
-------------
Device: 0
Serial: AH00WOWE
JTAG chain: 2
Number of FPGAs: 2
Running time: 1h13m
Getwork interval: 20 secs
Chain 0:
  Accepted: 134
  Rejected: 4 (2.90%)
  Invalid: 0 (0.00%)
  Accepted hashrate: 130.63 MH/s
  Hashrate w/ rejects: 134.53 MH/s
  Hashrate w/ invalids: 134.53 MH/s
Chain 1:
  Accepted: 111
  Rejected: 4 (3.48%)
  Invalid: 0 (0.00%)
  Accepted hashrate: 108.21 MH/s
  Hashrate w/ rejects: 112.11 MH/s
  Hashrate w/ invalids: 112.11 MH/s

I had that issue when I was first installing on linux... only way I fixed it was down grading to 2.6.7, when running python specifying the version (python2.6 <command>) and re-building PyUSB component.

Id just like to shout a thanks out to Fizzisist for his help over the last few days (some how I managed to blow a cct protection fuse on the molex connector to one of my boards). He has provided all the details needed and troubleshooting for repair, and offered repair free of charge (so great support). Currently mining on slushes pool with the following stats:

279.41 MH/s | 0: 1305/109/1 7.7% | 1: 1284/133/2 9.4% | 12h45m | AH00WOWE

and:

Run Summary:
-------------
Device: 0
Serial: AH00WOVP
JTAG chain: 2
Number of FPGAs: 2
Running time: 15h1m
Getwork interval: 30 secs
Chain 0:
  Accepted: 1440
  Rejected: 112 (7.22%)
  Invalid: 0 (0.00%)
  Accepted hashrate: 114.32 MH/s
  Hashrate w/ rejects: 123.21 MH/s
Chain 1:
  Accepted: 1350
  Rejected: 127 (8.60%)
  Invalid: 16 (1.07%)
  Accepted hashrate: 107.17 MH/s
  Hashrate w/ rejects: 117.26 MH/s
Total hashrate for device: 221.50 MH/s / 240.48 MH/s

Each boards heat sink is at 37 degrees C, rear of board 49 Degrees C (ambient is 30 degrees C), and it is drawing 0.9A at 12v (inc an 80mm fan each).

Currently migrating the boards over to a dedicated mining micro PC (running a VIA 700 chipset and ubuntu), all powered off a ESP113 power supply (a HP 32A rated rack mount supply - details for them and using them for 12v supply can be found at http://www.rcgroups.com/forums/showthread.php?t=358340&highlight=hp+hot+swap+power+supply, the 5v 5A supply is the large middle pin on the bottom side).

There are a few stales in there, but I am looking at moving to a slightly smaller pool that I might have some better luck with... any suggestions? anyone tried bitminter with fpgas?

Very useful, cheers.

I will be joining you guys as soon as the new FPGA minning rig is ready

Nice... I think I will move to bitminter.. I dont mind Slushes pool, but I wouldnt mind something a little smaller.

+1 here... have a few FPGAs already and am just about to start soldering a new PS for them... just wish the FTDI chips support ARM and I could ditch the using PC's all together....

New guy here - currently mining on FPGA's... interested in discussing this on your boards.