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Hey Martin -
Are the bare chips which are being offered @ technobit.eu already purchased?
Or are payments going toward another reel which will be purchased once 3000 are sold?
thnx!
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As I understand it individual K16s only work with NOR gates from particular manufacturers.
interesting - where was this discussed? |
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I though i could donate the chip to someone in the community.
Unfortunately, unless there were solder bridges on the IO pins causing the issue, the chip is likely non-functional. nice sentiment tho  |
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Go with the Hakko. Get a decent magnifier too, you'll need it.
Or grab a used Metcal MX500 on ebay and never look back. Stylus so agile, auto-off invaluable, heats up so fast ... oh so dreamy. also - the brass sponge, dry so it cleans without cooling the tip. |
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0603 size has a somewhat higher inductance, so it may not perform as well as 0402. Whether that's significant, I don't know.
Soldering 0402 has one advantage though: after you pick and place 10000 of them, suddenly 0603 seem as huge as bricks.
indeed - i can now do 1206 with my feet! thnx, will read up a bit on package characteristics. |
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since we're on the topic - I'm assume switching to 0603 size caps doesn't pose a problem, correct? After hand soldering 150 0402 caps, I'm ready to not ever do that again  |
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beautiful pics! aah, the tiny zen of electronics assembly ... |
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Nice guide - wish I'd got an order in! one thing: Reboot the rPi: sudo shutdown -r now
perhaps you meant "sudo reboot"? Edit: ignore me, mistook -r for a -h. need more sleep ... |
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[…] I would like to know why steamboat is unwilling to do a 100% refund.
An explanation was included in the last update, relevant excerpt below: The situation as it stands is far from optimal, and while we realize a 100% refund is desired by most of those who have purchased chips through us, we have invested considerable resources in order to facilitate our offer of Avalon ASIC chips to the community, and cannot offer a full refund. We have done everything in our power to educate potential customers of the risks involved when considering placing an order, and have stated explicitly we assume no responsibility for any issues that may arise due to circumstances outside our control; including but not limited to Avalon failing to ship, shipment being seized by customs, shipment arriving late, etc.
While we are not bound in any way to do so, we know it is unethical to retain the profits made from chip purchases, and have chosen to refund all profits which remain after administrative, logistical, and material expenses have been taken into consideration.
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OSX: use 'FD_FULLSYNC' with LevelDB, which will (hopefully!)
prevent the database corruption issues many people have
experienced on OSX.
Thanks very much for addressing this one! |
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They are rather expensive, so we decided to remove
them. But the power supply is now behaving a bit odd,
so in rev 3 some of the caps will be back:)
If you look closely you see a stack of caps just
behind the DC/DC converter. They were added
to add some more stability to the output voltage.
intron
indeed - I was a bit shocked @ the price of poscaps. 13 of them are hiding on the underside of my DC/DC converter. Calculating Rtune & Ctune via the GigaTLynx datasheet was vague to say the least … |
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Mounted S-HASH on a heatsink and got it hashing:
[…]
Vcore = 0V8
Some bitfury ASIC stats:
stats
1 min: 2.97 3.13 3.21 3.21 2.47 2.55 2.31 3.05 3.71 2.64 2.88 2.06 3.30 2.72 2.55 3.13
5 min: 3.33 2.98 2.90 2.57 2.72 2.64 2.57 3.03 3.16 2.52 2.84 2.55 2.88 2.79 2.72 3.07
15 min: 3.23 3.14 2.91 2.51 2.82 2.60 2.71 2.79 3.02 2.68 2.71 2.58 2.93 2.96 2.96 3.03
intron
PS: I'm hashing with 41.2 GH/s FYI.
Whoah - 40GH @ 0V8 and so few caps! What prompted the removal of the 8-cap clusters between each quad of chips? Not necessary? |
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thnx - build process was fun, gave me some ideas for a couple of new modular designs. Just wish I had prettier perfboard - beige/green not my ideal color scheme "Grrrrrr … more chips, more pi!", said the bitcranky |
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Still very much looking forward to receiving my Fusion 16 units.
I am only interested in pursuing a refund for chips I ordered without assembly.
I imagine the logistics involved with a situation such as this are quite complex and require careful consideration to say the least. I have no doubt an update will be posted once viable information is available.
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enter the 'BitCranky' …   speed:491 noncerate[GH/s]:20.043 (2.227/chip) hashrate[GH/s]:21.002 good:1400 errors:27 spi-errors:0 miso-errors:0 jobs:274 coreVDD = 0.84V |
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thnx - blinked and I missed it!
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Now that I'm on chainminer, I just repopulated that chip on the board, and this seems to confirm it's marginal:
What is this "chainminer" you speak of  |
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I've got it running 9.5GH on seven chips; was running 8.5GH on four. Pretty disappointing  Weird - I've got a 9-chip chain that's maxing out @ 9.5GH as well. Just did a rework of my DC converter because of this and have tried all the clock settings posted here. This is why I assumed you were using an external clock when you were running 4 @ 9GH. |
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It's not necessary, but you could use this to verify the SPI chain is working correctly.
makes sense - thanks for clarifying. I'm not using external clock, and no I didn't feed the final SPI outs back anywhere.
ah - this is line used to program chips internal oscillator (libbitfury.c line#109): unsigned char osc6[8] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x0F, 0x00 };I'd assumed the Pi was generating external clock for the chips using the above code. The separate clock connection on the H-board threw me off - guessing c-scape added that to keep the functionality available. EDIT: reworded for posterity |
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wow - guess i need to switch to using external clock Do you have the last chip in your chain feeding SPI outs back into the Pi as on the M / H boards? I've yet to figure out why this is done. |
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