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February 07, 2015, 09:38:56 AM |
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Hello,
I'm new to mining however I want to implement sh256 in Virtex4 for mining. I've noticed that none of the hdl sources covers optimization using DSP48 in Virtex4 devices. I own an dev. board with Virtex4 LX60 ( eng sample ) so I've tried to synthesize the original VHDL_Xilinx_Port. Results shown 349% overmapped without any optimization in LUTs and 0 DSP48 usage. This is DSP48 and not A or E/E1 version of DSP48.
First thing that I want to optimize is moving the add function in DSP48 as COCAT+C which will give basically sum of two integers: one with 32bit as CONCAT and C.
Please help with some pointers for more ideas on what other functions can I move to DSP48.
Regards,
Cristian
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