FPGA Development (SHA256 core)

[fpgaminer]

Great work OrphanedGland And thank you for opening a thread in the Newbies section. It will be a pain to keep track of yet another thread, but I guess it is our only option for now.

If you want, I will happily put your code up on the public repo, if you want it available on there.

[LazarusLong]

Im porting the miner.py to C because I have no python on my embedded system.
Can someone explan me what this python snipped is all about:

Code:

self.fpga.write(struct.pack("B", 1) + job.state[::-1] + job.data[75:63:-1]

Does it mean bytes 75 to 63 are snipped out in reverse order???

b.r.
LazarusLong

[Bloody Bell]

Im porting the miner.py to C because I have no python on my embedded system.
Can someone explan me what this python snipped is all about:

Code:

self.fpga.write(struct.pack("B", 1) + job.state[::-1] + job.data[75:63:-1]

Does it mean bytes 75 to 63 are snipped out in reverse order???

b.r.
LazarusLong

the -1 after the second colon means reverse order, but in python the number after the first colon is not the last element of the subrange, it's the first element not included. So job.data[75:63:-1] will give you the [75th, 74th, 73rd ... 65th, 64th] elements.

btw, do you plan to make the C version public?

[LazarusLong]

Ahh, thanks! I always thought python code is easy to read
I will publish it when finished. Propably in about 1-2 weeks, I have not that much spare time.

[O_Shovah]

I have opened a new Thread specifically for the hardware development of a dedicated FPGA mining system.  http://forum.bitcoin.org/index.php?topic=22426.0

I'd like to invite everybody interested in helping to plot out the hardware needed to get a prototype of a modular Mining system no matter his experience.

I especially like to ask all of you who are currently developing this FPGA Miner to help us determine wich FPGA chips are needed at minium for one execution of a full unrolled Miner.


Thank you for your help 

[redhatzero]

BTW:
Can anyome recommend a nice fpga/verilog/vhdl Tutorial?
I have one of these http://www.xess.com/prods/prod047.php and I'm still struggling with simple stuff like let a LED glow...

[fpgaminer]

How about this? http://www.fpga4fun.com/ISEQuickStart.html
And once you have that working, they have an assortment of other little projects with tutorials

[goxed]

How about this? http://www.fpga4fun.com/ISEQuickStart.html
And once you have that working, they have an assortment of other little projects with tutorials

Nallatech produces FPGA modules for Xeon sockets. One of these could be used for building FPGA miners
http://www.nallatech.com/Intel-Xeon-FSB-Socket-Fillers/fsb-expansion-module.html

[eusor]

How about this? http://www.fpga4fun.com/ISEQuickStart.html
And once you have that working, they have an assortment of other little projects with tutorials

Nice link, quite interesting!

I've done fpga in the past on an old vortex 2 pro. Could be interesting to starting playing again..

Any of you could recommend some good FPGA dev board to start up with? Something that has a good power/price ratio?

Thanks

[fpgaminer]

DE0-Nano is $80 USD for a Cyclone 4 CE22. I haven't used one before, but it seems like a pretty good price point and the board is very spartan.

There are also small Xilinx boards out there that are cheap; just the chip, USB, and GPIO. I can't remember the name of it ... the FPGA mining thread lists it somewhere, amongst lots of other options.

[eusor]

DE0-Nano is $80 USD for a Cyclone 4 CE22. I haven't used one before, but it seems like a pretty good price point and the board is very spartan.

There are also small Xilinx boards out there that are cheap; just the chip, USB, and GPIO. I can't remember the name of it ... the FPGA mining thread lists it somewhere, amongst lots of other options.

Thanks, I'll check that out

[LazarusLong]

That one would rock!
http://cgi.ebay.de/Micro-Super-Computer-3-x-Altera-Stratix-III-FPGA-/130500717600

sadly its above my budget 

[tinkerer]

I've got a DE0-Nano and have been trying unsuccessfully to get the open source fpga miner to compile for it.  I'm new to FPGA development and was wondering if someone already has a port running on the Nano and could give me some advice.

Thanks!