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Author Topic: (POH) Proof of history - How many Parralel hashes for today's ASICS??  (Read 73 times)
divinci (OP)
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April 07, 2021, 08:31:25 AM
 #1

Hi all, reading up on Solana's POH.

Their proof is a long merkle of hashes with transaction data mixed in.

They claim this reduces the effectiveness of ASICSs as they can't do massive parralization.

So my question is.  On a modern day ASIC with say xxTHs how many parralel iterarive hashes can they achieve per second?

 
NotFuzzyWarm
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April 07, 2021, 08:10:55 PM
Last edit: April 12, 2021, 11:47:10 PM by NotFuzzyWarm
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Quote
They claim this reduces the effectiveness of ASICSs as they can't do massive parallelization.
Bullshit.
ASIC-based miners are MASSIVELY parallel processing devices. Each chip in a miner can have over 256 cores and each miner can have many hundreds of chips with each core processing 1 hash for every 2 clock cycles. Well over 100 chips per hash board is very common. That is how they achieve from a few TH/s to over 100 TH/s throughput with a modest few hundred MHz clock speed.

Yeah there is a limit to how many chips can be effectively fed data per controller that that is not a serious limitation.

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