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Author Topic: Open source ASIC design plans in Hardware Description Language (HDL) format?  (Read 1288 times)
Geremia
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April 27, 2015, 02:15:41 PM
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Are there any freely-available ("open source") ASIC design plans in, e.g., HDL or AHDL format(s)? (cf. the related Bitcoin StackExchange question)

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April 28, 2015, 06:07:37 AM
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Nope.  There's several open source board designs, but no open source ASIC.  Designing one for larger nodes isn't hard, you could easily do a hardcopy style from an FPGA design (that are available) - designing an efficient one is another matter of course Smiley

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April 28, 2015, 06:27:48 AM
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There's several open source board designs, but no open source ASIC.
There's this, but, yes, technically FPGA ≠ ASIC.

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April 28, 2015, 06:31:58 PM
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Are there any freely-available ("open source") ASIC design plans in, e.g., HDL or AHDL format(s)? (cf. the related Bitcoin StackExchange question)

There was a project regarding this: OpenBitASIC : The Open Source Bitcoin ASIC Initiative
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