[Archive] BFL trolling museum

[Frizz23]

I'm not under the impression they have ASIC chips [that work].

Here's an interview with Josh from BFLs website where he says that they don't have ASICs yet.

http://www.youtube.com/watch?v=5ZUPniBo5UQ#t=04m30s

David Perry: "So this is just a case ... you don't actually have ASICs ready?"
Josh: "Um... right ... but we are eagerly awaiting them as everybody else I'm sure ..."

[1713449901]

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[1713449901]

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[greyhawk]

My question is wither or not the single/jally boxes at CES are equally empty.

Nope.



Which makes the Big Box of Emptyness^TM all the more absurd

[shwoop]

My question is wither or not the single/jally boxes at CES are equally empty.

Nope.

https://i.imgur.com/srRPZ.jpg

Which makes the Big Box of Emptyness^TM all the more absurd

Then why does everyone care about an empty box?
As i said, they can say "look, here's a box where we house 12 of them to make it more convenient in larger scales" while showing off their mock up single.
I presume their target audience at CES isn't the Bitcoin community so this would probably be adequate.
Actually screwing in and gluing multiple layers of singles just to have a shiny copper cube seems like a waste of time (IMHO).

[DobZombie]

LOL, that made me laugh.  Not seen that one before

[bitmar]

My question is wither or not the single/jally boxes at CES are equally empty.

Nope.



Which makes the Big Box of Emptyness^TM all the more absurd

What you see cost a few $... to ​​be won in this game is a few million dollars

[DobZombie]

That's what I don't get. Why the hell not just stick some FPGAs in there, hook them up to the Nexus and go "It's an FPGA rig now, but we'll have ASICs soon." Much better than a box of fans and space(rs).

Or, heck, just take some PCBs, mount them (aside from the ASIC of course), glue some heatsinks on them and stick that in there. "It's not running yet, but boy will it be good when it's done". Nope, better show of a box of fans.

I'm guessing if they did that all the HERPA DERPS around here would be like...
"DUH WHY IT ONLY HASHING AT 30GIGAHASHESWHATZITS"

The fuckers can't win not matter what they do.

[elux]

...but serial production without a prototype is not practiced anywhere in the electronics industry. Empty box only confirms they don't have chips in production.

Exactly! They could have shown at least one working ASIC chip at CES. At least one single Jalapeno hashing ...

They didn't, which means they don't have a working prototype. Which means:
a) going into mass production without a working prototype is suicide.
or
b) they never intended to ship a product and it's all a scam.

Funny. That's exactly what Inaba of Butterflylabs told Bitsyncom of Avalon ASIC yesterday:

Seems to me, if you had a working test product, you'd have shown it by now, but maybe not.  Seems silly, though...
if you wanted to be the first, you would show your working prototype, that would qualify you as first at this point.  

What possible reason could you have for not showing a working unit 6 days before you are scheduled to ship?  

I don't care.  You are here, in the BFL thread trolling and you won't even demo a working product 5 days before you are shipping.

Seems like a crazy way go about things, but whatever man.

Like I said, if you're delayed, your project is dead and I believe you know this.

I hope you aren't rushing things just to be first and shipping a brick in a box that fails to perform or breaks in a month.

[DobZombie]

They're refunding anyone who asks...

No, they don't. They do not honor full BTC refunds.

If you mean that you paid 100btc 6 months ago and intend to receive 100btc today ... go astray, do not be a hustler.

No, I do not intend. I WANT! Because I've the right to receive the refund in the currency and amount I had originally paid!!!

BFL didn't ask me to pay US dollar, they asked me to pay BTC. I did what they ask me to do. I've send the EXACT amount BTC to the EXACT BTC address they specified.

Greedy fucks are greedy

[greyhawk]

Then why does everyone care about an empty box?
As i said, they can say "look, here's a box where we house 12 of them to make it more convenient in larger scales" while showing off their mock up single.
I presume their target audience at CES isn't the Bitcoin community so this would probably be adequate.
Actually screwing in and gluing multiple layers of singles just to have a shiny copper cube seems like a waste of time (IMHO).

It's called marketing. You don't exhibit an empty box unless you're a manufacturer of empty boxes.

Hell, they could have put in 12 packets of Walker crisps and a sticky note reading "With special greetings to our detractors".

At least it would have been funny.

[risim]

https://i.imgur.com/2wysl.jpg

[Cablez]

Better make that February!!   

[itsgoldbaby]

Is it February or Febuary, because I prefer -uary, and what's with this Ru?

BFL-Josh, Inaba: Is there a time limit on using my fpga upgrade? I was planning on waiting to you guys shipped to put in an order, just wanted to make sure I will still be able to use the single fpga upgrade still. Thanks.

[01BTC10]

My question is wither or not the single/jally boxes at CES are equally empty.

Nope.



Which makes the Big Box of Emptyness^TM all the more absurd

I've read this is an FPGA in an ASIC box but correct me if I'm wrong.

[greyhawk]

Well it does feature the new heatsink, so who knows. It's not an ASIC in there, that much is sure.

[Korbman]

As per Josh on the BFL Forums:

Just so everyone understands why we have not, up until now, provided updates like this, I want to point out that if we had released this type of information in the beginning, it would have given our competitors a substantial boost in figuring out how to design a product that would compete with us. This is something we do not want to happen. We will not pay for others to learn from our experience in this particular venture. They need to pay the piper if they want to ship a competing product. Since Avalon is commited at this point and bASIC is dead, there is now no harm in releasing the information. I suspect Avalon will run into the same heat issues we ran into once they finally turn on a unit and make it go. In fact, it may be much worse since they are on 110nm and have 80+ chips (speculation) to cool. On the other hand, it may simply be because the heat density in our full custom 65nm chip just overwhelms a QFN package cooled by vias and doing the same thing on a place and route 110nm QFN would work ok. We have not tried it, so who's to say. But my point is, we can't release that sort of information while it still will benefit our competition. The same goes for specific timelines - it will give the competition something specific to shoot for. Again, Avalon is now committed and there is nothing they can do to change it with 5 days to go, so the release of that information is acceptable.

Going forward, I will be posting more detailed updates, since that sort of information will not benefit Avalon. They either ship on the 19th or they delay and nothing we reveal can change that.

My question now is:
Since competition doesn't matter anymore, why not fill us in on EVERYTHING going on? Exact specs / dimensions, chip testing results, etc...

[greyhawk]

As per Josh on the BFL Forums:

My question now is:
Since competition doesn't matter anymore, why not fill us in on EVERYTHING going on? Exact specs / dimensions, chip testing results, etc...

How could they? They don't have any data themselves yet, see for example this awesome fluff on wattage

Originally, we were at about .8w per GH (Yes, we built 20% into our announcements) and we are estimating that it's possible that a worst case scenario would lead to a bit under 1.2w per GH. If that ends up being the case, then yes we will have missed our power targets and yes we will gladly pay out the bounty. However, at less than 72 watts for 60 GH/s, it's still more than 5x better than any other product. However, we still believe that our .8w / GH target is what we will ship, but we like to prepare for the worst case scenario.

Translation:

[smoothie]

As per Josh on the BFL Forums:

Just so everyone understands why we have not, up until now, provided updates like this, I want to point out that if we had released this type of information in the beginning, it would have given our competitors a substantial boost in figuring out how to design a product that would compete with us. This is something we do not want to happen. We will not pay for others to learn from our experience in this particular venture. They need to pay the piper if they want to ship a competing product. Since Avalon is commited at this point and bASIC is dead, there is now no harm in releasing the information. I suspect Avalon will run into the same heat issues we ran into once they finally turn on a unit and make it go. In fact, it may be much worse since they are on 110nm and have 80+ chips (speculation) to cool. On the other hand, it may simply be because the heat density in our full custom 65nm chip just overwhelms a QFN package cooled by vias and doing the same thing on a place and route 110nm QFN would work ok. We have not tried it, so who's to say. But my point is, we can't release that sort of information while it still will benefit our competition. The same goes for specific timelines - it will give the competition something specific to shoot for. Again, Avalon is now committed and there is nothing they can do to change it with 5 days to go, so the release of that information is acceptable.

Going forward, I will be posting more detailed updates, since that sort of information will not benefit Avalon. They either ship on the 19th or they delay and nothing we reveal can change that.

My question now is:
Since competition doesn't matter anymore, why not fill us in on EVERYTHING going on? Exact specs / dimensions, chip testing results, etc...

It is all fluff. Excuses to buy more preorders and time.

Keep hanging in there though.

[smoothie]

For a product that has been in the "Final Development Stage" for 3, now 4 months...they sure can't be any more specific than updating everyone saying "nothing is really nailed down and we don't have any proof of a prototype because if we did we would have brought it to CES."

BFL is full of shit.

Why not announce the timeline of delays by the very excuse themselves? Oh wait maybe that would give too much information about the fact that they were lying for months on end about where they actually were in the development process......."Final Development Stage". Looks like they are relying on someone else's word on the timelines and not on anything they actually know.

Without a prototype what the hell do they expect to accomplish by mass producing chips that could be flawed all while giving an unrealistic timeline of shipping preorders?

LOL just LAWL!

[Korbman]

Translation:

Very true. I suppose I was hoping for Josh to divulge more detail into their strategies, reasons for delays, how things are going with the chips, etc...but then I realized they're a private company and they don't have to give out anything other than updates on the product itself. Therefore, the aforeposted image is 100% accurate

[MrTeal]

I've read this is an FPGA in an ASIC box but correct me if I'm wrong.

I'm pretty sure that's the ASIC board. Probably the one that was fully populated with 8 chips that they were showing pictures of.