You might be right.
If power required for the greater frequency is the same, which I believe it's true at least for the dynamic power (1/2C*V^2*f + Qtransition*f), there is an efficiency increase. But you might be wright because at 65nm leakage power becomes comparable with dynamic power (unless you use LP process, which I doubt).
Static power/leakage is almost certainly a non issue with bitcoin asics. Simply put, static power is the power consumed (leaked) by inactive circuits. On something as complex as a cpu, most circuits are inactive most of the time, even if the cpu is working under full load, and maybe 90% of the dynamic power is consumed in like 5% of the CPU's transistors (numbers pulled out my behind). So leakage becomes a real issue, particularly when "idle".
But a bitcoin ASIC is not supposed to be idle and is incomparably simpler and all circuits are there specifically to be used while mining; so Im pretty sure 90+% of the circuits will be used pretty much all the time while mining. It really doesnt matter what the rest consumes when idle.
