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Author Topic: Avalon Asic Design Discussion  (Read 7848 times)
kev7112001
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February 07, 2013, 01:08:00 AM
 #1

This bothers me, Avalon chose to put the heatsinks on the back of the board instead of directly on the chips themselves also there should channel guides for the airflow to make sure the air flows through the fins efficiently, this was one of the problems the xbox360 had with its GPU they used a channel guide but it wasn't covering the top of the GPU heatsink because they had the DVD-ROM drive siting on top which didn't push enough air through the fins.I have fixed many xbox360's with simple cardboard cuts to make the heatsinks work like they should with proper airflow and not one has ever overheated again or even run the fan on high when doing long periods of gaming. just my 2 cents but i believe they will have heating issue in the future.

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February 07, 2013, 01:14:01 AM
 #2

Energy density matters.  Xbox360 GPU consumed about 100W from a square area the size of your smallest fingernail.  Each of the 80 SHA256 processors consumes about 2W and combined they are spread out over the surface area of a small book.  Comparing the cooling requirements isn't exactly apples to apples.
kev7112001
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February 07, 2013, 01:16:07 AM
 #3

Well they have already said the fans run loud and several restarts happen randomly

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kev7112001
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February 07, 2013, 01:18:01 AM
 #4

and they all share the same heastink. so the on close to the fan is cooler than the last. i say the last chips are way hotter than the first

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February 07, 2013, 01:24:48 AM
 #5

which when you have a board with different temps and the heating and cooling expansion and contraction is going to result in problems.

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February 07, 2013, 02:14:12 AM
 #6

Energy density matters.  Xbox360 GPU consumed about 100W from a square area the size of your smallest fingernail.  Each of the 80 SHA256 processors consumes about 2W and combined they are spread out over the surface area of a small book.  Comparing the cooling requirements isn't exactly apples to apples.
2W per chip is not too bad if the board is connected well heat wise to the heatsink and the heat can make it from the chip, through the board and into that heatsink.   The fans look powerful enough to do the job.

As Kev says, the only issue I see is the differential with some of the chips getting hotter then others. If there is room, little heatsinks on the hotter rows of chips could help.

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February 07, 2013, 02:45:45 AM
 #7

No over heating issues observed. Fans always running @ 1600~2200rpm. Chip temperature is about 50~60 C.

Fans will increase speed when temp goes up, 3600rpm max.

We design and produced some heatsink installed at front , but we found its unnecessary during the test.

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February 07, 2013, 02:47:29 AM
 #8

No over heating issues observed. Fans always running @ 1600~2200rpm. Chip temperature is about 50~60 C.

Fans will increase speed when temp goes up, 3600rpm max.

We design and produced some heatsink installed at front , but we found its unnecessary during the test.
Are the Avalon designed to overclock or are they fixed to a certain preset GH/s?


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February 07, 2013, 03:02:48 AM
 #9

They are Qfn chips. The bottom is where the heats sink goes. The top,is plastic and has very poor thermal conduction.

http://www.google.com/images?q=qfn+package
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February 07, 2013, 03:22:44 AM
 #10

Disadvantages

The small size of the exposed contacts, and the large area of exposed thermal pad makes it easy for small parts, such as 3x3 mm DFN packages, to float on the pool of molten solder under the thermal pad during assembly. This causes the parts to make no contact to the printed circuit board pads in some instances. Due to the excellent thermal characteristics of this mounting package, it is very hard to rework the device, as hot air reflow typically does not offer enough heat to the thermal pad without damage to surrounding board material or parts. Oxidation of the exposed chip contact pads after being exposed to a reflow oven during initial assembly makes solder wetting to them during rework quite difficult. Additionally there is no clearance for a soldering pencil to reflow pads under the chip if touch up is desired. Sometimes contact can be made up the sides of the DFN package contact pads, but this does not work well in practice.

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February 07, 2013, 03:55:51 AM
 #11

Disadvantages

The small size of the exposed contacts, and the large area of exposed thermal pad makes it easy for small parts, such as 3x3 mm DFN packages, to float on the pool of molten solder under the thermal pad during assembly. This causes the parts to make no contact to the printed circuit board pads in some instances. Due to the excellent thermal characteristics of this mounting package, it is very hard to rework the device, as hot air reflow typically does not offer enough heat to the thermal pad without damage to surrounding board material or parts. Oxidation of the exposed chip contact pads after being exposed to a reflow oven during initial assembly makes solder wetting to them during rework quite difficult. Additionally there is no clearance for a soldering pencil to reflow pads under the chip if touch up is desired. Sometimes contact can be made up the sides of the DFN package contact pads, but this does not work well in practice.
Despite these limitation both BFL and bASIC had been utilizing QFN designs in their ASIC engineering attempts. Only one has switched to FCBGA due to high heat and the need to overclock their ASICs chips.


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kev7112001
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February 07, 2013, 04:06:00 AM
 #12

Disadvantages

The small size of the exposed contacts, and the large area of exposed thermal pad makes it easy for small parts, such as 3x3 mm DFN packages, to float on the pool of molten solder under the thermal pad during assembly. This causes the parts to make no contact to the printed circuit board pads in some instances. Due to the excellent thermal characteristics of this mounting package, it is very hard to rework the device, as hot air reflow typically does not offer enough heat to the thermal pad without damage to surrounding board material or parts. Oxidation of the exposed chip contact pads after being exposed to a reflow oven during initial assembly makes solder wetting to them during rework quite difficult. Additionally there is no clearance for a soldering pencil to reflow pads under the chip if touch up is desired. Sometimes contact can be made up the sides of the DFN package contact pads, but this does not work well in practice.
Despite these limitation both BFL and bASIC had been utilizing QFN designs in their ASIC engineering attempts. Only one has switched to FCBGA due to high heat and the need to overclock their ASICs chips.

these kind of machines need to be built to run 24/7 there no refund so if it breaks your screwed and I doubt they test every unit to make sure everything is quality and working as it should. with so many parts the chances of a defect are greater.

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kev7112001
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February 07, 2013, 04:14:26 AM
 #13

What I would at least like to see in the next batches are better use of forcing air in the fins of the heatsinks especially when adding more modules.I bet it would decrease temps by 5 to 10 degrees which would allow better overclocking.It should also be a more push pull fan design since the module heatsink is so long.

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February 07, 2013, 04:27:10 AM
 #14

We found the vias to be inadequate to cool the QFN package during Bitcoin mining.  Under normal operations (e.g. anything not Bitcoin mining, with a toggle rate < 20%, so basically every other application on the planet) vias are more than adequate to dissipate the heat.  With bitcoin mining, the heat generation is much higher and sustained, so the heat starts spreading out into the ground and thermal planes, degrading (and possibly destroying) surrounding components after a long enough time scale.  Granted, our heat density is vastly greater than Avalon's density, so this is probably not nearly the issue it is with BFL's chips, so the cooling with via's are probably the right choice in this application.  

In short, the cooling method on the back side of the board is normal and expected with this type of design.  Adding a HSF to the top of the chip would solve any potential remaining issues if they exist(ed) I would imagine.


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kev7112001
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February 07, 2013, 04:29:09 AM
 #15

Also what happens when some of the chips fail will it continue running with the rest?

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February 07, 2013, 05:30:34 AM
 #16

What I would at least like to see in the next batches are better use of forcing air in the fins of the heatsinks especially when adding more modules.I bet it would decrease temps by 5 to 10 degrees which would allow better overclocking.It should also be a more push pull fan design since the module heatsink is so long.
I actually agree,

They should have probably have gone with a large 280mm+ fan assembly. (IMO only)

Edit: Push/pull would have been better than what they did. I have to agree. I wonder how it will fare in summer to be honest. Jeffs machine is having issues. Some say it is heat related and other say it isn't.

I wish the guy with the thermal imager (Aseras I think it was) would get his machine soon.


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February 07, 2013, 05:57:41 AM
 #17

A 280mm fan would have made the 4U (178mm) chassis way taller. Not good.
kev7112001
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February 07, 2013, 06:01:38 AM
 #18

Has anyone seen this http://techcrunch.com/2012/06/26/this-fanless-heatsink-is-the-next-generation-in-cpu-cooling/



http://www.youtube.com/watch?feature=player_embedded&v=JWQZNXEKkaU

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February 07, 2013, 06:12:16 AM
 #19

A 280mm fan would have made the 4U (178mm) chassis way taller. Not good.
Wrong direction. Like a computer case intake on the side.

http://www.newegg.com/Product/Product.aspx?Item=N82E16835705056


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February 07, 2013, 06:17:19 AM
 #20

We found the vias to be inadequate to cool the QFN package during Bitcoin mining.  Under normal operations (e.g. anything not Bitcoin mining, with a toggle rate < 20%, so basically every other application on the planet) vias are more than adequate to dissipate the heat.  With bitcoin mining, the heat generation is much higher and sustained, so the heat starts spreading out into the ground and thermal planes, degrading (and possibly destroying) surrounding components after a long enough time scale.  Granted, our heat density is vastly greater than Avalon's density, so this is probably not nearly the issue it is with BFL's chips, so the cooling with via's are probably the right choice in this application.  

In short, the cooling method on the back side of the board is normal and expected with this type of design.  Adding a HSF to the top of the chip would solve any potential remaining issues if they exist(ed) I would imagine.



It is extremely POOR PCB design practice to attempt to use VIAS for cooling, one only has to take a look DOWN the via to see why......

Plus I fail to see how something only a few micons thick could be expected to 'cool'  a large thermal load, thankfully BFL saw through this particular alchemists fantacy.

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