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Author Topic: BFL: Bumping is done, chips going to packaging tomorrow  (Read 1093 times)
ralree (OP)
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March 02, 2013, 03:35:25 AM
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https://forums.butterflylabs.com/bfl-forum-miscellaneous/1176-february-28th-update-discussion-2.html#post16618


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March 02, 2013, 03:44:25 AM
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You seem a little to optimistic. If the past is any indication, it will take them at least 2 months to get through the rest of the list.     




   Week of January 13th
        Travel to packaging facility for final prep and walkthrough
        Confirm travel plans and trip details with lead ASIC engineer for trip to fab

    Week of January 20th
        Final assembly facility prep
        Leave for fab at the end of the week

    Week of January 26th
        Final chips roll off the line
        Grab suitcase, a BMW or a Peugeot and make a break for the airport, Ronin style (You can see Tom about 6 minutes, 20 seconds into the video)
        Arrive California at chip packaging plant
        KC facility starts assembly process of units to drop PCB into

    Week of February 3rd
        Chips packaged
        Packaged chips sent to assembly house
        Assembled PCB is set for final testing and MCU programming
        Notify users to start sending their FPGA units or BTC for trade in participants
        Bulk assembled PCBs arrive in KC, we start dropping PCBs into waiting units
        Boxing/labeling for shipment

    Week of February 10th
        We implement the 1/3 shipping plan en mass
            1/3 of our assembled units will go to new orders in FIFO
            1/3 of our assembled units will go to upgrade orders
            1/3 will be randomly selected from both groups

        We descend upon the Post Office, DHL, UPS and FedEx like a horde of angry locust
ralree (OP)
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March 02, 2013, 03:45:12 AM
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You seem a little to optimistic. If the past is any indication, it will take them at least 2 months to get through the rest of the list.      




   Week of January 13th
        Travel to packaging facility for final prep and walkthrough
        Confirm travel plans and trip details with lead ASIC engineer for trip to fab

    Week of January 20th
        Final assembly facility prep
        Leave for fab at the end of the week

    Week of January 26th
        Final chips roll off the line
        Grab suitcase, a BMW or a Peugeot and make a break for the airport, Ronin style (You can see Tom about 6 minutes, 20 seconds into the video)
        Arrive California at chip packaging plant
        KC facility starts assembly process of units to drop PCB into

    Week of February 3rd
        Chips packaged
        Packaged chips sent to assembly house
        Assembled PCB is set for final testing and MCU programming
        Notify users to start sending their FPGA units or BTC for trade in participants
        Bulk assembled PCBs arrive in KC, we start dropping PCBs into waiting units
        Boxing/labeling for shipment

    Week of February 10th
        We implement the 1/3 shipping plan en mass
            1/3 of our assembled units will go to new orders in FIFO
            1/3 of our assembled units will go to upgrade orders
            1/3 will be randomly selected from both groups

        We descend upon the Post Office, DHL, UPS and FedEx like a horde of angry locust

Well at least the only other game in town can't even ship anything outside of China for less than $400, so there's that.  Oh and their products seem like they have some real issues (see the "my 2 avalons stopped working" thread).  The hardest parts are nearly over - I can understand the R&D taking much longer than their initial estimated times, but slamming things into boxes is a little harder to screw up.  

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March 02, 2013, 05:03:51 AM
 #4

Wonder why Chicago was never mentioned in that original to-do list. It's proven now to be a vital step, yet nada a word.
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