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Author Topic: Crowd funded ASIC miner device  (Read 4851 times)
mobodick
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April 01, 2013, 04:23:55 PM
 #21


I can imagine that, since the SHA256 algorith used in bitcoin is pretty well defined, that pooping out RTLs won't be very hard. I think that the functional design cannot become much more optimized than it is now.
The only place where you will be able to compete is at the physical design stage.


You are right about that, physical optimization will bring such an ASIC to a better performance vs. actual miners. But that is true only when using the same node as the other manufacturer (I consider Avalon the only at this moment!).

In this project we can use smaller technology node, and as more people fund this project the better will be the ASIC.


You can have a lot of advantages over the current market offer: small price, miner performance, eliminate the possibility of the manufacturer mining in the backyard etc. What other proposal can be better than this when I have no money to do this project? OK, maybe another person with an ASIC background, but the funding scheme is good I think.

This is what i actually mean by physical design.
The only way to get better than competition is to win on the physical part, no matter the node.
Everyone will converge to current node technology so this win will decrease in the future.

In a year other ASICS will be on the market baked with smaller masks. You will need to make sure now that you will be on top then because otherwise your (or in this case, our) investment will go down the drain.

This is why i'm very sceptical about crowd funding someone who can't guarantee a certain product in a year.
This project looks way too risky unless you already have a complete plan on what you need to achieve in your product a year from now.

toffoo
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April 01, 2013, 05:57:44 PM
 #22

I think you could argue that ASICMINER was "crowdfunded", and successful, so there you go.  Best of luck with the project.

ProfMac
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April 03, 2013, 03:58:32 PM
 #23

@tbd: really I optimized the existing open source code to be able to squeeze two fully unrolled SHA256d cores in one big FPGA. About the ASIC: the chip is the expensive and the most time consuming part of the project and as I propose that the public fund the project I think is miners what they want and not chips.

@witherworth: there is no company. With me everything must start from zero as that is exactly what I have in terms of money. I know that the community lost money and hopes as many failed to keep their promises but I cannot do anything without your financial support. And also any technical support will be welcomed.

Here is one of the two rigs: under each heatsink there is one Virtex 6. The green PCB next to each heatsink is a power supply with 25A@1V for the FPGA core. One level below the top you can see a Digilent Nexys3 board. That board acts as a remote (over TCP) multiple serial port. Hope you enjoy.

I'm trying to grok this.

Are there a total of 36 Virtex 6 devices in your 2 rig farm?

Is this 20 GH/s / 36 Virtex 6 = 500 MH/s per Virtex 6

Producing perhaps 1.5 BTC / day



I try to be respectful and informed.
lame.duck
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April 03, 2013, 06:53:36 PM
 #24

Can you post  a picture of pcb with the  Virtex6 on it without the heatsink please. Frankly, i doubt it will work to have 25A @ 1V over  a cable connection for a device with high speed switching. Also the 'power supply boards' look for me like some random surplus boards.
bitfreak91 (OP)
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April 07, 2013, 04:44:36 PM
 #25

Can you post  a picture of pcb with the  Virtex6 on it without the heatsink please. Frankly, i doubt it will work to have 25A @ 1V over  a cable connection for a device with high speed switching. Also the 'power supply boards' look for me like some random surplus boards.

I will not post anymore photo. Believe what you want but I will give you technical details. The green board is capable of delivering 30A and because of those cable that you mention the voltage that reaches the FPGAs is 0.90-0.91 V (read using the JTAG). So because of those cables and high current voltage drops but even so the FPGAs work stable. Yes I know, the minimum voltage specified in the FPGA's documentation is 0.95V but they are still stable at 0.90V. About the high speed switching again there is no problem: the FPGA board has it's own capacitors for DC filtering. If you have EE background/knowledge I guess you understand all this.
bitfreak91 (OP)
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April 07, 2013, 04:50:29 PM
 #26

I'm trying to grok this.

Are there a total of 36 Virtex 6 devices in your 2 rig farm?

Is this 20 GH/s / 36 Virtex 6 = 500 MH/s per Virtex 6

Producing perhaps 1.5 BTC / day

You are right sir. To be more accurate each FPGA has two fully unrolled SHA256d cores working at 300MHz. That is 600MHash/s/FPGA and the total hashrate is nearing to 21.6MHash/s.

With the last diff increase I am getting around ~1.3BTC/day.
wtman
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April 10, 2013, 05:02:00 AM
 #27

I'm trying to grok this.

Are there a total of 36 Virtex 6 devices in your 2 rig farm?

Is this 20 GH/s / 36 Virtex 6 = 500 MH/s per Virtex 6

Producing perhaps 1.5 BTC / day

You are right sir. To be more accurate each FPGA has two fully unrolled SHA256d cores working at 300MHz. That is 600MHash/s/FPGA and the total hashrate is nearing to 21.6MHash/s.

With the last diff increase I am getting around ~1.3BTC/day.

What did your 2 rig farm cost?

Also, mind telling which country you are based in? I am in India

You can pm me
lame.duck
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April 10, 2013, 01:37:25 PM
 #28

Can you post  a picture of pcb with the  Virtex6 on it without the heatsink please. Frankly, i doubt it will work to have 25A @ 1V over  a cable connection for a device with high speed switching. Also the 'power supply boards' look for me like some random surplus boards.

I will not post anymore photo.

I am not surprised.

Believe what you want but I will give you technical details. The green board is capable of delivering 30A and because of those cable that you mention the voltage that reaches the FPGAs is 0.90-0.91 V (read using the JTAG). So because of those cables and high current voltage drops but even so the FPGAs work stable. Yes I know, the minimum voltage specified in the FPGA's documentation is 0.95V but they are still stable at 0.90V. About the high speed switching again there is no problem: the FPGA board has it's own capacitors for DC filtering. If you have EE background/knowledge I guess you understand all this.

What a lot  of Buzzword bingo in the EE flavor.

What about those  Power supply modules, i wonder  where the high current connectors are? Have you ever seens the connectors on the mod miner? And the were only for less that the half current. Not to  talk about the inductance of the power cable. And in combinations with  the  2 high current switching devices it would give the funniest results rather than a stable power supply.

And then just for curiosity, how do you read the voltage level over jtag?

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