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Author Topic: [CANCELLED] Project Caterpillar - Open Source 3RU DIY ASIC Miner  (Read 17140 times)
RushGPU
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May 29, 2013, 01:23:29 PM
 #21

Who needs a logo?  Cool

http://i.imgur.com/Yc164xB.png
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AvenG
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May 29, 2013, 08:30:43 PM
 #22

very interested in your 108GH/s unit.

watching
daemondazz
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May 30, 2013, 02:36:24 AM
 #23

Who needs a logo?  Cool



Simple, but very cool! I like it.

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May 31, 2013, 11:37:32 AM
 #24

Who needs a logo?  Cool

http://i.imgur.com/Yc164xB.png

Simple, but very cool! I like it.

Thanks!

I'll PM you the vector if you want to use it.
stripykitteh
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June 03, 2013, 02:40:28 AM
 #25

visio versions of the backplane and tray diagrams have been updated on the site:




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June 03, 2013, 11:07:09 AM
 #26

Hi,

Can I leave a suggestion to better optimize the cooling design compared to Avalon's boards?

I'm not very familiar with the packaging used on the chips but usually if they are not flipped chip, like BFL ASIC, you can still cool them better by having the heatsinks on top of the chips instead of cooling through the PCB. For instance:

https://bitcointalk.org/index.php?topic=212090.0

In this thread one can see the Avalon's cooling system wasn't exactly well applied (I would call it a disgrace) and improving the thermal transfer yielded no more than a couple of ºC improvement - the PCB can only transmit enough heat.

There seems to be some amount of disinformation on the thread about what temps the chips can withstand, quoting Yufi Guo at 100ºC. This is nonsense. The chips can and will work at that temperature but the metal fatigue will be very high and the chips will no doubt fail a lot sooner than they are expected to. Then there's problems like thermal cycles in lead free solder which compound or may be the may cause of problems.

Hope to keep hearing back from this project. Very interested in rack mount devices.
daemondazz
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June 03, 2013, 11:41:42 PM
 #27

There is an air-gap inside the chip packaging, so heatsinks on top will not provide any benefit, and according to Avalon will actually reduce the cooling performace. There is a thermal pad underneath the chip, which gets soldered to the PCB along with the contacts and then vias conduct the heat through the board to the heatsink on the opposite site. There's quite a reasonable discussion BkkCoin's Klondike thread about this.

We definitely plan on applying thermal paste correctly Smiley

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daemondazz
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June 03, 2013, 11:43:11 PM
 #28

By the way, thanks to @dancoin for the Visio diagrams.

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fasmax
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June 05, 2013, 04:11:48 AM
 #29

Nice!
I like the idea of using a CPLD for the Avalon protocol interface.
stripykitteh
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June 05, 2013, 07:19:43 AM
 #30

Nice!
I like the idea of using a CPLD for the Avalon protocol interface.

Yes, we are currently trying to figure out a good choice for the CPLD. The trick will be to find something with enough gates for the logic, that is still cheaper than an FPGA.

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daemondazz
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June 06, 2013, 04:12:28 AM
 #31

Updated the first post with the project website link and also a call for assistance from someone experience with FPGAs or CPLDs.

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June 06, 2013, 06:29:38 PM
 #32

Updated the first post with the project website link and also a call for assistance from someone experience with FPGAs or CPLDs.

I wonder if some of those guys could help: https://bitcointalk.org/index.php?topic=9047 - might be worth posting a note there

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June 07, 2013, 12:42:53 AM
 #33

Sample Avalon 'chip' received  Wink

http://imgur.com/a/3MWlF

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daemondazz
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June 07, 2013, 12:44:50 AM
 #34

I wonder if some of those guys could help: https://bitcointalk.org/index.php?topic=9047 - might be worth posting a note there

Thanks for the link, I'll have a browse through that thread shortly.

Sample Avalon 'chip' received  Wink

http://imgur.com/a/3MWlF

Yep, should be delicious! Wink

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daemondazz
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June 07, 2013, 05:09:20 AM
 #35

Updated first post. PDF of the ASIC part of the schematic has been uploaded to the website. It's still pretty rough, ie, the components have not been numbered as yet and won't be until the rest of the tray schematic is complete.

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June 07, 2013, 03:53:20 PM
 #36

There is an air-gap inside the chip packaging, so heatsinks on top will not provide any benefit, and according to Avalon will actually reduce the cooling performace. There is a thermal pad underneath the chip, which gets soldered to the PCB along with the contacts and then vias conduct the heat through the board to the heatsink on the opposite site. There's quite a reasonable discussion BkkCoin's Klondike thread about this.

We definitely plan on applying thermal paste correctly Smiley


Thanks. I read the thread and found what you mentioned. Seems a poor way to cool the chip but maybe they also didn't built the cooling into the PCB thing that well one could say, by looking at the temperatures posted by users.

Here is hoping you can come up with something better Smiley
Charles999
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June 07, 2013, 03:57:42 PM
 #37

Looking good.. I'll be a customoer
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June 08, 2013, 08:18:58 AM
 #38

[IMPORTANT UPDATE]

As an update, we have applied here to be an alpha-tester for bitfury's newly fabbed 65nm chips:

https://bitcointalk.org/index.php?topic=228677.msg2407907#msg2407907

This is an exciting development for us, especially as like everyone else we are waiting on Avalon chip samples from zefir (we have chips in zefir batches #2 and #4, and more chips in SebastianJu's batch #2).

I (stripykitteh) have been following Bitfury's progress over the last couple of months and I have increasing confidence that his chips will work and set new performance benchmarks in SHA256 ASICs; in fact I've pre-ordered one of the 120GH/s miners metabank.ru from BitCentury (I ordered one within a few hours of their thread going up):

https://bitcointalk.org/index.php?topic=226846.0

Bitfury may independently decide who to allocate chips to; however he has raised the possibility of a forum poll to decide. If the poll eventuates we will definitely post instructions on how to find the poll and vote for us.  Smiley

At this stage if we do obtain bitfury's chips, after we participate in the alpha testing program we would adapt them into our 'larvae' trays, probably either 8 or 16 4 chips per tray (20GH/s per tray). A fully populated 3RU miner could do 320GH/s; which is certainly impressive by today's standards. Daemondazz has already taken a preliminary look at bitfury's specs and expects we can simplify the tray design a fair bit (no CPLD required). We'd need a 500MHz clock instead of 32MHz, but apart from that we can't foresee any new technical hurdles to leap.

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zefir
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June 09, 2013, 11:37:05 AM
 #39

Cross-post in all threads of projects that are registered for Avalon sample chips from my order.

Delivery of sample chips seems to have started.

If you have chips ordered with me that you want to support this project with, do it now.

If you are the owner of this project, please provide me your shipping address.


Find the details here.

daemondazz
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June 09, 2013, 02:32:18 PM
 #40

If you are the owner of this project, please provide me your shipping address.

stripykitteh has done this. Thanks.

If you have chips ordered with me that you want to support this project with, do it now.

If anyone else is able to pledge support for us, we'd greatly appreciate it!

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