Building FPGA miners?

[StrawHat]

I've been doing quite a bit of reading for the past couple of days, and from my understanding, CPU and GPU mining are pretty much obsolete in the face of FPGAs and ASICs. With that, these threads popped out to me the most:

https://bitcointalk.org/index.php?topic=44891.0 <--- Low cost DIY FPGA Miner by rph

https://bitcointalk.org/index.php?topic=8987.0 <--- Cost efficient mining hardware by cypherf0x

https://bitcointalk.org/index.php?topic=45532 <--- Minimalist Spartan6-LX150 Board by eldentyrell

Before anyone tells me not to proceed with any FPGA projects for bitcoin mining, I just want to say that this is more for nerd-type fun than profit or breaking even. If I do end up earning a profit though, that's cool too. 

While I have enough programming experience to be able to learn more complex programming logic along the way, I have very little experience or knowledge when it comes to custom hardware (FPGA, ASIC, etc). So I was completely lost when I was going through those three threads that I read. I guess my very first question is what do I need to start building a minimalist FPGA miner?

Cypherf0x's cost efficient method is interesting, but it looks like there are some necessary details cut out to be able to start building miner hardware with the crypto-chips that he mentioned. Not sure how many of those chips are able to stack on a single board either.

I've been doing my research, but it's starting to get to the point where I need some guidance and be sent towards the right direction. I have a feeling that my thread is going to be buried in the pile of numerous other newbie threads, so I'm going to post this again (if needed) in one of the proper sections of the forum.

[1715586285]

1715586285

[StrawHat]

I sort of expected my thread to get buried. I didn't see anything about bumping being against the rules, so here's my fourth post. I'll bump my thread once more if it gets buried, and then head on over to the proper forum section.

[perseus]

You don't need much. 

You need:

- a board (see Digilent, for instance)
- Xilinx or Altera software that maps verilog/vhdl to FPGA, depending on which board you have
- software to communicate with the board, presumably you can reuse something somebody has posted
- verilog code for a miner. This is available as well, on the web. There are both Xilinx and Altera versions.

The Xilinx/Altera software can generally be expensive, so you want to make sure that the part you are using is supported by the demo version that is available off of their websites. Or, sometimes, the board is bundled with the software.

Probably, you would want to clone somebody's existing setup, and then you can incrementally modify it to your liking, learn Verilog, etc.

[StrawHat]

Ah okay, I was a bit perplexed because eldentyrell was talking about capacitors, clock crystal, and whatever else that I've little understanding of in his thread.

So how exactly do you calculate the MHash/s for a FPGA board? It seems like a lot of members are just throwing out random specifications, but I guess it's from experimental data and not from a theoretical perspective. Though if there is some kind of formula that would allow me to estimate the MHash/s of a FPGA board, I would like to know. 

[perseus]

Measurement is always more valuable than estimates. One of the issues with FPGAs is that the theoretical performance can be quite high; but the boards are not built to supply that much current to the FPGA, so you do not hit the theoretical max. Although there are estimation tools for power, they are going to be at the chip level and not at the board level. So for instance, maybe you can cram 2.5 BTC miner cores that produce one hash per cycle on an FPGA and run it at 100 MHz. Then you have 250 MH/sec. If you hand-place the LUTS you might get to 200 MHz. Then you have 500 MH/s. But probably it will draw too much power for a standard FPGA demo board like on the digilent site.

The custom FPGA miners that you see have been designed with these power limits in mind.  But for playing around, I think a commodity board is a good way to go -- you can repurpose or resell it.

[LogicalUnit]

You don't need much. 

You need:

- a board (see Digilent, for instance)
- Xilinx or Altera software that maps verilog/vhdl to FPGA, depending on which board you have
- software to communicate with the board, presumably you can reuse something somebody has posted
- verilog code for a miner. This is available as well, on the web. There are both Xilinx and Altera versions.

The Xilinx/Altera software can generally be expensive, so you want to make sure that the part you are using is supported by the demo version that is available off of their websites. Or, sometimes, the board is bundled with the software.

Probably, you would want to clone somebody's existing setup, and then you can incrementally modify it to your liking, learn Verilog, etc.

Can someone please elaborate on this? What is the software used to communicate with the board, and where can I get it?

[LogicalUnit]

Okay, I've found the python script included with the Xilinx port, which I believe is what you run on your linux platform connected to the FPGA. I've updated the .ucf file to match my Diligent Spartan 3E Starter Board (clock and RS232 ports), and I am now downloading ISE web pack. It was actually hard to find WebPack as Xilinx is now using something called Vivado which didn't provide any settings for my board. I'm planning to program the board from my Windows PC, and then connect it to my RPi via a RS232-USB adapter.