Bitcoin Forum
March 29, 2024, 09:18:06 AM *
News: Latest Bitcoin Core release: 26.0 [Torrent]
 
   Home   Help Search Login Register More  
Pages: [1] 2 »  All
  Print  
Author Topic: Intro: U.S.-based ASIC design group w/ patent on reducing electrical consumption  (Read 1496 times)
cointastical (OP)
Newbie
*
Offline Offline

Activity: 22
Merit: 4


View Profile
December 07, 2017, 06:54:22 PM
 #1

3B Technologies (St. Louis Park, Minnesota, US) is a team building ASICs using their patented technology that allows hashing to occur with less electrical consumption. Their first ASIC will be SHA-256 (for Cryptotech), with plans to enter X-11, Scrypt and perhaps other mining algos at a later time.

Quote
Cryptotech’s novel unipolar logic only utilizes one type of transistor – either NMOS or PMOS only.

In the case of silicon circuits, NMOS only is chosen for its much higher mobility compared to PMOS.

Manufacturing costs are lower since the fabrication is simplified (no need for doping of PMOS transistors).

- Technology: http://www.cryptotech.no/elements/pages/our-stores/
- Team: http://www.cryptotech.no/elements/pages/about/

1711703886
Hero Member
*
Offline Offline

Posts: 1711703886

View Profile Personal Message (Offline)

Ignore
1711703886
Reply with quote  #2

1711703886
Report to moderator
Advertised sites are not endorsed by the Bitcoin Forum. They may be unsafe, untrustworthy, or illegal in your jurisdiction.
1711703886
Hero Member
*
Offline Offline

Posts: 1711703886

View Profile Personal Message (Offline)

Ignore
1711703886
Reply with quote  #2

1711703886
Report to moderator
1711703886
Hero Member
*
Offline Offline

Posts: 1711703886

View Profile Personal Message (Offline)

Ignore
1711703886
Reply with quote  #2

1711703886
Report to moderator
cableiso
Sr. Member
****
Offline Offline

Activity: 244
Merit: 280


View Profile
December 08, 2017, 04:02:58 AM
Merited by frodocooper (1)
 #2

1971 called and they want their depletion loaded common source inverter back.

50% cheaper, oh and we're going to run on an soi process.  So by 50% cheaper we mean 50% cheaper than other soi processes, which means 3x the cost of p-type silicon wafer processes.

And we don't need pact implant!  Don't mention that it will cost you more to take pact/pdd/pvt out of a standard cmos process than you would gain by dropping, what, 3 masks out of 18?  Thermal budgets are a thing.

And who's going to fab this custom process for you, VIS?  UMC? TSMC dropping everything to make you one lot a month?  Not likely.

You have one engineer who seems to have his shit together, no process guys and two marketing guys.  That's a pretty bad ratio of people who know why your idea won't work to people who buzzword synergy all day long.

Your tech pitch smells like bullshit, would you mind posting the links to your patents that seem to be absent from your site before you pitch your ICO?

Hugs and kisses!

sidehack
Legendary
*
Offline Offline

Activity: 3304
Merit: 1838

Curmudgeonly hardware guy


View Profile
December 08, 2017, 04:08:32 AM
 #3

I was waitng for NotFuzzyWarm to weigh in, but that was pretty good too.

Cool, quiet and up to 1TH pod miner, on sale now!
Currently in development - 200+GH USB stick; 6TH volt-adjustable S1/3/5 upgrade kit
Server PSU interface boards and cables. USB and small-scale miners. Hardware hosting, advice and odd-jobs. Supporting the home miner community since 2013 - http://www.gekkoscience.com
bit_wizard
Sr. Member
****
Offline Offline

Activity: 314
Merit: 250


View Profile
December 08, 2017, 04:10:33 AM
 #4

Send me a miner when its ready, I'll pay for it and make a review.
cointastical (OP)
Newbie
*
Offline Offline

Activity: 22
Merit: 4


View Profile
December 08, 2017, 10:18:17 AM
Last edit: December 08, 2017, 10:31:26 AM by cointastical
 #5

Video with more on the technology and background on the team:

- https://www.youtube.com/watch?v=C75VvJ980Ko&t=746

Transcript:

Tom: "I just want to share a little bit of the excitement we have around using Unipolar technology to solve in Bitcoin minng."

"We started work on Unipolar to see if we could come up with a way of using just N-Channel transistors instead of both N-Channel and P-Channel as normally what is used in CMOS."

"So I came up with a circuit.  We started simulating that circuit in SPICE with a variety of technologies. We wanted to see if we could generate the benefits of using just one kind of transistor.  After we simulated it we made several observations about our results.  The first was that fewer transistors were required, particularly for complex gates.  So that meant that the area could be reduced a little bit because we don't need such a large area when there are fewer transisters.  Then we noticed with a smaller area the metal line links would be reduced.  Now metal lines are currently, in state-of-the-art technologies, the biggest factor for delay.  And [a smaller area] can speed things up quite a bit. Further it reduces the amount of power because each line is shorter and needs less charge to charge it up or to discharge."  

"So there's a reduced load on each signal.  We noticed that with transistors you don't have to go to both the P and N transisters you can go with just one type of transistor, the N-Channel. So that cuts the load in half. So that's a very significant reduced loading on every signal.  We continued doing simulations and found that there was a reduced voltage swing retired.  With CMOS you have to go rail-to-rail.  With Unipolar you have to go over the threshold a little bit and back under the threshold a little bit. So all you need is a design margin around the thresholdd.   Further we noticed, when we started putting this together in a whole system, that the clock frequency, for an apples-to-apples comparison of the circuits, can be increased by at least 10X."

"Then we looked at how much power, if you roll all these factors together, how much power we can have.  One other thing we noticed is that a lot of the circuitry can be eliminted.  We don't need all of the gates you would ordinarily need for CMOS and circuitry.  We can get by with about 70% less.  So we only need about 30% of the circuitry.  So with 30% of the circuitry, reduced metal lines, reduced loading -- we come up, generally speaking, expecting 20% of the power that would typically be required for Bitcoin Mining.  Now in Bitcoin Mining one of the biggest issues is how much power it takes to do any given hash and this is going to cut that power by over 80%."

Erik: "We are currently planning to build the world's largest Bitcoin mining facility in Norway.  This is a 150 megawatt facility, which is an enormous amount of energy.  The electricity is already installed in the building, ready to plug in our miners once they are operational. Since our miners are 80% more power efficieant, it means that in our single facility we will be mining Bitcoins equivalent to a 750 megawatt facility, which gives us a tremendous competitive advantage just in energy savings."

"This is why we can offer you a token with the hash power that we are offering at such a low price, with no strings attached.  This is what you pay, no maintenance fees, and no extra or hidden costs."

Post on /r/BitcoinMining:

- https://www.reddit.com/r/BitcoinMining/comments/7idxqc
NotFuzzyWarm
Legendary
*
Offline Offline

Activity: 3584
Merit: 2482


Evil beware: We have waffles!


View Profile
December 08, 2017, 03:16:25 PM
Merited by frodocooper (1)
 #6

Quote
Your tech pitch smells like bullshit, would you mind posting the links to your patents that seem to be absent from your site before you pitch your ICO?
Exactly.
Quote
With CMOS you have to go rail-to-rail.  With Unipolar you have to go over the threshold a little bit and back under the threshold a little bit. So all you need is a design margin around the threshold.
Rail-to-rail allows for a clearly defined data eye without being too concerned about the actual switching thresholds of the gates vs temp. Yes it is a brute-force approach but it works very well without having to closely monitor/actively control bias currents vs temps.

Just how do your unipolar circuits handle the very wide range of switching thresholds you will see as chips change temps? Oh, that's right -- it would be a point in your patents. Again -- link to it please?

Oh btw, this belongs in Mining Speculation. Mod has been notified so expect it to be moved.

- For bitcoin to succeed the community must police itself -    My info useful? Donations welcome! 1FuzzyWc2J8TMqeUQZ8yjE43Rwr7K3cxs9
 -Sole remaining active developer of cgminer, Kano's repo is here
-Support Sidehacks miner development. Donations to:   1BURGERAXHH6Yi6LRybRJK7ybEm5m5HwTr
cableiso
Sr. Member
****
Offline Offline

Activity: 244
Merit: 280


View Profile
December 09, 2017, 02:44:44 AM
Last edit: December 09, 2017, 03:46:45 AM by cableiso
Merited by frodocooper (3)
 #7

Now metal lines are currently, in state-of-the-art technologies, the biggest factor for delay.  

The term "delay" here on earth has two components, R and C.  We consider the metal line to contribute some capacitance C along with the more significant input C of the next gate, and we consider R to be 1/gm of the device driving said capacitance.  I'll ignore metal resistance as your gm is going to be low so it will far outweigh Rmetal.  Now replacing an active PMOS device (that has transconductance) with a dummy load (which does not, but does have capacitance) is going to increase your RC time constant if I use earth math.  GM down = R up.  Rbigger*Cbigger = Tmuchbigger.  

Trying to toggle around Vth is just reducing swing, so it seems your plan may be to use slow devices but swing in a narrower range hoping for a speed boost?  As NotFuzzyWarm said, it will be a disaster over process and temperature corners - what you are doing is reducing noise margin, which may work in a simulation of a single flop but will be a catastrophic failure when you get some noise in the system.  

Also, WTF?  How are you going to keep the low end of the swing from going far below Vth with only NMOS?  The only answer is V=I*R, meaning that you draw some current though a low gm device so the total voltage when the pulldown is on is just slightly less than Vth.  That completely sucks!  You need high gm for speed, but that would mean you burn a shitload of DC current - just like 1971's depletion loaded common source logic as I mentioned before.  You cannot get a small swing on the low side without burning significant current or having low enough gm that the speed is crap.  This blows both your J/GH claim and your speed claim at the same time.  Your engineer should know better, maybe it's the marketing guys that are being taken for a ride here....?  Sorry to call you out bro, I'm guilty of the same from time to time lol.

OK, brass tacks time.  Try this.  Put 100k of your flops in a ripple counter configuration.  Tie each one's power supply and ground pins to the next with 20 milliOhm to simulate resistive drop in your metal lines.  I'm generously estimating your power rail metal as a big fat 2um run in a 20-50 nm process.  I'm OK with you tapping in higher metal every few thousand gates, but you can't cheat on via resistance.  50 Ohm/via at least.

Now take your 100k ripple counter and clock it at 1Ghz.  Take it's output and build yourself a simple compare - Xor is fine, but you've got to remember the supply resistances in this stage as well.  Compare the 1GHz counter with the output of a second counter running at a non-evenly divisible frequency, say 77MHz.  Then clock this compare result into one final register at 1GHz as well, and for extra points you'll want to buffer the clocks between the two counters - your real chip would be a big ass tree, so no ideal wires in the clock lines.

Tell me how many times you get a false match running at ~300mV noise margin.  The 2^N transitions on your fast ripple counter are going to demolish your rail, easily dropping 150-200mV and completely corrupting any noise margin you think you have, even at this tiny scale.  Then re-sim at 125C.

I'd love to see your sim traces if you don't mind posting them here, or show me a spectre run on youtube.  And post the patents.  Please realize I've backed off the pitchfork a bit here to help you show yourself why your pitch is not feasible.  Call the sand hill gang if you need VC money to waste, but don't try to take $100 bucks each from a bunch of people who can't properly dispute your bs.  We're used to scammers sniffing around looking for a money grab, I unfortunately see no evidence that your are not the same in a suit.





NotFuzzyWarm
Legendary
*
Offline Offline

Activity: 3584
Merit: 2482


Evil beware: We have waffles!


View Profile
December 09, 2017, 03:08:56 AM
Last edit: December 09, 2017, 03:19:32 AM by NotFuzzyWarm
 #8

Damn Sam! ^^^ Think we might have a new contender for the Not-so-fuzzy-warm club. A hearty Tip o' the Visor to ya on that.

- For bitcoin to succeed the community must police itself -    My info useful? Donations welcome! 1FuzzyWc2J8TMqeUQZ8yjE43Rwr7K3cxs9
 -Sole remaining active developer of cgminer, Kano's repo is here
-Support Sidehacks miner development. Donations to:   1BURGERAXHH6Yi6LRybRJK7ybEm5m5HwTr
cableiso
Sr. Member
****
Offline Offline

Activity: 244
Merit: 280


View Profile
December 09, 2017, 03:11:27 AM
 #9

Thanks, and glad to be a member.  I will rescind my comments if they are proven wrong, but I am really disappointed to see some BS like this.  Even BFL at least tried, this is total vaporware.
NotFuzzyWarm
Legendary
*
Offline Offline

Activity: 3584
Merit: 2482


Evil beware: We have waffles!


View Profile
December 09, 2017, 03:26:04 AM
Last edit: December 12, 2017, 01:08:30 AM by NotFuzzyWarm
 #10

If Robert Pease was still with us his response to your very correct view on SPICE and other simulators -
SPICE et al are great for knocking out ideas but as you noted pretty much ignore Real World effects. Start quantifying those you can think of then plug into the sims and things go south very quickly... And that is a good thing - provides a Reality Check so you can design around them. Then there is the matter of effects that didn't occur to you or in the case of ones you did think of the dual-edged sword of either over or underestimating their values. Such fun.

- For bitcoin to succeed the community must police itself -    My info useful? Donations welcome! 1FuzzyWc2J8TMqeUQZ8yjE43Rwr7K3cxs9
 -Sole remaining active developer of cgminer, Kano's repo is here
-Support Sidehacks miner development. Donations to:   1BURGERAXHH6Yi6LRybRJK7ybEm5m5HwTr
cableiso
Sr. Member
****
Offline Offline

Activity: 244
Merit: 280


View Profile
December 09, 2017, 03:39:11 AM
 #11

Famous last words:  "But it works in simulation!"

VRobb
Hero Member
*****
Offline Offline

Activity: 1610
Merit: 538

I'm in BTC XTC


View Profile
December 09, 2017, 05:40:51 AM
 #12

Bob pease, RIP.

I don't believe in superstition because it's bad luck: 13thF1oor6CAwyzyxXPNnRvu3nhhYeqZdc
These aren't the Droids you're looking for: S5 & S7 (Sold), R4B2, R4B4 (RIP), 2x S9 obsolete, 2xS15-28, S17-56, S17-70
Pushing a whopping 1/5 PH!  Oh The SPEED!!!
NotFuzzyWarm
Legendary
*
Offline Offline

Activity: 3584
Merit: 2482


Evil beware: We have waffles!


View Profile
December 10, 2017, 12:48:33 AM
Last edit: February 24, 2018, 12:10:24 AM by NotFuzzyWarm
 #13

Bob pease, RIP.
Ja. Losing both him and Jim Williams so close together was a huge loss to the electronics design world. At least their articles live on in the archives of Electronic Design and a few books. Frankly most of them should be required reading for all EE's in training. Especially the one behind this 'revolutionary Patented' idea.

- For bitcoin to succeed the community must police itself -    My info useful? Donations welcome! 1FuzzyWc2J8TMqeUQZ8yjE43Rwr7K3cxs9
 -Sole remaining active developer of cgminer, Kano's repo is here
-Support Sidehacks miner development. Donations to:   1BURGERAXHH6Yi6LRybRJK7ybEm5m5HwTr
QuintLeo
Legendary
*
Offline Offline

Activity: 1498
Merit: 1030


View Profile
December 10, 2017, 08:57:48 PM
 #14


Erik: "We are currently planning to build the world's largest Bitcoin mining facility in Norway.  This is a 150 megawatt facility, which is an enormous amount of energy.  The electricity is already installed in the building, ready to plug in our miners once they are operational. Since our miners are 80% more power efficieant, it means that in our single facility we will be mining Bitcoins equivalent to a 750 megawatt facility, which gives us a tremendous competitive advantage just in energy savings."


 Are these folks related to, or part of, the moron group that bought out KNC and KEPT THE NAME?

 I can't remember offhand if the big KNC mining facility was in Norway or Sweden....


I'm no longer legendary just in my own mind!
Like something I said? Donations gratefully accepted. LYLnTKvLefz9izJFUvEGQEZzSkz34b3N6U (Litecoin)
1GYbjMTPdCuV7dci3iCUiaRrcNuaiQrVYY (Bitcoin)
2112
Legendary
*
Offline Offline

Activity: 2128
Merit: 1060



View Profile
December 11, 2017, 02:03:03 AM
 #15

OK, brass tacks time.  Try this.  Put 100k of your flops in a ripple counter configuration.  Tie each one's power supply and ground pins to the next with 20 milliOhm to simulate resistive drop in your metal lines.  I'm generously estimating your power rail metal as a big fat 2um run in a 20-50 nm process.  I'm OK with you tapping in higher metal every few thousand gates, but you can't cheat on via resistance.  50 Ohm/via at least.

Now take your 100k ripple counter and clock it at 1Ghz.  Take it's output and build yourself a simple compare - Xor is fine, but you've got to remember the supply resistances in this stage as well.  Compare the 1GHz counter with the output of a second counter running at a non-evenly divisible frequency, say 77MHz.  Then clock this compare result into one final register at 1GHz as well, and for extra points you'll want to buffer the clocks between the two counters - your real chip would be a big ass tree, so no ideal wires in the clock lines.

Tell me how many times you get a false match running at ~300mV noise margin.  The 2^N transitions on your fast ripple counter are going to demolish your rail, easily dropping 150-200mV and completely corrupting any noise margin you think you have, even at this tiny scale.  Then re-sim at 125C.
I'm curious: what are you trying to show?

100k flip-flops in ripple counter configuration? I presume that by ripple counter you mean "asynchronous divide-by-two counter". When connected serially that would be a divide by 2 to the 100,000 power. This doesn't make sense, most of the flip-flops would be constant during the lifetime of the universe.

Then what would that be? 100k of divide-by-two circuits in parallel? What for?

Then what is the the point of comparing two asynchronous counters clocked with two different clocks, each of which presumable registered and compared in parallel?

Could you please describe your benchmark design with less ambiguous language? Maybe something that could could be described with just fingers of one hand? And you can even assume that I have less than 5 fingers.

You've piqued my interest, but your use jargon is overwhelming to the point of sounding like baloney.

Thanks in advance.

Please comment, critique, criticize or ridicule BIP 2112: https://bitcointalk.org/index.php?topic=54382.0
Long-term mining prognosis: https://bitcointalk.org/index.php?topic=91101.0
HagssFIN
Legendary
*
Offline Offline

Activity: 2422
Merit: 1704


Electrical engineer. Mining since 2014.


View Profile WWW
December 11, 2017, 02:08:12 AM
 #16


Erik: "We are currently planning to build the world's largest Bitcoin mining facility in Norway.  This is a 150 megawatt facility, which is an enormous amount of energy.  The electricity is already installed in the building, ready to plug in our miners once they are operational. Since our miners are 80% more power efficieant, it means that in our single facility we will be mining Bitcoins equivalent to a 750 megawatt facility, which gives us a tremendous competitive advantage just in energy savings."


 Are these folks related to, or part of, the moron group that bought out KNC and KEPT THE NAME?

 I can't remember offhand if the big KNC mining facility was in Norway or Sweden....



KNCMiner mining facility was located in Boden, Sweden and the same facility is currently owned and operated by Canaan CreativeSmiley

QuintLeo
Legendary
*
Offline Offline

Activity: 1498
Merit: 1030


View Profile
December 11, 2017, 11:40:01 PM
 #17

Caanan didn't buy out all the assets of KNC though - they probably just leased or bought the facility itself when it came on the market during the KNC bankrupcy.

 8-)


I'm no longer legendary just in my own mind!
Like something I said? Donations gratefully accepted. LYLnTKvLefz9izJFUvEGQEZzSkz34b3N6U (Litecoin)
1GYbjMTPdCuV7dci3iCUiaRrcNuaiQrVYY (Bitcoin)
NotFuzzyWarm
Legendary
*
Offline Offline

Activity: 3584
Merit: 2482


Evil beware: We have waffles!


View Profile
December 11, 2017, 11:52:43 PM
 #18

Caanan didn't buy out all the assets of KNC though - they probably just leased or bought the facility itself when it came on the market during the KNC bankrupcy.
 8-)
One would hope to God that is the case. Safe bet any IP KnC has/had would be zero value these days.

- For bitcoin to succeed the community must police itself -    My info useful? Donations welcome! 1FuzzyWc2J8TMqeUQZ8yjE43Rwr7K3cxs9
 -Sole remaining active developer of cgminer, Kano's repo is here
-Support Sidehacks miner development. Donations to:   1BURGERAXHH6Yi6LRybRJK7ybEm5m5HwTr
cointastical (OP)
Newbie
*
Offline Offline

Activity: 22
Merit: 4


View Profile
February 23, 2018, 09:53:41 PM
 #19

Here is more information about the technology and company:

- https://docs.wixstatic.com/ugd/b454a1_c0652f38a20c438eb9ab474bab1878ba.pdf

3B’s novel Unipolar Logic Circuit (ULC) - advantages:
- Enables NMOS or PMOS logic as low as 50% of CMOS power consumption
- Enables simpler fabrication of circuits – only NMOS or PMOS transistors, thereby reducing fabrication cost
- Reduces transistor count compared to conventional CMOS logic, thereby increasing operational speed and reducing power consumption and fabrication cost of logic circuitry
- Enables higher clock speeds compared to conventional CMOS logic or other unipolar logic schemes
- High density < 20F2 novel vertical unipolar logic gates
- Circuit validated via simulation on IBM 500nm and 90nm CMOS process nodes
NotFuzzyWarm
Legendary
*
Offline Offline

Activity: 3584
Merit: 2482


Evil beware: We have waffles!


View Profile
February 24, 2018, 12:34:32 AM
Last edit: February 24, 2018, 01:44:03 AM by NotFuzzyWarm
 #20

Well thank you for providing a better PR link on the company. p.8 lists patents involved..

In your extrapolation of what the tech is and think it may offer to crypto mining you neglect to pay attention to one very salient point that is common to all of the Patents and the PR link info.
Namely this:
It is targeting applications that are inherently LOW POWER applications to begin with. eg. ones that generate little heat such as displays and NV memory on materials - even low conductivity ones like plastics - that given the very low power dissipation to begin with still offer enough thermal coupling to local ambient temps to not be too concerned with the shifting switching thresholds that come into play as semiconductor junctions vary in temp.

That does not translate into any device that is going to be dissipating more than around a few milliwatts/cm2 unless very significant thermal path is provided to remove that heat, even then the die temp rise is going to be very significant. For reason explained earlier in the thread, at best only by keeping the device at a fairly narrow stabilized temp range can it work at all.

- For bitcoin to succeed the community must police itself -    My info useful? Donations welcome! 1FuzzyWc2J8TMqeUQZ8yjE43Rwr7K3cxs9
 -Sole remaining active developer of cgminer, Kano's repo is here
-Support Sidehacks miner development. Donations to:   1BURGERAXHH6Yi6LRybRJK7ybEm5m5HwTr
Pages: [1] 2 »  All
  Print  
 
Jump to:  

Powered by MySQL Powered by PHP Powered by SMF 1.1.19 | SMF © 2006-2009, Simple Machines Valid XHTML 1.0! Valid CSS!