HashFast is an interesting and much aticipated idea but please tell precisely whats Your plan to send working product to clients at the end of October.
To me this plan looks like quite ambitious one. Slightly too ambitious? I dont see any place for errors and delays. None.
So we have known phases - please provide a list of actions with roughly dates.
To have working device we need to:
1. Design a chip : do You have final design, its valid/seems working etc.?
2. Produce Chip : ??Whats You timeline here
3. Design PCB : ??Whats You timeline here
4A. Assembly service : ??Whats You timeline here
4B. BOM - components preorder : ??Whats You timeline here
5. Create software or adapt existing one : ??Whats You timeline here
6. Design/Adapt Case : ??Whats You timeline here
7. Start shipping : 20-30 October
Above its a quick and dirty estimation of critical minestones of which each one have many intermediate steps. Of course some of them can be done in parallel.
Please provide Your estimations. This will show us how do you approach this project.
Agree - it certainly is an ambitious schedule. We have put a *lot* of thought into every way to optimize it, multi-source components and suppliers, have contingency plans in place for delays/surprises at any point, etc. Still, you are absolutely right - it is an operationally complex process under very tight timelines.
1) Yes, we do.
Our chip was taped-out to TSMC last month, as described in the joint press release we, Uniquify and TSMC put out about this. Prior to tape-out it passed all our physical and logical tests, and following that it passed all the design rule verification rules etc. that are part of the tape-in process. Currently it is under fabrication - we past design, well into manufacturing, and are exposing more mask layers every day or two. We get daily updates about it's progress, and track against them.
2) Complete silicon wafers will come out of TSMC in roughly 4 weeks. We would love to be able to release a *lot* more information about this, but we do need to be mindful of our NDA
What we can + will do is to post a basic explanation of the fabrication progress, how we track against it, etc. in the next few days. Unfortunately this will be far higher level and will -not- have anywhere near the level of granularity we have; we would **love** to do just that, and replace the noise about we are seeing in the market about hopes + aspirations with straightforward factual information, but our NDA with TSMC prevents us from doing just that.
3) Initial PCB design is complete (including both Gerbers and parts/sourcing selection)
We are currently finalizing it, optimizing for fabrication.
4A) Assembly service selection is completed. The steps are as follows;
- First wafers coming out of TSMC will be hand carried by from the TSMC to our substrate manufacturers
I'll see if I can get a picture of the airline-approved wafer carrying case we will use
- Chip substrate and packaging
We have contracted 2 separate companies (one low volume/very fast turnaround, the other huge volume/longer ramp-up)
Either one is capable of producing sufficient volume to package all chips sold to date
- PCB and power stage assembly
We have contracted a US-based specialized company for production of PCBs+low power stages for all chips sold to date.
- Final Assembly
We have contracted a specialize company to assemble the modules into working Baby Jets and Sierras, and ship them to our customer
via Fedex as soon as they are completed, following our published order # list.
4B) BOM complete, down to individual screws and stand-offs.
Components ordering well underway - that and shipping/logistics is the primary focus of our operations team right now
Also, prototype machines using precisely the same components as the final machines complete, assembled, and tested.
Re: testing, this includes completing stage III thermal performance tests; stage 1 was chip thermal emulation during the physical design stage of chip development, stage 2 was software thermal emulation of the finished machine, and stage III is inserting a controlable heating element of the same form factor as the chip package into a complete gold prototype, and measure how much heat the system can dissipate while remaining within operating temperatures.
The results of that test were very positive; the design goal for our GN chip was a cooling system able to dissipate 250W, at which level it will produce 400 GHash/s. The stage 3 test confirmed that the cooling system is able to dissipate significantly over 300W, which we believe will lead to significantly improved performance
5) Our chip has been running CGminer (and mining) for months now as an FPGA.
We have created high-quality drivers for the chip. We expect to have 3rd party confirmation of that fact out very shortly
6) We are not designing a custom case. Other than our chip and PCB/power stage we have not designed any other components, and intentionally so; the only way a system of this nature can be produced in this kind of time frame is to use existing standards-based parts as far as humanly possible. The goal is focus, focus, focus.
7) Correct.
Eduardo deCastro
Founder and CEO, HashFast
