Our BTC project is named as TMR (
http://www.tmr-asic.com/index_en.html), which comes from "The Miner". This project was started from the beginning of this year, and targeted on high efficiency Btcoin computation ASIC for, and distribution scheme of future computation power systems.
We had already completed the first-generation ASIC for Btcoin miner, which is based on one traditional and cheap 153nm CMOS process, with normal computation ability of 144MH/s, as some optimization had been done on RTL code. Actually, this first ASIC is used for verification and design experience for Btcoin computation ASIC, and the result is quite good, as listed below. These results will make good basis for coming next-generation full-speed Btcoin ASIC, and reduce the risk of high-cost and new CMOS process which will be used.
Since we make the first-generation ASIC based on low-cost CMOS process, so this price of these exited ASIC is still competitive enough to be build up as these miner machines.
Review of Our progress in this year:A. We completed preparation works at February, and started the ASIC design at March.
B. The front-end and back-end of ASIC design were completed before 26th, Apr.
C. The fabrication process was started in the foundry at 9th, May.
D. The first package of testing ASIC was delivered at 28th, Jun.
E. The functions of first ASIC have been tested completely, and a lot size of miner machines are in production period at 1st Aug.
F. We start to sell 2.2GH/s miners on TAOBAO.com at 16th, Aug. Now the customers have given a lot of positive feedbacks.
http://item.taobao.com/item.htm?spm=a230r.1.14.47.HFf7Uk&id=21969451511&initiative_new=1&initiative_new=1Test results of this ASIC is as below: A. The single ASIC works well, and running speed is 144MH/s.
B. The stage connection function of several miners works well.
C. The system software and hardware works well, and keeping in stable operation mode until now.
On-sale miners based on previous ASICA. Component: Each miner has sixteen pieces of TMR ASIC, with one board, one 9V supply, and one piece of USB connection.
B. Speed: theoretical speed as 2.3GH/s，and actual running speed is around 2.2GH/s (According to miner pool results)
C. Power consumption: around 26W
D. Interface: One USB port is used to connect with computer
E: Software: Special modified Cgminer software is provided.
F. Attachment: The router is provide to connect with TMR miner, so TMR miner can be mining without computer support.
G: Others: multi-miner operation mode is supported, then several TMR miners can be stage-connected to be one powerful miner with only one USB port.
Our merits: A. Our ASIC design targets on final system cost, so PCB boards are only requested to provide power supply, clock and one usb2uart interface. Based on these, multi ASIC modules can work together without any other peripheral circuits.
B. The stage-connection technology of several miners can been verified based on our existed platform.
C. The potential experience on high computation power distribution.
D. All team members are senior technicians and management with over ten years experience, and working together for almost ten years for one team, and several successful consumer electronics chips with KK level sales monthly.
E. Good relationship with financial market, as senior consultant from famous investment companies, banks and other fund companies.
We are working on: A. We will distribute computation power system widely, and preparation work of miner sales.
B. Optimization work for previous RTL design, and 40% area had been reduced for coming Full Mask production of the second-generation ASIC.
C. More funding are organized to complete the Full Mask production of coming second-generation ASIC.
Future objectives:A. To provide high efficiency miner hardware project.
B. To provide completely distribution scheme of miner computation power system.
http://www.tmr-asic.com/photo/org/work.jpg
