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Author Topic: [ANN][RIC] Riecoin: constellations POW *CPU* HARD FORK successful, world record  (Read 654541 times)
madMAx510510
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April 01, 2014, 04:29:05 PM
 #2681

  asm( "add.cc.u32 %0, %0, %1;" : "+r"(r[0]) : "r"(tasm));
   asm( "madc.hi.u32 %0, %1, %2, 0;" : "=r"(tasm) : "r"(op1[0*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "mad.lo.cc.u32 %0, %1, %2, %0;" : "+r"(r[0]) : "r"(op1[0*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "addc.u32 %0, %0, 0;" : "+r"(tasm));
   asm( "add.cc.u32 %0, %0, %1;" : "+r"(r[1]) : "r"(tasm));
   asm( "madc.hi.u32 %0, %1, %2, 0;" : "=r"(tasm) : "r"(op1[1*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "mad.lo.cc.u32 %0, %1, %2, %0;" : "+r"(r[1]) : "r"(op1[1*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "addc.u32 %0, %0, 0;" : "+r"(tasm));
   asm( "add.cc.u32 %0, %0, %1;" : "+r"(r[2]) : "r"(tasm));
   asm( "madc.hi.u32 %0, %1, %2, 0;" : "=r"(tasm) : "r"(op1[2*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "mad.lo.cc.u32 %0, %1, %2, %0;" : "+r"(r[2]) : "r"(op1[2*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "addc.u32 %0, %0, 0;" : "+r"(tasm));
   asm( "add.cc.u32 %0, %0, %1;" : "+r"(r[3]) : "r"(tasm));
   asm( "madc.hi.u32 %0, %1, %2, 0;" : "=r"(tasm) : "r"(op1[3*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "mad.lo.cc.u32 %0, %1, %2, %0;" : "+r"(r[3]) : "r"(op1[3*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "addc.u32 %0, %0, 0;" : "+r"(tasm));
   asm( "add.cc.u32 %0, %0, %1;" : "+r"(r[4]) : "r"(tasm));
   asm( "madc.hi.u32 %0, %1, %2, 0;" : "=r"(tasm) : "r"(op1[4*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "mad.lo.cc.u32 %0, %1, %2, %0;" : "+r"(r[4]) : "r"(op1[4*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "addc.u32 %0, %0, 0;" : "+r"(tasm));
   asm( "add.cc.u32 %0, %0, %1;" : "+r"(r[5]) : "r"(tasm));
   asm( "madc.hi.u32 %0, %1, %2, 0;" : "=r"(tasm) : "r"(op1[5*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "mad.lo.cc.u32 %0, %1, %2, %0;" : "+r"(r[5]) : "r"(op1[5*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "addc.u32 %0, %0, 0;" : "+r"(tasm));
   asm( "add.cc.u32 %0, %0, %1;" : "+r"(r[6]) : "r"(tasm));
   asm( "madc.hi.u32 %0, %1, %2, 0;" : "=r"(tasm) : "r"(op1[6*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "mad.lo.cc.u32 %0, %1, %2, %0;" : "+r"(r[6]) : "r"(op1[6*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "addc.u32 %0, %0, 0;" : "+r"(tasm));
   asm( "add.cc.u32 %0, %0, %1;" : "+r"(r[7]) : "r"(tasm));
   asm( "madc.hi.u32 %0, %1, %2, 0;" : "=r"(tasm) : "r"(op1[7*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "mad.lo.cc.u32 %0, %1, %2, %0;" : "+r"(r[7]) : "r"(op1[7*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "addc.u32 %0, %0, 0;" : "+r"(tasm));
   asm( "add.cc.u32 %0, %0, %1;" : "+r"(r[8]) : "r"(tasm));
   asm( "madc.hi.u32 %0, %1, %2, 0;" : "=r"(tasm) : "r"(op1[8*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "mad.lo.cc.u32 %0, %1, %2, %0;" : "+r"(r[8]) : "r"(op1[8*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "addc.u32 %0, %0, 0;" : "+r"(tasm));
   asm( "add.cc.u32 %0, %0, %1;" : "+r"(r[9]) : "r"(tasm));
   asm( "madc.hi.u32 %0, %1, %2, 0;" : "=r"(tasm) : "r"(op1[9*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "mad.lo.cc.u32 %0, %1, %2, %0;" : "+r"(r[9]) : "r"(op1[9*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "addc.u32 %0, %0, 0;" : "+r"(tasm));
   asm( "add.cc.u32 %0, %0, %1;" : "+r"(c0) : "r"(tasm) );
   asm( "addc.u32 %0, 0, 0;" : "=r"(c1));

I don't get why you have so many adds in there... especially when you have fancy mad.lo.cc.u32/mad.hi.cc.u32 instructions...
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northranger79510
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April 01, 2014, 05:35:50 PM
 #2682

Multi-Sigs have been verified that it works and foundation will be open for donations later today.

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April 01, 2014, 05:44:35 PM
 #2683

I've compiled custom build(windows 64bit) from jh00 xptminer and dga ric core with gmp 6.0.0(not mpir) and avx-i support (Ivy Bridge processors only).

Build include 1% devfee (hardcoded).

Don't you find it a little odd to rip out someone's existing dev fee when there's a mechanism in there to add your own to the stack and ensure that all of the developers continue to have an incentive to work on the software?  I do.  So:

There's now an official build for Windows 64bit against gmp 6.0.0a with avx support at:

http://www.cs.cmu.edu/~dga/crypto/ric/

Along with the existing sse4 version.  I've automated the build for this platform and will continue to maintain it through future releases.  At the same time, I've also added an avx version for Linux.  These have my standard dev fee structure - 2% default (1.5% to me, 0.25% jh00, 0.25% clintar), and you can increase or decrease it from the command line or in the source code as you wish.



Any chance to have the AVX2 version as well?  Lips sealed
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April 01, 2014, 05:45:20 PM
Last edit: April 01, 2014, 07:11:33 PM by Supercomputing
 #2684

  asm( "add.cc.u32 %0, %0, %1;" : "+r"(r[0]) : "r"(tasm));
   asm( "madc.hi.u32 %0, %1, %2, 0;" : "=r"(tasm) : "r"(op1[0*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "mad.lo.cc.u32 %0, %1, %2, %0;" : "+r"(r[0]) : "r"(op1[0*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "addc.u32 %0, %0, 0;" : "+r"(tasm));
   asm( "add.cc.u32 %0, %0, %1;" : "+r"(r[1]) : "r"(tasm));
   asm( "madc.hi.u32 %0, %1, %2, 0;" : "=r"(tasm) : "r"(op1[1*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "mad.lo.cc.u32 %0, %1, %2, %0;" : "+r"(r[1]) : "r"(op1[1*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "addc.u32 %0, %0, 0;" : "+r"(tasm));
   asm( "add.cc.u32 %0, %0, %1;" : "+r"(r[2]) : "r"(tasm));
   asm( "madc.hi.u32 %0, %1, %2, 0;" : "=r"(tasm) : "r"(op1[2*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "mad.lo.cc.u32 %0, %1, %2, %0;" : "+r"(r[2]) : "r"(op1[2*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "addc.u32 %0, %0, 0;" : "+r"(tasm));
   asm( "add.cc.u32 %0, %0, %1;" : "+r"(r[3]) : "r"(tasm));
   asm( "madc.hi.u32 %0, %1, %2, 0;" : "=r"(tasm) : "r"(op1[3*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "mad.lo.cc.u32 %0, %1, %2, %0;" : "+r"(r[3]) : "r"(op1[3*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "addc.u32 %0, %0, 0;" : "+r"(tasm));
   asm( "add.cc.u32 %0, %0, %1;" : "+r"(r[4]) : "r"(tasm));
   asm( "madc.hi.u32 %0, %1, %2, 0;" : "=r"(tasm) : "r"(op1[4*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "mad.lo.cc.u32 %0, %1, %2, %0;" : "+r"(r[4]) : "r"(op1[4*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "addc.u32 %0, %0, 0;" : "+r"(tasm));
   asm( "add.cc.u32 %0, %0, %1;" : "+r"(r[5]) : "r"(tasm));
   asm( "madc.hi.u32 %0, %1, %2, 0;" : "=r"(tasm) : "r"(op1[5*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "mad.lo.cc.u32 %0, %1, %2, %0;" : "+r"(r[5]) : "r"(op1[5*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "addc.u32 %0, %0, 0;" : "+r"(tasm));
   asm( "add.cc.u32 %0, %0, %1;" : "+r"(r[6]) : "r"(tasm));
   asm( "madc.hi.u32 %0, %1, %2, 0;" : "=r"(tasm) : "r"(op1[6*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "mad.lo.cc.u32 %0, %1, %2, %0;" : "+r"(r[6]) : "r"(op1[6*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "addc.u32 %0, %0, 0;" : "+r"(tasm));
   asm( "add.cc.u32 %0, %0, %1;" : "+r"(r[7]) : "r"(tasm));
   asm( "madc.hi.u32 %0, %1, %2, 0;" : "=r"(tasm) : "r"(op1[7*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "mad.lo.cc.u32 %0, %1, %2, %0;" : "+r"(r[7]) : "r"(op1[7*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "addc.u32 %0, %0, 0;" : "+r"(tasm));
   asm( "add.cc.u32 %0, %0, %1;" : "+r"(r[8]) : "r"(tasm));
   asm( "madc.hi.u32 %0, %1, %2, 0;" : "=r"(tasm) : "r"(op1[8*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "mad.lo.cc.u32 %0, %1, %2, %0;" : "+r"(r[8]) : "r"(op1[8*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "addc.u32 %0, %0, 0;" : "+r"(tasm));
   asm( "add.cc.u32 %0, %0, %1;" : "+r"(r[9]) : "r"(tasm));
   asm( "madc.hi.u32 %0, %1, %2, 0;" : "=r"(tasm) : "r"(op1[9*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "mad.lo.cc.u32 %0, %1, %2, %0;" : "+r"(r[9]) : "r"(op1[9*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "addc.u32 %0, %0, 0;" : "+r"(tasm));
   asm( "add.cc.u32 %0, %0, %1;" : "+r"(c0) : "r"(tasm) );
   asm( "addc.u32 %0, 0, 0;" : "=r"(c1));

I don't get why you have so many adds in there... especially when you have fancy mad.lo.cc.u32/mad.hi.cc.u32 instructions...

You would be correct if I were performing just straight multiple-precision multiplication arithmetic per thread, but I am not. It is multiplication + reduction in one pass + fancy coalesced memory access.

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April 01, 2014, 05:45:41 PM
 #2685

I've compiled custom build(windows 64bit) from jh00 xptminer and dga ric core with gmp 6.0.0(not mpir) and avx-i support (Ivy Bridge processors only).

Build include 1% devfee (hardcoded).

Don't you find it a little odd to rip out someone's existing dev fee when there's a mechanism in there to add your own to the stack and ensure that all of the developers continue to have an incentive to work on the software?  I do.  So:

There's now an official build for Windows 64bit against gmp 6.0.0a with avx support at:

http://www.cs.cmu.edu/~dga/crypto/ric/

Along with the existing sse4 version.  I've automated the build for this platform and will continue to maintain it through future releases.  At the same time, I've also added an avx version for Linux.  These have my standard dev fee structure - 2% default (1.5% to me, 0.25% jh00, 0.25% clintar), and you can increase or decrease it from the command line or in the source code as you wish.



Any chance to have the AVX2 version as well?  Lips sealed

The version of mingw I have doesn't support avx2.  Is there one that does?  I'm happy to upgrade if it's ubuntu-friendly.

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April 01, 2014, 05:53:55 PM
 #2686

I've compiled custom build(windows 64bit) from jh00 xptminer and dga ric core with gmp 6.0.0(not mpir) and avx-i support (Ivy Bridge processors only).

Build include 1% devfee (hardcoded).

Don't you find it a little odd to rip out someone's existing dev fee when there's a mechanism in there to add your own to the stack and ensure that all of the developers continue to have an incentive to work on the software?  I do.  So:

There's now an official build for Windows 64bit against gmp 6.0.0a with avx support at:

http://www.cs.cmu.edu/~dga/crypto/ric/

Along with the existing sse4 version.  I've automated the build for this platform and will continue to maintain it through future releases.  At the same time, I've also added an avx version for Linux.  These have my standard dev fee structure - 2% default (1.5% to me, 0.25% jh00, 0.25% clintar), and you can increase or decrease it from the command line or in the source code as you wish.

cphr, I'd love to talk about a strategy that has the right incentives for everyone.  Just like I think it's great for pools to provide a dev fee mechanism to encourage miner innovation, I think it's important for devs and port maintainers to figure out a reasonable standard of expectation for how to split dev fees in a good way.  Good outcomes would seem to include:
  - Original developers have an incentive to keep developing and improving their software;
  - Original developers want to make it easy for platform-porters to do their ports and keep in sync with the dev version;
  - Platform-porters want to make awesome platform ports and receive a fair fee for doing so.

Any thoughts on the right way to do this in the future?


dga, you are right. Thank you for advice. I edited my post with new build. Now it's include you default devfee (1.5% dga, 0.25% jh00, 0.25% clintar and 0.25% for me) and it can be disabled from command line, but can't be increased or decreased.

And thank you for your work on this project.
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April 01, 2014, 06:27:54 PM
 #2687

I've compiled custom build(windows 64bit) from jh00 xptminer and dga ric core with gmp 6.0.0(not mpir) and avx-i support (Ivy Bridge processors only).

Build include 1% devfee (hardcoded).

Don't you find it a little odd to rip out someone's existing dev fee when there's a mechanism in there to add your own to the stack and ensure that all of the developers continue to have an incentive to work on the software?  I do.  So:

There's now an official build for Windows 64bit against gmp 6.0.0a with avx support at:

http://www.cs.cmu.edu/~dga/crypto/ric/

Along with the existing sse4 version.  I've automated the build for this platform and will continue to maintain it through future releases.  At the same time, I've also added an avx version for Linux.  These have my standard dev fee structure - 2% default (1.5% to me, 0.25% jh00, 0.25% clintar), and you can increase or decrease it from the command line or in the source code as you wish.



Any chance to have the AVX2 version as well?  Lips sealed

The version of mingw I have doesn't support avx2.  Is there one that does?  I'm happy to upgrade if it's ubuntu-friendly.

It seems that the lastest versions of gcc support avx2: http://forums.gentoo.org/viewtopic-p-7411324.html#7411324

I'm a genuine noob in all the linux stuff, so unfortunatly I can't help you  Undecided I'll try to dig a little bit more and see if I find something relevant
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April 01, 2014, 07:23:47 PM
 #2688


It seems that the lastest versions of gcc support avx2: http://forums.gentoo.org/viewtopic-p-7411324.html#7411324

I'm a genuine noob in all the linux stuff, so unfortunatly I can't help you  Undecided I'll try to dig a little bit more and see if I find something relevant

They do.  There's a linux avx2 build up on my website.  I'm just not sure how to do it with mingw -- its version of gcc seems to lag behind the current release.

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April 01, 2014, 11:39:00 PM
 #2689

Foundation members are learning how multisig works to verify once more that donation address works. Please be patient.

Huntercoin: H9kttkrQidiQMG9NibmTgjgCKqWJMAkAXD
Riecoin: Like us on https://www.facebook.com/TheRiecoinCommunity
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April 01, 2014, 11:59:59 PM
 #2690

Foundation members are learning how multisig works to verify once more that donation address works. Please be patient.

Cool stuff, very interested in donating. Nice job with all the setup!
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April 02, 2014, 01:42:42 AM
 #2691

New Bitcoin Spinoff Promises Scientific and Mathematical Benefits to the Community

Riecoin is a brand new alternative currency based off of the Bitcoin protocol that searches for new prime numbers and eliminates the traditional e-waste associated with digital mining

FOR IMMEDIATE RELEASE

 PRLog (Press Release) - Apr. 1, 2014 - The meteoric rise of Bitcoin as an alternative currency around the world has been in major headlines and continues to be a source of interest for people seeking options in a shaky financial environment. Unfortunately, one of the traditional concerns with Bitcoin revolves around the mining process and its resultant electronic waste. Bitcoin miners typically use electricity to generate the currency, but not much else is generated, creating large amounts of wasted energy. However, a new coin has recently been released based off of the Bitcoin protocol that aims to solve this problem of electronic waste by finding new prime numbers as a by-product of mining.

http://www.prlog.org/12303869-new-bitcoin-spinoff-promises-scientific-and-mathematical-benefits-to-the-community.html

If anyone from the community can help promote it I would certainly appreciate it! Right now the foundation does not have funds set aside for a paid distribution so I am grass roots submitting this to as many places as I can.
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April 02, 2014, 02:21:58 AM
 #2692

Don't forget to like us on Facebook: https://www.facebook.com/TheRiecoinCommunity
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April 02, 2014, 04:39:24 AM
 #2693

The Foundation is still verifying that multi-sig works so again, donations and projects will be delayed for another day.

Huntercoin: H9kttkrQidiQMG9NibmTgjgCKqWJMAkAXD
Riecoin: Like us on https://www.facebook.com/TheRiecoinCommunity
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April 02, 2014, 05:09:00 AM
 #2694

The Foundation is still verifying that multi-sig works so again, donations and projects will be delayed for another day.

No worries - things are going well still. This is the perfect time to be onboard w/ RIC!
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April 02, 2014, 04:22:35 PM
 #2695

Sad month for cryptocurrencies right now.

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Riecoin: Like us on https://www.facebook.com/TheRiecoinCommunity
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April 02, 2014, 07:42:40 PM
 #2696

Congratulations! Riecoin was added to COMKORT exchange.

3 MARKETS for RIC

https://comkort.com/market/trade/ric_btc

https://comkort.com/market/trade/ric_ltc

https://comkort.com/market/trade/ric_doge


Great opportunities for alt coin traiding! Join in and enjoy our rewarding BONUS system!

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April 02, 2014, 07:54:34 PM
 #2697

Congratulations! Riecoin was added to COMKORT exchange.

3 MARKETS for RIC

https://comkort.com/market/trade/ric_btc

https://comkort.com/market/trade/ric_ltc

https://comkort.com/market/trade/ric_doge


Great opportunities for alt coin traiding! Join in and enjoy our rewarding BONUS system!

Excellent!. Dont know why you guys don't have more trading volumes though. Traded with you guys to experiment and its pretty smooth.

Huntercoin: H9kttkrQidiQMG9NibmTgjgCKqWJMAkAXD
Riecoin: Like us on https://www.facebook.com/TheRiecoinCommunity
bitcoinvideos
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April 02, 2014, 08:14:59 PM
 #2698

Congratulations! Riecoin was added to COMKORT exchange.

3 MARKETS for RIC

https://comkort.com/market/trade/ric_btc

https://comkort.com/market/trade/ric_ltc

https://comkort.com/market/trade/ric_doge


Great opportunities for alt coin traiding! Join in and enjoy our rewarding BONUS system!
Heck yeah! Excellent news...more exchanges with more options for RIC...
bitcoinvideos
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April 03, 2014, 03:15:54 AM
 #2699

Difficulty has stagnated a little bit in the past few days but this is a good thing! Build up those shares and a bigger piece of the pie for when we break records! Or help us get to that record breaking point. Difficulty: 1675.000000
northranger79510
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Riecoin and Huntercoin to rule all!


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April 03, 2014, 03:56:35 AM
 #2700

Foundation being delayed again because members were very busy with their life. Sorry for the inconvenience!

Huntercoin: H9kttkrQidiQMG9NibmTgjgCKqWJMAkAXD
Riecoin: Like us on https://www.facebook.com/TheRiecoinCommunity
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