Documentation of closed source ASIC chips

[n0nce]

In the next few months, I plan to source various modern, closed source ASIC chips, a few of which - like BM1387 (Antminer S9, GekkoScience NewPac) and BM1397 (S17, GekkoScience Compac F) - I already have.
Then, I want to document their physical and logical pinouts by measuring the dimensions of these packages and referencing published repair guides, producing some breakout PCBs and trying them out. (Hopefully not too many rounds of trial and error, even though PCBs are so cheap these days..)

I want to publish the reverse engineered CAD components of the chips and example PCB files (breakout boards for the various chips) as open source non-commercial so anyone wanting to research these chips, make their own stick miners etc., can do it easily. 

Due to great single-chip hashrates, especially with new gen chips from Antminer S17 and S19, also Whatsminer M30, even small DIY'ed proof-of-concept miners and USB-stick miners with one or two ASIC chips, I envision should generate a non-negligible amount of sats, as we can see in the admirable creations from GekkoScience (Compac F). 

I'm opening this topic mainly to discuss with you guys about the idea (Especially unsure if I'm breaking any law / rule from Bitmain here? Maybe that's the reason GekkoScience has never published their reverse-engineered files?), exchange existing files and documentation and upload my aforementioned reverse-engineered KiCad components, dimensions and PCB files.

So far, I dug up

• an S7 (BM1385) datasheet:
  https://bits.media/images/asic-miner-antminer-s7/BM1385_Datasheet_v2.0.pdf
• a S9 (BM1387) repair guide:
  https://www.zeusbtc.com/manuals/repair-guide/Antminer-S9-hash-board-Repair-guide.pdf
• a S17 (BM1397) repair guide:
  https://drive.google.com/uc?id=1TfNMnpEFxEGMHbTr3lmy2-9Ry7XzlgP2&export=download
• a T17 (BM1397) repair guide:
  https://drive.google.com/uc?id=1ZeCZBaM_z5CrFGmx7X0kLfvbxwa6bvLG&export=download

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[NotFuzzyWarm]

There is no copyright or anything else proprietary about the chip's physical pinouts nor documenting what they are, do, and signals used. Of course if you publish existing already released datasheets you must make it clear as to where they came from (Chip company name and if possible their document number for the datasheet).
The physical chip sizes are industry standard ones. Even Bitmains use of SOT packaging (Silicon On Top) where the actual backside of the silicon chip is exposed to vastly increase cooling is not proprietary.

[n0nce]

There is no copyright or anything else proprietary about the chip's physical pinouts nor documenting what they are, do, and signals used. The physical chip sizes are industry  standard ones. Even Bitmains use of SOT packaging (Silicon On Top) where the actual backside of the silicon chip is exposed to vastly increase cooling is not proprietary.

Thanks a lot! This makes me feel more safe about documenting my findings openly

I'm just wondering, since you say the chip sizes are industry standard - the package size of the chips I have in front of me is very familiar (though not measured yet), but I've never seen the big + and - pads underneath so far. In case it's something standardized, I'll look further, so I won't have to re-design the packages in KiCad myself of course!

[NotFuzzyWarm]

Welcome to the world of power IC's. Most use standard package sizes but as far as connections go it's anybodies game. About the only thing to sorta rely on is that signals will be running around the outside edges of the chip and power will be via large pads - which also play large part in cooling - towards the middle areas.

[n0nce]

Welcome to the world of power IC's. Most use standard package sizes but as far as connections go it's anybodies game. About the only thing to sorta rely on is that signals will be running around the outside edges of the chip and power will be via large pads towards the middle areas.

Alrighty! The cool thing is that the pinouts are partly deductible from the repair guides and manuals, my main issue so far was figuring out packages, but I think then I'll be good if they're bound to at least some amount of standardization

[NotFuzzyWarm]

Merit given for the project.
Last time I can remember something like it is a couple project threads from late 2013-early 2014 dealing with the A1 chip and a Universal Miner project. I'll dig up link to those later.

Main thing to keep an eye on is the thermals. Use of heavy copper power planes is required because the pads feeding power are also a large part of the chip cooling process.

[n0nce]

Merit given for the project.
Last time I can remember something like it is a couple project threads from late 2013-early 2014 dealing with the A1 chip and a Universal Miner project. I'll dig up link to those later.

Thanks a lot for the merit and your insights! Sounds good, maybe I can learn something from those

Main thing to keep an eye on is the thermals. Use of heavy copper power planes is required because the pads feeding power are also a large part of the chip cooling process.

I was planning to do big power traces on the PCB anyway, simply to avoid too high power through small traces, but didn't know that the cooling is done so much from the 'back'! I'm familiar with that from some stepper motor drivers I've worked with though. They actually didn't even have heatsinks on the package, just on the back of the PCB. I'll take that into consideration.

[jeyzeus]

dope project

is this site legit?

https://whatsminer.net/product/asic-chips-for-m30-series/

I wouldn't mind ordering 1-2 chips and "donating" them for the cause if it would be helpful. Do you think we should also look into doing this with the BM1391? they seem really cheaper and more readily available than the 1397. i'm not sure how much more efficient they are when compared to the older BM1387 but it seems at least a gen up. something like an R606 or an apollo btc with the BM1391 chips wouldn't be as fast it with the 1397 but the build out could be a lot cheaper w/ the 1391 chips.

would be cool to get something like the compac F with either of these made, or a compac F w/ like 2-3 chips but i have no idea how to design pcb, write code or anything. i'm definitely more of an end user.

[sidehack]

A Compac F with multiple BM1397 would not be that great, considering USB isn't good for more than about 15 watts and one BM1397 will handle that on its own. When doing a multi-chip setup, one also has to consider that the surface of the IC is copper-plated and electrically grounded, so you can't share heatsinks across multiple chips unless they're at the same ground potential. BM1391 doesn't have that limitation, but as you say, they're also not as fast. BM1387 can clock down to around 60W/TH (but very low speeds, ~50GH per chip at best), 1391 around 45W/TH, 1397 around 35W/TH.

Don't tell anybody, but I'm working on BM1391 next. Supposed to have some M30 chips inbound to play with too but so far I have no info on how to use them. I (GekkoScience) tend to not publish a lot of info either because I got it under NDA or because the manufacture and sale of my miners is the primary income for multiple households and I don't want to risk undercutting my own business or the employees that rely on it.

[n0nce]

dope project

is this site legit?

https://whatsminer.net/product/asic-chips-for-m30-series/

Thanks for the feedback! Unfortunately no idea about that website, if anyone knows, would be happy to know and acquire some chips there as well!

I wouldn't mind ordering 1-2 chips and "donating" them for the cause if it would be helpful.

Donation would be gladly accepted, but I don't have a PO box, so will have to think about a privacy protecting way, but I'll let you know.

Do you think we should also look into doing this with the BM1391? they seem really cheaper and more readily available than the 1397. i'm not sure how much more efficient they are when compared to the older BM1387 but it seems at least a gen up. something like an R606 or an apollo btc with the BM1391 chips wouldn't be as fast it with the 1397 but the build out could be a lot cheaper w/ the 1391 chips.

Regarding BM1391, I think it will surely be a good idea to document that chip as well, due to the cheap prices, and new gen is always good for efficiency.

[n0nce]

A Compac F with multiple BM1397 would not be that great, considering USB isn't good for more than about 15 watts and one BM1397 will handle that on its own. When doing a multi-chip setup, one also has to consider that the surface of the IC is copper-plated and electrically grounded, so you can't share heatsinks across multiple chips unless they're at the same ground potential. BM1391 doesn't have that limitation, but as you say, they're also not as fast. BM1387 can clock down to around 60W/TH (but very low speeds, ~50GH per chip at best), 1391 around 45W/TH, 1397 around 35W/TH.

Hey sidehack, thanks for chiming in, big fan here! You're right about the USB power; I was thinking if I'll design a miner myself, maybe to use barrel jack connectors to give additional power to a USB-stick-based miner, since I saw laptops with dual 200W or so PSUs connected via barrel afaik (those gaming kind of laptops with desktop processors).

Don't tell anybody, but I'm working on BM1391 next. Supposed to have some M30 chips inbound to play with too but so far I have no info on how to use them. I (GekkoScience) tend to not publish a lot of info either because I got it under NDA or because the manufacture and sale of my miners is the primary income for multiple households and I don't want to risk undercutting my own business or the employees that rely on it.

Oh nice, interesting to hear your plans with new chips and insights! Quite sick that you even get NDA access at all, didn't expect it. And I totally get that you don't want to give away plans and undermine your own business. I hope I won't cause your business any harm by publishing the info that I will be able to find and reverse engineer.

In my mind, I just want to publish footprints and KiCad component files in a way (by license) that is for educational and open source purposes and will lead to development of open source home ASICs. It would mean people could e.g. have them made in small runs for them and their family & friends, even when more well-known products like yours from GekkoScience or from Futurebit are sold out or unavailable in the region for example

Also this project shall aid in the freedom and independence aspect of Bitcoin - theoretically, with just having to source chips and plans available, one could even produce PCBs locally or at home and solder components themselves (not that it would make sense to do but just the idea that you don't have to rely on overseas PCB manufacturers, transport, customs etc. to get a miner in your hands sounds quite cool to me).

[NotFuzzyWarm]

BM1397 will handle that on its own. When doing a multi-chip setup, one also has to consider that the surface of the IC is copper-plated and electrically grounded

I knew the surface of the Si wafer was flashed with copper to make is easy to solder on the heat sinks but did not know it was grounded. For the backside of the Si chip to be tied to the chip's power return (or any power rail for that matter) means they have some thru-silicon vias that are connected to the pads feeding in power. Any ideas as to *why* BM did that? Aside from maybe cutting down on interference seems it seems like a rather pointless 'feature'.

[NotFuzzyWarm]

As said earlier, some links to early development projects
The Wasp 'Universal miner' project which was going to be able to use several different ASIC chips from different makers.

The start of Zefir's A1 chip development for Bitmine.ch/Innosilicon
A nice list of design pointers from Zefir who did most of the dev work for the ill-fated A1 chip from Bitmine.ch/Innosilicon.
Note: The chip itself was not bad nor was the code for it. Bitmine.ch REPEATEDLY blew it on the hardware layout, power layout and <drumroll please> thermal design. The one company that got it right was the folks that made the famous A1-powerd Dragon miners. (and no - NOT to be confused with the Dragonmints which came many years later)

In both threads note the emphasis on thermals and power plane considerations. Some good info regarding those found in
http://www.edn.com/electronics-blogs/the-workbench/4421218/PCB-layout-tips-for-thermal-vias
http://circuitcalculator.com/wordpress/2006/03/12/pcb-via-calculator/

Probably more to follow...

[kano]

and from the software side ...
https://bitcointalk.org/index.php?topic=294499.0