mrb
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July 02, 2012, 09:41:38 AM Last edit: July 09, 2012, 07:28:49 PM by mrb |
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With a desktop power supply powering my 6 singles and a Dreamplug, I get about 50 Watts per single at the wall.
It must be the default power adapter that eats up a whole 30 Watts to itself.
Thanks for report, but could you measure it with multimeter - voltage and current consumed by board ? That is really interesting. And possibly core voltage ? Thanks again!!! Jothan's numbers are incorrect (perhaps he is trying to subtract a baseline idle power consumption that is incorrectly measured, or his watt meter is defective, or his singles are throttling)... I measured power consumption with a clamp meter around the 12V input, and I get 66W per Single (rev 3 without the big 80mm fan an the bottom, the ones with the fan consume 68W), with an average 81W at the wall measured with a kill-a-watt, meaning the power adapters are 66/81 = 81% efficient. And BFL seems to be using core voltage of 1.1V per the test points in the top right corner of their PCB: https://i.imgur.com/vrzol.jpgI measured 1.13V with a multimeter on this 1.1V test point.
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Gomeler
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July 02, 2012, 04:27:15 PM |
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Maybe he realized that there is no way to compete with BFL and wants to get a job there, by showing how 'smart' he is. Otherwise, he'd just make something better himself Well. I don't need job with them, but I may sell to them solution of course. Right now they have more than enough money just to buy some know-hows about sha256. And looking at their hash-rates I clearly see that they need it :-) As for Spartan solution - it is already fastest, and if yohan's prices for board combined with my bitstream price per Mh/s would be $0.53 / Mh/s for FPGA (1200 Mh/s for $640). This already beats BFL prices. If my licensing per-spartan would be applicable ($25 per chip) - then it would be 1200 Mh/s for $740 - $0.616 - again beats BFL. But - yohan prefers 840 Mh/s :-) While our capabilities do not allow to deploy quickly and cheap solutions. For ASIC solution it is tougher - because this sets stakes higher. And I don't like to happen competing with phantom like it was with 20 W / 1050 Gh/s single... Trying like crazy getting 500 Mh/s from single Spartan :-) And then seeing that no magic was there, just some marketing fraud. I think they did it with this intention as well, to make others spending time trying to compete with the thing you can't :-) And then simply say "oops" - it is 80 W but not 20 W :-) Sorry - this is the thing that I won't forget :-) Quite happy that mini-rig was done differently. :-) If I recall, don't you run your Spartan6s at higher voltages to achieve the MH/s that you are with your design? I imagine you'd hit the same problem that the tricone design is hitting with sagging voltages on boards that don't feed a slightly higher core voltage.
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bitfury (OP)
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July 03, 2012, 12:21:23 AM |
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Maybe he realized that there is no way to compete with BFL and wants to get a job there, by showing how 'smart' he is. Otherwise, he'd just make something better himself Well. I don't need job with them, but I may sell to them solution of course. Right now they have more than enough money just to buy some know-hows about sha256. And looking at their hash-rates I clearly see that they need it :-) As for Spartan solution - it is already fastest, and if yohan's prices for board combined with my bitstream price per Mh/s would be $0.53 / Mh/s for FPGA (1200 Mh/s for $640). This already beats BFL prices. If my licensing per-spartan would be applicable ($25 per chip) - then it would be 1200 Mh/s for $740 - $0.616 - again beats BFL. But - yohan prefers 840 Mh/s :-) While our capabilities do not allow to deploy quickly and cheap solutions. For ASIC solution it is tougher - because this sets stakes higher. And I don't like to happen competing with phantom like it was with 20 W / 1050 Gh/s single... Trying like crazy getting 500 Mh/s from single Spartan :-) And then seeing that no magic was there, just some marketing fraud. I think they did it with this intention as well, to make others spending time trying to compete with the thing you can't :-) And then simply say "oops" - it is 80 W but not 20 W :-) Sorry - this is the thing that I won't forget :-) Quite happy that mini-rig was done differently. :-) If I recall, don't you run your Spartan6s at higher voltages to achieve the MH/s that you are with your design? I imagine you'd hit the same problem that the tricone design is hitting with sagging voltages on boards that don't feed a slightly higher core voltage. About board voltage - yes - 1.3 V, and 1.26 V on chip. We have board in production with separate power supplies and LVDS high precision clock supplied based on SI5338A external PLL. It may give superior performance to Spartan internal clock generators. 2 mrb: thanks for your input. 66 W per single means about 33 W per chip and including COP of system it is probably 26-28 W per chip (I expect 12 V -> 1.1 system should have COP about 80-85%).
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tidus_13
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July 03, 2012, 02:06:32 AM |
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Maybe he realized that there is no way to compete with BFL and wants to get a job there, by showing how 'smart' he is. Otherwise, he'd just make something better himself Well. I don't need job with them, but I may sell to them solution of course. Right now they have more than enough money just to buy some know-hows about sha256. And looking at their hash-rates I clearly see that they need it :-) As for Spartan solution - it is already fastest, and if yohan's prices for board combined with my bitstream price per Mh/s would be $0.53 / Mh/s for FPGA (1200 Mh/s for $640). This already beats BFL prices. If my licensing per-spartan would be applicable ($25 per chip) - then it would be 1200 Mh/s for $740 - $0.616 - again beats BFL. But - yohan prefers 840 Mh/s :-) While our capabilities do not allow to deploy quickly and cheap solutions. For ASIC solution it is tougher - because this sets stakes higher. And I don't like to happen competing with phantom like it was with 20 W / 1050 Gh/s single... Trying like crazy getting 500 Mh/s from single Spartan :-) And then seeing that no magic was there, just some marketing fraud. I think they did it with this intention as well, to make others spending time trying to compete with the thing you can't :-) And then simply say "oops" - it is 80 W but not 20 W :-) Sorry - this is the thing that I won't forget :-) Quite happy that mini-rig was done differently. :-) so your bitstream it´s 300Mh/s? per Spartan Chip? it would be 600Mh/s at Icarus?
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bitfury (OP)
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July 03, 2012, 02:15:13 AM |
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Maybe he realized that there is no way to compete with BFL and wants to get a job there, by showing how 'smart' he is. Otherwise, he'd just make something better himself Well. I don't need job with them, but I may sell to them solution of course. Right now they have more than enough money just to buy some know-hows about sha256. And looking at their hash-rates I clearly see that they need it :-) As for Spartan solution - it is already fastest, and if yohan's prices for board combined with my bitstream price per Mh/s would be $0.53 / Mh/s for FPGA (1200 Mh/s for $640). This already beats BFL prices. If my licensing per-spartan would be applicable ($25 per chip) - then it would be 1200 Mh/s for $740 - $0.616 - again beats BFL. But - yohan prefers 840 Mh/s :-) While our capabilities do not allow to deploy quickly and cheap solutions. For ASIC solution it is tougher - because this sets stakes higher. And I don't like to happen competing with phantom like it was with 20 W / 1050 Gh/s single... Trying like crazy getting 500 Mh/s from single Spartan :-) And then seeing that no magic was there, just some marketing fraud. I think they did it with this intention as well, to make others spending time trying to compete with the thing you can't :-) And then simply say "oops" - it is 80 W but not 20 W :-) Sorry - this is the thing that I won't forget :-) Quite happy that mini-rig was done differently. :-) so your bitstream it´s 300Mh/s? per Spartan Chip? it would be 600Mh/s at Icarus? Depends. Potentially yes. 12 W power per Spartan Chip. That power makes it difficult to use on many boards, for example with ZTEX boards. You may look on our web site how many there capacitors below the chip ( www.bitfury.org). On Icarus it maybe just 260-280 Mh/s, because it maybe wise to _lower_ voltage there to 1.15 V and decrease frequency accordingly. So it would run about 210 Mhz - 220 Mhz and consume about 9 - 9.5 W taking about 8 Amps power. But exact combination of voltage and frequency should be determined based on power supply components and bypass capacitor calculations.
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bitfury (OP)
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July 03, 2012, 12:48:47 PM |
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Bitfury have you contacted Enterpoint about licensing your bitstreams with the Cairnsmore1 quad-Spartan boards?
Licensing terms were written on this forum - basically $25 per spartan for low volumes and $20 per spartan for higher volumes. + Additional offer to scalp even more performance for $5 per spartan, if spartan volumes will be higher than 5000 total subscribing. Enterpoint shown no interest in this, as well as other board vendors except starting project - shalab.si Maybe this happened because I wrote that these works will be open-source when spartans will be phased-out from generic mining rush. It seems to starting happening by the way. Depends on what will happen with ASICs.
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ice_chill
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July 03, 2012, 06:39:08 PM |
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Bitfury have you contacted Enterpoint about licensing your bitstreams with the Cairnsmore1 quad-Spartan boards?
Licensing terms were written on this forum Writing something on a forum and directly contacting a vendor are different things indeed. If I were in your shoes I'd be banging down the doors of the Spartan providers to adopt my code. Buy the board, program it, demonstrate your work, then people will believe and have buying interest, right now it's just promises without any backing
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bitfury (OP)
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July 03, 2012, 07:59:07 PM |
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Bitfury have you contacted Enterpoint about licensing your bitstreams with the Cairnsmore1 quad-Spartan boards?
Licensing terms were written on this forum Writing something on a forum and directly contacting a vendor are different things indeed. If I were in your shoes I'd be banging down the doors of the Spartan providers to adopt my code. Buy the board, program it, demonstrate your work, then people will believe and have buying interest, right now it's just promises without any backing This is what I am doing. Just not boards, but producing 1-U servers with 48 spartan on boards. Soon first limited try-out will be sold, and I will inform everybody here as well. About taking any board - if it would be piece of cake - like spending one day and done - I would do this. But actually only compilation takes 24 hours... Then it would take even more for adoption and debugging, multiply it per number of boards. Not knowing exactly volumes - means you would spent effort and it won't produce any fruit. Also with pricing... such prices as $250 per spartan seems ridiculous. Like some vendors offer. I understand that as "dev board" for geeks to play it is nice offer, but as for mining - that is bad offer. Maybe this played a bit as well, as I disclosed how much it costs to build boards, etc. 1U will be more expensive though than initial setup of bitfury with rack ... more density ==> higher costs (say without active cooling it is unlikely that you would put more than 24 spartans in 1U).
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420
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October 14, 2012, 01:32:00 AM |
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What was the original hashrate BFL claimed when they were making a prototype of bitforc esingle? wasn't it like 1.5ghash or something at 40 watts?
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Donations: 1JVhKjUKSjBd7fPXQJsBs5P3Yphk38AqPr - TIPS the hacks, the hacks, secure your bits!
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crazyates
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October 14, 2012, 01:51:48 AM |
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What was the original hashrate BFL claimed when they were making a prototype of bitforc esingle? wasn't it like 1.5ghash or something at 40 watts?
1GH/s @ 20W.
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gmaxwell
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October 14, 2012, 02:55:35 PM |
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In Quartus using my "prototype" code that I used for Hardcopy IV evaluation, and other Stratix and Cyclone V devices (I would remember that for Cyclone V it is possible to get 320 Mh/s performance per chip @ 160 Mhz @ 6 W approx).
The same code on EP3SL150F780C4 gave highest clock 220 Mhz, and on EP3SL150F780C3 gave highest clock 250 Mhz. It is exactly unrolled round calculation. And clock is based on "Slow 110mV 85C Model Fmax Summary" so if some overvolt practice done it would run a bit (probably like 10%) faster.
I suspect you're bumping into the same reason their initial specs didn't match the delivered product: the power (and perhaps clock?) estimates out of these tools are wildly wrong because they don't account for the very high toggle rates. Your numbers would have been more in line with what BFL originally claimed for the product but couldn't deliver.
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ChipGeek
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October 16, 2012, 02:51:43 PM |
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I suspect you're bumping into the same reason their initial specs didn't match the delivered product: the power (and perhaps clock?) estimates out of these tools are wildly wrong because they don't account for the very high toggle rates.
Your numbers would have been more in line with what BFL originally claimed for the product but couldn't deliver.
^^^ This.
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Tip jar: 1ChipGeeK7PDxaAWG4VgsTi31SfJ6peKHw
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Raoul Duke
aka psy
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October 16, 2012, 06:32:40 PM |
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You do realise those photos are from last June and those are the FPGA rigs, right?
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MrTeal
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October 16, 2012, 06:56:12 PM |
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In Quartus using my "prototype" code that I used for Hardcopy IV evaluation, and other Stratix and Cyclone V devices (I would remember that for Cyclone V it is possible to get 320 Mh/s performance per chip @ 160 Mhz @ 6 W approx).
The same code on EP3SL150F780C4 gave highest clock 220 Mhz, and on EP3SL150F780C3 gave highest clock 250 Mhz. It is exactly unrolled round calculation. And clock is based on "Slow 110mV 85C Model Fmax Summary" so if some overvolt practice done it would run a bit (probably like 10%) faster.
I suspect you're bumping into the same reason their initial specs didn't match the delivered product: the power (and perhaps clock?) estimates out of these tools are wildly wrong because they don't account for the very high toggle rates. Your numbers would have been more in line with what BFL originally claimed for the product but couldn't deliver. bitfury might have a much better handle on how to simulate and get the correct numbers since he's taken his designs and actually put them onto silicon. While there could be something specific about the EP3SL150F780C4 that causes it to be so far out from simulations, it's probably pretty likely that if bitfury's simulations match his power draw for his own chips, they won't be that far off for modeling the same high level design on a different chip. Still, why are we necroposting this?
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