Bitcoin Forum

Thought I'd repost these here:

http://btcwebhost.com/~cablepair/bASIC72-1.png
http://btcwebhost.com/~cablepair/diagram.png
http://btcwebhost.com/~cablepair/diagram2.png
http://btcwebhost.com/~cablepair/basic_close-assy2.png

Source: https://www.btcfpga.com/forum/index.php?topic=355.0

Just a few random thoughts when I saw these:

1st: These are their "renderings"?! I'm not good with that sort of stuff, but my brother could whip those up in an hour. They show virtually no details besides having 16 chips, 4 fans, and a DC barrel jack (I thought they were using molex?). People complained about the BFL renderings not being enough proof, but those at least looked like they were based off an actual schematic or design. I'm assuming this is because the board isn't finished?

2nd: 16 chips compared to BFLs 8. That would put them at 4.5GH/s, compared to BFL's 7.5GH/s. I wonder if more chips = lower voltage, which allows them to lower the power usage (per chip), and maybe keep them under 100W?

Yeah they could be prettier, but it's nice to see movement. As to the molex issue, I believe bASIC is moving toward a PCIe connector as a single molex would be pretty close to maxed current wise. This is a good choice IMO and the barrel connector is another option for powering the unit.

The design is very compact and efficient IMO, though it could obviously change significantly prior to shipping.

Why does it say the chips will be on time? wasn't the word before that bASIC already had the chips? If this wasn't then case, then I apologize for the statements made against them on the assumption they mentioned they had chips but no PCB.

Think you can kiss your Christmas fruitcake buh bye buddy...no sense sucking up now. :P

The chip possession comments from BTCFPGA are still rather ambiguous. I don't know if they had some ES chips on hand and have just been waiting for the main shipment or what. They seem rather confident that they'll have chips when they need them and that they'll work. 

If true to render, this would be the first ASIC (of any kind, bitcoin related or otherwise) I've ever seen that had JTAG.

Odd, to say the least...

Enigma

One learns throughout life. Why ASICs couldn't be tested by JTAG connector? Or have internal temperature read out at prototype boards?

Not impressive at all  >:(

It seems Avalon is the only trustworthy company.

I'd love to see an update like this (Avalon) from BFL or Tom: https://bitcointalk.org/index.php?topic=120184.msg1381739#msg1381739

meh.

Rather see a shipping notification.

I actually see it as very good news. I just wonder if these are complete renders. (As in detailed)

The good news I can gather from their renders is that the solution Tom has gone with is extremely simple scalability. His board is the same in every direction. As in a uniform design. So if he wanted to, he could probably just make a bigger board and scale his hashing power in clusters.

If he would put in some controlling logic like BFL did with their boards (for the tethered/interconnected boards of the mini rig), he would be able to scale his hashing units to an incredible degree.

source: first post of the linked thread.

Atleast some movement, drawings is good :) Lets see what BFL will draw next :D

I love how the fans apparently push down the air onto the heat sinks, creating a nicely effective pocket of heat as soon as that thing sits in an enclosure. Wouldn't want those poor Asics to be cold now.

They will draw criticism from their most hardened supporters.

Take a look:

https://forums.butterflylabs.com/bfl-forum-miscellaneous/519-10-dec-2012-bfl-asic-update-4.html

Crazy (as in sensible) comments going on over there.

Which comment is the sensible one? Is it the one who says the delay is a great chance to order more ASICs with granny's christmas money? Or is it the one where they guy thinks there's a conspiracy and the fab is holding back ASICs to mine with them themselves?

Some dealt with the news better than others?

I think some just lost their mind. Perhaps they have been driven insane by the waiting. I believe there is a thread on their forums for exactly that....I forget the link at this time.

[Speculation, opinionated commentary below]

To alliterative their potential mental damage. I believe the rep decided to pull some random object from the shelf and asked everyone to guess what it belongs to.

Some played along for a page or two trying to guess what the plastic looking object looked like to them. Sort of like an inkblot test but with their minds and emotions. But then the apparent madness set in as their human reasoning started to react (to the delay of course).

You have to wonder how the rep treats his customers....it's almost like they are a hampster or lab rat when he did that (https://forums.butterflylabs.com/bfl-forum-miscellaneous/519-10-dec-2012-bfl-asic-update-2.html#post7804). I thought they would have balked at it at first, but then they played along for about a page.

Strange isn't it?

Here's design of BTCFPGA custom-ASIC:
https://i.imgur.com/UYg01.png?1
http://uploader.hellground.pl/di/DK38/ASIC.png
Pretty cool, isn't?!  ;D

Unless everything is on the chips, is this design not missing some stuff?

So where can I order your design and when do you say your going to ship?  I hope you say December, HA, LOL  Love this post.....

You an I are looking at different pictures, clearly.

Clearly. :)

Last spec update I saw had board size at 7"x7.5"x2.167" for 72Gh. Given that we're talking about 16 90nm ASICs on that board I believe that to be very reasonable, but YMMV.

At least one structured ASIC manufacturer I've seen actually requires JTAG for their own internal testing purposes, believe it or not. Besides, even if you're not planning on using it to test the chips themselves, you can always use the boundary scan chain to test the interconnects on the PCB they're mounted to.

Yeah, it appears to be missing a few minor things like buck converters to actually power the chips. Nothing terribly important ;)

Nice design..

Curious why the chips are different sizes in the drawing?



(not serious) :)

I don't see any difference between your schematics (I just love that word) and the renderings in the OP. You better be careful or Tom will sue your ass for copyright infringement or something like that!

I'm going to fire up "Paint" and build my own asic device :D


Mine will be circular.. "patent pending"

Responses like this are exactly why Tom didnt feel comfortable posting pictures of the prototype, or power figures (even a guess), or a rendering. You cant please everyone and there will always be someone who bitches. I agree that they could be better, but I would rather devote time into the physical product rather than making fancy renderings and pictures to plaster all over net.


If you look at the MMQs vs BFL singles, the MMQ had a lot less board components than the singles did/do. Not saying that the bASIC will be the same way but the MMQs worked just fine....

If I had to guess, I'd say they might use something like the Delta POL convertor (http://www.digikey.ca/product-detail/en/D12F200A/941-1045-ND/2501317) that they used on the MMQ.

Pretty sweet looking. I probably would have gone with one big fan rather than four small ones for noise but I'm sure it will be easy enough to change.

No fans. Water!

If the chips are numbered like this:

 1  2  3  4
 5  6  7  8
 9 10 11 12
13 14 15 16

One large fan probably wouldn't cool chips 6,7,10, and 11 (the chips in the center) all that well. 4 small fans helps keep equal cooling across all chips. It's still not perfect, but decent.

Also realised the board is 7 1/2 inches by 7 inches! That's huge fan.

Would it even need a fan at all? Say its 120watts and 16 chips, thats 7.5watts per chip. Wouldnt a heatsink alone be enough to keep them cool?

180mm = 7.087 inches. Now that's a cooling fan.

A quadcopter that mine bitcoin. The coolest toy ever.

7" x 7.5" you say?

Yes, that's so compact!

and so obviously efficient!

I'm glad we agree on this. ;)

The fans don't seems to extend the full 7", so I'm going to assume that maybe it's 4x 70mm or 80mm fans? I'm assuming you could replace them with a larger 140mm fan, but like I said, it wouldn't cool the center ones as well.

Consider it this way: the current MMQ has 4 chips, and pulls 40W. Even at 10W/each, they have a heatsink with a built in fan for every chip. Lowering the thermal output by 25%, but then sharing one larger fan between 4 heatsinks, would be about the same.

https://www.btcfpga.com/forum/index.php?topic=355.15

Hurray for Solidworks mechanical renderings of an electrical system.... where are the electrical pcb renderings?...

Are the colored things at the bottom seriously LEDs? 64 of them? I might not need a Christmas tree if I can get one of these by the 25th :)

I haven't publicly laughed at the amateurishness of the 'renderings' yet, so...

BWAHAHAHHAHAAHAHAAHHAHAH!

Oh that's precious.

Feel better? :D

As I don't intend to mine with renderings, I'm fine with amateurish pictures, just put the real thing in a box and ship it to me.

Thats true, I guess I was comparing it to the 5watt that the rpi uses. Although the probably would not be used in a situation where it would be maxed out for extended periods of time like an ASIC will.

I don't consider compactness to be very important for this product.

If they reduced it to a 3.1337" board, and it delayed the shipment by one day, that would be a trade-off not worth making IMO.

The whole Rpi uses 5W at max load. Just the SoC does not use quite that much. These chips themselves will be using a min of 7W each, and they will be at max load 24/7.

+1  ::)

Quoting that in case you're wrong later. :) 7w@16 chips = 112w. If the rest of the circuitry and perty perty blinky things consume 8w or less that would put bASIC01 within it's stated power consumption envelope. I can definitely live with 72Gh@120w, particularly if it ships in January.

I'm glad you can,I can't.But I may have too,If BFL dosen't deliver or screws the pooch like they did with the FPGA power consumption.

I have a bad feeling they underestimated & won't say a thing until the last minute,like this chip delivery crap  >:(

I was in on the BFL Single orders,but late enough to not feel the late shipping prob.This ASIC thing is almost the exact same scenario of the FPGA fiasco,go figure  ::)