Bitcoin Forum

Bitcoin => Hardware => Topic started by: form on November 02, 2013, 01:10:45 AM



Title: Open Source Avalon Gen2 55nm Board
Post by: form on November 02, 2013, 01:10:45 AM
edit:
A 16-chip board design is available now.
For further information see page 5 in this thread ->
https://bitcointalk.org/index.php?topic=323175.msg3756070#msg3756070

------------------------------------------------------------------------------------
Old posting:

I got some next-gen Avalon 55nm chips and arranged them on a board to test their communication and explore its options.
The BkkCoins' Klondike implementation was a big inspiration for me, so the design and the firmware is very similar to it - So no need to reinvent the wheel again.
Wherever BkkCoins is now, i wish him all the best, and may he come back soon.

I'm still searching for people who want to contribute to this project.
If you have some ideas for features of the board, please suggest them on https://github.com/formtapez/avalon or at #avalon2 on FreeNode IRC.


https://raw.github.com/formtapez/avalon/master/Photos/DSCN9448.JPG
https://raw.github.com/formtapez/avalon/master/Layout/schematic.png


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Beastlymac on November 02, 2013, 01:14:18 AM
That is a good looking board, nice that you made it open source.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Bicknellski on November 02, 2013, 01:25:22 AM

Agreed.

-------

Not sure how much support there is for chips from Avalon given what they have done to everyone. Plus the fact the chips "underperform" and are not as "cost effective" as Bitfury chips which are available right now.

Personally I'd really want to support efforts like this if there are future plans to utilize other chips other than Avalon.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: fasmax on November 02, 2013, 01:34:10 AM
Nice!
Is that a 4 layer PCB?
What's the part number of that .9 volt power supply?
Did you use the same PIC16LF1459 chip ?


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: form on November 02, 2013, 01:44:21 AM
Is that a 4 layer PCB?
Yes, for better power-distribution i choosed a 4-layer pcb.

What's the part number of that .9 volt power supply?
PTH12040W => http://www.ti.com/product/pth12040w (http://www.ti.com/product/pth12040w)

Did you use the same PIC16LF1459 chip ?

Yes, only small modifications to the "Clock Configuration Segment" (Chapter 4.1 of the datasheet) were necessary.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: fasmax on November 02, 2013, 01:54:31 AM
Do you have the ASIC's chips in 2 banks?
Also what hash rate are you getting with this board ?



Title: Re: Open Source Avalon Gen2 55nm Board
Post by: eroxors on November 02, 2013, 01:58:16 AM
How did you get early access to the chips? When did you get them?


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Bogart on November 02, 2013, 05:24:01 AM
That's cool, but, uh...do you think you could get the Cointamination boards working before you dive into this project?  A lot of us are really hoping for some success there.

With respect.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Lucko on November 02, 2013, 07:15:09 AM
It is not like he is not doing this. He had this board about finished for some time now... If he wouldn't work on Cointamination it would be publish at the start of the week...


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: form on November 05, 2013, 06:37:58 PM
Do you have the ASIC's chips in 2 banks?
Also what hash rate are you getting with this board ?

Yes, 2 banks with 5 chips each.
I didn't had much time, but today i managed to get them hashing.
The parameters and clocking are far from optimum, and as you see, it is not 100% compatible to the Klondike-driver yet.

http://my.root4u.de/avalon2-firsthash.png

I will do further investigation tomorrow, and come back here with more results.


How did you get early access to the chips? When did you get them?

I got them ~2 weeks ago for this contest:
http://avalon-asics.com/avalon-gen2-55nm-open-source-design-contest/


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: driksson on November 05, 2013, 10:15:39 PM
design boards that fit in standard avalon casing! so we can scrap the old cards and get 4x80x1.5GH per unit.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: spiccioli on November 05, 2013, 10:18:45 PM
design boards that fit in standard avalon casing! so we can scrap the old cards and get 4x80x1.5GH per unit.

+1

there are around 1500 Avalon units from batch #1,#2 and #3

Create a blade which can be used to replace a current one in an avalon and sell it at a price which leaves a 20-30% earning margin to the buyer and you can probably sell six thousands of such blades in a few hours...

spiccioli


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: therustytrombone on November 06, 2013, 02:04:10 AM
design boards that fit in standard avalon casing! so we can scrap the old cards and get 4x80x1.5GH per unit.

+1

there are around 1500 Avalon units from batch #1,#2 and #3

Create a blade which can be used to replace a current one in an avalon and sell it at a price which leaves a 20-30% earning margin to the buyer and you can probably sell six thousands of such blades in a few hours...

spiccioli


Whoever does this will be a hero to many in this community!  ;D


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: driksson on November 06, 2013, 06:21:08 AM
i do think its the first thing avalon will sell when they sold all g1 chips..
500 g2 chips are 12btc now.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: driksson on November 06, 2013, 06:50:58 AM
make same size as gen1 unit so we can reuse the heatsinks and contact ckolivas for firmware support.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: capa on November 06, 2013, 05:48:49 PM
I'd certainly be very interested in some of these boards if the price is right :)


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: klondike_bar on November 06, 2013, 09:04:13 PM
can the 2nd level pcb be mered into a single PCB? having the extra steps of assembly will make costs significantly higher for this design. KISS method


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: DeathAndTaxes on November 06, 2013, 09:07:31 PM
can the 2nd level pcb be mered into a single PCB? having the extra steps of assembly will make costs significantly higher for this design. KISS method

The entire "second level pcb" is a standalone part. 


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: klondike_bar on November 06, 2013, 11:01:39 PM
can the 2nd level pcb be mered into a single PCB? having the extra steps of assembly will make costs significantly higher for this design. KISS method

The entire "second level pcb" is a standalone part. 

okay thats more reasonable then :)   any of these (unpopulated) for sale? ive got 10 chips coming next week and nothing to use them with


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Lucko on November 07, 2013, 09:20:17 PM
What's the part number of that .9 volt power supply?
PTH12040W => http://www.ti.com/product/pth12040w
If anyone is interested I have some of thus I can sell you...


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: klondike_bar on November 07, 2013, 10:51:24 PM
What's the part number of that .9 volt power supply?
PTH12040W => http://www.ti.com/product/pth12040w
If anyone is interested I have some of thus I can sell you...

for only 10 chips, a smaller 30A component would likely suffice, such as the one bitfury hardware uses:  Texas Instruments TPS53355 http://www.ti.com/product/tps53355
it serves a similar (or identical?) purpose, with a much smaller footprint and is almost certainly cheaper to source and install.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Lucko on November 08, 2013, 07:31:55 AM
Yes but this is 10 chips because he has 10 chips... And 24W power usage. So yes only bit more then 50% at the moment but there is also efficiently that you need to think about. And overheating. I have a Chili board. And the biggest problem is power supply. It is on the limit and it needs additional cooling or the board slows down by 20%... So because you have save some $ on parts you need now additional cooling(fan and heatsinks) on power supply and that cost more then stronger power supply and uses more power since you need a fan and it runs in less effective part of operational range... Not to talk about lost hashes... So some parts are better if they are stronger...


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: ngzhang on November 08, 2013, 09:26:25 AM
In our under development design, I use a 45A rated, 55A stable, 60A peak DC-DC circuit for 14 chips. I do think this is a good start.

Basic configuration is 7 chips pre bank, 2 banks share one DC-DC. Will open-source when the test is over.

By different operation voltage and clock speed, the chips power consumption is vary greatly. for example, 1GH@0.8V only consume <1.5W, about 1.9Amps. 1.5GH@1V is about 3.75W, about 3.75Amps. There is no doubt this chip can over clock to 2GH (this is limited by PLL at 25MHz XCLK input), but the voltage must increase to maybe 1.1V (NOT tested),  the overall power consumption may increase to 6W and 5.5 Amps.

So, select which DC-DC module is depend on which type of product you want. more power efficient or push the chips to its limit?

By personal views, A3255 chip is cheap, if over clock too much will go with a huge increase of peripheral (DCDC, heat dissipation, etc)cost, then it's unworthy. just add a few chips and run under lower voltage. In other words, this is an art of balancing.

In addition, use Ti power module is a good solution for fast shipping, but they are really costy. I will release a opensourced 2 phase 55A DC-DC design for reference next month(sorry, it's a bit slow but high-current DC-DC circuit is not easy to design and debug), it' maybe only cost 5$.



Title: Re: Open Source Avalon Gen2 55nm Board
Post by: HorseRider on November 08, 2013, 09:34:25 AM


By different operation voltage and clock speed, the chips power consumption is vary greatly. for example, 1GH@0.8V only consume <1.5W, about 1.9Amps. 1.5GH@1V is about 3.75W, about 3.75Amps.

How crappy it is! Ones who dont keep promise usually are stupid. When stupid asses design a chip, they design a chip only worth a shit. 2.5J/GH,  ;D ;D ;D ;D ;D. It is a joke, ng. You have wasted the fabrication capacity of TSMC. If I were the designer, I would have killed myself as I could not bear the shame of this chip.

Everyone who has been burnt by Avalon, please spend 20 seconds of your time and give this stupid and evil ngzhang a negative feedback:

https://bitcointalk.org/index.php?action=trust;u=38132


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: aneutronic on November 08, 2013, 09:58:59 AM

Wherever BkkCoins is now, i wish him all the best, and may he come back soon.


Agreed.

-------

Not sure how much support there is for chips from Avalon given what they have done to everyone. Plus the fact the chips "underperform" and are not as "cost effective" as Bitfury chips which are available right now.

Personally I'd really want to support efforts like this if there are future plans to utilize other chips other than Avalon.

+1

Nice design but pick another chip, why would you want to support scammers with an inefficient chip.

avalon screwed enough people here already,    >:(

please don't help them screw more.


Title: Here is the real reason why Avalon is back
Post by: Wesly on November 08, 2013, 11:00:38 AM
Thank you for all encouragement and inspiration above, there is no doubt Avalon project will not grow up without your criticisms.

Also, we will not waste a cent on losers.

Decentration is one for the most important spirit of Bitcoin, so we still stick to chip selling, rather than maching making or self-mining, this is our belief but needs the joint efforts of the whole community.


Are you guys seriously working with Avalon who openly called their previously customers losers?

"criticisms" = "encouragement and inspiration"?  What are you?  LeBron James?  You guys are so out of touch with the Bitcoin community it is not even funny.  What's with all these double/passive-aggressive talk?  How can you expect to regain people's trust when you called your previous paid customers that you screwed over losers?  If nothing else, you guys are the one who is responsible for creating these money/bitcoin 'losers'.

You must be hurting for business to have to come crawling back here asking for more money?  And auctioning your chips off with ZERO bid.  Because of your major screw-ups you are now forced to prepaid for overprice, under-performing silicons that you can't sell and trying to keep alive developing the next gen before you run out of money.

Don't give us the BS about "decentralization" (can't even spell it right, let alone know the meaning) and "spirit of Bitcoin", and therefore you are not self-mining.  The reason you are not self-mining is because it is unprofitable by the time you can mass-producing your miner with your inferior chips for a reasonable cost, the constant 40%+ difficulty (soon to be 80% as KnC release their B2 and again in December when HF release B1/B2) increase every 10 days is killing any chance for ROI even with free electricity and you know it...   Besides, even when time is good, it is hard to scale as can attested by ASICMiner.  They learnt real quick it is much more profitable and less headache to pass on the hot potatoes (miners) to the next suckers/'losers'.  If a large and resourceful company with all these profits from previous batches can't built miner (at cost without any markup) profitable, how can you expect an individual to pay for miner with huge markups from you, board builders, assembler using your underperforming chips?  If you don't know that then you are an even bigger fool than you are or think we all are.  But I bet you are smart enough to know that don't you?


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Bogart on November 09, 2013, 01:37:52 AM
Nice design but pick another chip, why would you want to support scammers with an inefficient chip.

avalon screwed enough people here already,    >:(

please don't help them screw more.

I have to agree.  Avalon/BitSyncom deserves zero support from the community they have screwed over repeatedly, all while continuing to show no remorse.  They even call us losers.

I personally will not buy such a board because of this, no matter how attractive the pricing.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: jtothevds on November 09, 2013, 07:31:14 PM
design boards that fit in standard avalon casing! so we can scrap the old cards and get 4x80x1.5GH per unit.

This probably isn't too much of a challenge if you lost the TI part. I have converted the Eagle files to Altium, they need some cleanup but would happily commit them into the repository if you like...


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: form on November 09, 2013, 08:33:29 PM
Some progress to report...
At 1.03 V my chips seem to run pretty stable around 14 GH/s.
I can't do power-measurements right now, because the voltage-drop on my current-meter is so big that i cannot calculate the power without a big error. (Can't measure actual voltage at the same time now, maybe on monday.)

Firmware and cgminer-driver seems to run pretty good at the moment, besides some Idle-Warnings from time to time and a decent HW-error rate of ~1.7 %.

http://my.root4u.de/avalon2-secondhash.png



I have converted the Eagle files to Altium, they need some cleanup but would happily commit them into the repository if you like...

Very good. If you tell me how i can gain you access to the github repo, i would be very interested.
But be aware that this is only a test-board. If i make a final one (if here is some interest), a few things will change. For example the number of chips, dimensions, or the placement of the decoupling caps and things around the chips - It would be better if the components are a bit lower then the chips or are not in the way for a topside-heatsink. I wasnt aware that the chips need more cooling from the top side as from the bottom side. At the moment i have some copper distance pieces and little chipset-heatsinks on the chips, but that just doesnt scale.


https://raw.github.com/formtapez/avalon/master/Photos/CIMG4612.JPG
https://raw.github.com/formtapez/avalon/master/Photos/CIMG4613.JPG


design boards that fit in standard avalon casing! so we can scrap the old cards and get 4x80x1.5GH per unit.

That sounds interesting, but unfortunately i don't own such a avalon case. It would be helpful when someone who has one, tells me the exactly dimentions of the board, heatink positions, etc. and can provide some detailed photos.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: klondike_bar on November 09, 2013, 10:33:59 PM
Some progress to report...
At 1.03 V my chips seem to run pretty stable around 14 GH/s.
I can't do power-measurements right now, because the voltage-drop on my current-meter is so big that i cannot calculate the power without a big error. (Can't measure actual voltage at the same time now, maybe on monday.)

Firmware and cgminer-driver seems to run pretty good at the moment, besides some Idle-Warnings from time to time and a decent HW-error rate of ~1.7 %.

http://my.root4u.de/avalon2-secondhash.png



I have converted the Eagle files to Altium, they need some cleanup but would happily commit them into the repository if you like...

Very good. If you tell me how i can gain you access to the github repo, i would be very interested.
But be aware that this is only a test-board. If i make a final one (if here is some interest), a few things will change. For example the number of chips, dimensions, or the placement of the decoupling caps and things around the chips - It would be better if the components are a bit lower then the chips or are not in the way for a topside-heatsink. I wasnt aware that the chips need more cooling from the top side as from the bottom side. At the moment i have some copper distance pieces and little chipset-heatsinks on the chips, but that just doesnt scale.


https://raw.github.com/formtapez/avalon/master/Photos/CIMG4612.JPG
https://raw.github.com/formtapez/avalon/master/Photos/CIMG4613.JPG


design boards that fit in standard avalon casing! so we can scrap the old cards and get 4x80x1.5GH per unit.

That sounds interesting, but unfortunately i don't own such a avalon case. It would be helpful when someone who has one, tells me the exactly dimentions of the board, heatink positions, etc. and can provide some detailed photos.

looks good - whats the blue component, a wifi antenna? It may be better to scrap that component to save a few dollars on parts/assembly since most users prefer to run an ethernet line (my 2c - either way i really like the board and applaud its working!!


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Lucko on November 10, 2013, 08:37:40 PM
That is for regulating voltage. Trimpot...


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: klondike_bar on November 10, 2013, 08:41:25 PM
That is for regulating voltage. Trimpot...

whoops, now that i look i actually see the markings on it - makes sense! At first glance i thought it was a little antennae connector.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: driksson on November 11, 2013, 01:25:42 PM

design boards that fit in standard avalon casing! so we can scrap the old cards and get 4x80x1.5GH per unit.

That sounds interesting, but unfortunately i don't own such a avalon case. It would be helpful when someone who has one, tells me the exactly dimentions of the board, heatink positions, etc. and can provide some detailed photos.

It should be readily available for avalon gen 1. there all designs are public in their github.
https://github.com/BitSyncom/avalon-ref

I believe its the controller that avalon uses , since the avalon 1-2-3 units have up to 320 chips have to be quite advanced?
Im not sure, this is things i have heard.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: DPoS on November 11, 2013, 11:33:20 PM
Avalon are a bunch of worthless apes!   :P


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Spotswood on November 12, 2013, 01:21:04 AM
Please enlarge the board in order to make room for mounting holes in all four corners (like the Klondike board).  That way the boards could be mounted properly in an open-air case:

http://i715.photobucket.com/albums/ww153/Spotswood_/BlackArrow%20Tray/BlackArrowTrayv1A_zpsea78d51f.jpg (http://s715.photobucket.com/user/Spotswood_/media/BlackArrow%20Tray/BlackArrowTrayv1A_zpsea78d51f.jpg.html)


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: allinvain on November 12, 2013, 05:23:16 AM
Open air cases are nice, but personally I'd prefer if these modules were a drop-in replacement for existing Avalon modules. The Avalon cases are a pretty solid design (with the exception of the top lid screws) so IMHO it would be a shame if us existing Avalon owners could no longer use them.

Ngzhang, are you guys going to produce your own modules, or are you going to abandon the backwards compatibility idea?


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: QualitySeeds on November 12, 2013, 03:58:12 PM
Thanks for your opensource project :-)

And do u guys still work on this project ?


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Lucko on November 12, 2013, 04:50:54 PM
If there is some interest for sure... We do looking into way to put this in Avalon casing...


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: QualitySeeds on November 12, 2013, 05:01:50 PM
If there is some interest for sure... We do looking into way to put this in Avalon casing...
I'am and there should be more...;-) there are only a few opensource topic's and surely people would like to know more about that....I'm getting into the whole pcb design and frankly i love it there is sow much potential

A friend have's allot of equipment i can use to make a board and test it and if i all get it prob buy that for my own really
just getting started sow i do not know if i can help you with anything....

What kind of software where u using making the pcb design ? a'm using Kicad

( can order 80 or more A3256-Q48 ) hope its legit do



Title: Re: Open Source Avalon Gen2 55nm Board
Post by: ngzhang on November 12, 2013, 05:45:25 PM

Ngzhang, are you guys going to produce your own modules, or are you going to abandon the backwards compatibility idea?

We will release a few (very few) Avalon Gen2 Mini prototype on our shop in 1-2 days, this prototype will NOT mass production.

http://avalon-asics.com/shop/

(not put up yet)

It's basically based on our open-sourced design, 96 chips running at 1V/1.5GH, 144G overall speed. most of the parts are the same with Gen1 mini.

I think this is a start, it's easy to build upgrade modules for Gen1 machines.

But we will NOT produce compatible modules our self in large number, a lot of people can do it faster I think.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: greaterninja on November 12, 2013, 06:42:34 PM

Ngzhang, are you guys going to produce your own modules, or are you going to abandon the backwards compatibility idea?

We will release a few (very few) Avalon Gen2 Mini prototype on our shop in 1-2 days, this prototype will NOT mass production.

http://avalon-asics.com/shop/

(not put up yet)

It's basically based on our open-sourced design, 96 chips running at 1V/1.5GH, 144G overall speed. most of the parts are the same with Gen1 mini.

I think this is a start, it's easy to build upgrade modules for Gen1 machines.

But we will NOT produce compatible modules our self in large number, a lot of people can do it faster I think.

Avalon still owes me 18 btc from trade-ins.   And Batch #3 was a total scam, it has paid 46 out of  103 btc I had paid.


I suggest you and Yifu rectify these issues you have created first.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: eroxors on November 12, 2013, 07:26:37 PM
It's sure nice to see Avalon helping with open source projects based on their chips.... nevermind that they've utterly screwed everyone in batch 3, anyone tied to chip orders, and everyone who sent hardware in for tradins.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: QualitySeeds on November 12, 2013, 08:02:50 PM

Ngzhang, are you guys going to produce your own modules, or are you going to abandon the backwards compatibility idea?

We will release a few (very few) Avalon Gen2 Mini prototype on our shop in 1-2 days, this prototype will NOT mass production.

http://avalon-asics.com/shop/

(not put up yet)

It's basically based on our open-sourced design, 96 chips running at 1V/1.5GH, 144G overall speed. most of the parts are the same with Gen1 mini.

I think this is a start, it's easy to build upgrade modules for Gen1 machines.

But we will NOT produce compatible modules our self in large number, a lot of people can do it faster I think.
Are u gonna publish that as opensource to ? after you have your sales completed i would like to start my own but to little knowledge on this moment


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Lucko on November 12, 2013, 08:21:19 PM

Ngzhang, are you guys going to produce your own modules, or are you going to abandon the backwards compatibility idea?

We will release a few (very few) Avalon Gen2 Mini prototype on our shop in 1-2 days, this prototype will NOT mass production.

http://avalon-asics.com/shop/

(not put up yet)

It's basically based on our open-sourced design, 96 chips running at 1V/1.5GH, 144G overall speed. most of the parts are the same with Gen1 mini.

I think this is a start, it's easy to build upgrade modules for Gen1 machines.

But we will NOT produce compatible modules our self in large number, a lot of people can do it faster I think.
The main problem at the moment is that we think that new program for FPGA is necessary for new modules to work. Is this right? Also is it strong enough? Since you plan to do that it is probably possible and if we don't need to worry about writing program for FPGA that helps a lot... I did not looked at all cerfuly but I could not see code for it on https://github.com/BitSyncom/avalon-ref

Can you tell more on this product that is coming? Will it worked if you put only one in and other Gen1 modules will still work? Any changes to FPGA needed? Anyway I would be interested in one and plans for it...

Please enlarge the board in order to make room for mounting holes in all four corners (like the Klondike board).  That way the boards could be mounted properly in an open-air case:

http://i715.photobucket.com/albums/ww153/Spotswood_/BlackArrow%20Tray/BlackArrowTrayv1A_zpsea78d51f.jpg (http://s715.photobucket.com/user/Spotswood_/media/BlackArrow%20Tray/BlackArrowTrayv1A_zpsea78d51f.jpg.html)
This is more or less biased on that board so make it compatible with it is not a problem. I can't see a problem making this work. But making it just to make it is not best way to go... So if someone is ready to commit to have them made would be nice since there are a lot of signals that community will not buy anything from Avalon.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: erk on November 12, 2013, 08:27:49 PM
Nice project. My concern it that Avalon will let us down with chip supply again like happened to the Klondike project. Does anyone have any information on there chip sales/schedule?



Title: Re: Open Source Avalon Gen2 55nm Board
Post by: QualitySeeds on November 12, 2013, 09:08:23 PM
Nice project. My concern it that Avalon will let us down with chip supply again like happened to the Klondike project. Does anyone have any information on there chip sales/schedule?


You can order online Avalon chips A3256-Q48 if thats what you mean..otherwise i do not get it ;-)..and that's always a option 


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: mrb on November 12, 2013, 09:33:03 PM
Create a blade which can be used to replace a current one in an avalon and sell it at a price which leaves a 20-30% earning margin to the buyer and you can probably sell six thousands of such blades in a few hours...

That's the impossible part. Everybody has a different idea of what the price should be to "leave 20-30% earning margin". And if you want to satisfy most potential buyers, the price has to be such that the vendor has to sell at loss.

Look: a Avalon 55nm chip at 1.5Gh/s delivered about 2 weeks from today would probably not mine more than 0.060-0.070 BTC during its entire lifetime (most people would agree). If you want to leave 20-30% earning margin, it means the vendor would have to sell at less than 0.046-0.058 BTC per chip. But the chip alone costs 0.060 BTC from Bitsyncom...


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: erk on November 12, 2013, 09:43:46 PM
Create a blade which can be used to replace a current one in an avalon and sell it at a price which leaves a 20-30% earning margin to the buyer and you can probably sell six thousands of such blades in a few hours...

That's the impossible part. Everybody has a different idea of what the price should be to "leave 20-30% earning margin". And if you want to satisfy most potential buyers, the price has to be such that the vendor has to sell at loss.

Look: a Avalon 55nm chip at 1.5Gh/s delivered about 2 weeks from today would probably not mine more than 0.060-0.070 BTC during its entire lifetime (most people would agree). If you want to leave 20-30% earning margin, it means the vendor would have to sell at less than 0.046-0.058 BTC per chip. But the chip alone costs 0.060 BTC from Bitsyncom...
The chips would have to be under $10 to be useful. This pricing in BTC is bad, it's should be priced in fiat and you can pay in BTC using Bitpay which works out the exchange rate on the spot. If chip delivery takes more than 2 weeks, then it's probably not worth taking the risk and simply keeping your BTC as it's generally rising in value.





Title: Re: Open Source Avalon Gen2 55nm Board
Post by: MrTeal on November 12, 2013, 09:45:04 PM
Nice board form. If you are looking at hole spacing for heatsinks, can I suggest you use the ones for a half brick DC/DC convertor? The spacing is 1.9" x 2.0", and because they're standardized they're easy to get anywhere so availability isn't a problem.
http://www.digikey.com/product-detail/en/VHS-95/102-1489-ND/1016697
They're also very cheap for what you get.

By personal views, A3255 chip is cheap, if over clock too much will go with a huge increase of peripheral (DCDC, heat dissipation, etc)cost, then it's unworthy. just add a few chips and run under lower voltage. In other words, this is an art of balancing.
While I wish this were the case, it's not really true given the current price of BTC. At 12BTC/reel, it's US$8.40 per chip or $5.6/GH/s. Just for chips that's untenable, as you're at the same price per GH/s as the Bitfury chips which are more efficient and have a multitude of designs available already. I like the idea, but you need to revisit your pricing.

Yes but this is 10 chips because he has 10 chips... And 24W power usage. So yes only bit more then 50% at the moment but there is also efficiently that you need to think about. And overheating. I have a Chili board. And the biggest problem is power supply. It is on the limit and it needs additional cooling or the board slows down by 20%... So because you have save some $ on parts you need now additional cooling(fan and heatsinks) on power supply and that cost more then stronger power supply and uses more power since you need a fan and it runs in less effective part of operational range... Not to talk about lost hashes... So some parts are better if they are stronger...
I wouldn't say that, the power supply in the Chili actually runs fine with no airflow or heatsink at its nominal voltage and current (1V, ~90-100A) though it does get warm. The board just auto-overclocks in order to increase the hashrate, and the BFL can actually pull almost 20A each if they are really pushed. The RevB chips are actually even more power hungry than the first gen ones, which exacerbates the problem. The board doesn't slow down by 20% without extra cooling on the power supply, it just can't be overclocked as far.



Title: Re: Open Source Avalon Gen2 55nm Board
Post by: QualitySeeds on November 12, 2013, 09:54:46 PM
Create a blade which can be used to replace a current one in an avalon and sell it at a price which leaves a 20-30% earning margin to the buyer and you can probably sell six thousands of such blades in a few hours...

That's the impossible part. Everybody has a different idea of what the price should be to "leave 20-30% earning margin". And if you want to satisfy most potential buyers, the price has to be such that the vendor has to sell at loss.

Look: a Avalon 55nm chip at 1.5Gh/s delivered about 2 weeks from today would probably not mine more than 0.060-0.070 BTC during its entire lifetime (most people would agree). If you want to leave 20-30% earning margin, it means the vendor would have to sell at less than 0.046-0.058 BTC per chip. But the chip alone costs 0.060 BTC from Bitsyncom...
The chips would have to be under $10 to be useful. This pricing in BTC is bad, it's should be priced in fiat and you can pay in BTC using Bitpay which works out the exchange rate on the spot. If chip delivery takes more than 2 weeks, then it's probably not worth taking the risk and simply keeping your BTC as it's generally rising in value.




I see avalon chips that are cheaper then 10$


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: mrb on November 12, 2013, 10:23:59 PM
I see avalon chips that are cheaper then 10$

Probably Avalon 110nm. We are talking about 55nm chips here.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: MrTeal on November 12, 2013, 10:26:56 PM
I see avalon chips that are cheaper then 10$

Probably Avalon 110nm. We are talking about 55nm chips here.

12BTC for a reel of 500. At $350/BTC, that's $8.40 per chip.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: fasmax on November 13, 2013, 12:11:24 AM
Create a blade which can be used to replace a current one in an avalon and sell it at a price which leaves a 20-30% earning margin to the buyer and you can probably sell six thousands of such blades in a few hours...

That's the impossible part. Everybody has a different idea of what the price should be to "leave 20-30% earning margin". And if you want to satisfy most potential buyers, the price has to be such that the vendor has to sell at loss.

Look: a Avalon 55nm chip at 1.5Gh/s delivered about 2 weeks from today would probably not mine more than 0.060-0.070 BTC during its entire lifetime (most people would agree). If you want to leave 20-30% earning margin, it means the vendor would have to sell at less than 0.046-0.058 BTC per chip. But the chip alone costs 0.060 BTC from Bitsyncom...
Am I missing something Avalon's website says 500 gen2 for 12BTC.
So 12/500 = .024 BTC per chip?


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: marto74 on November 13, 2013, 05:50:42 AM
Nice project. My concern it that Avalon will let us down with chip supply again like happened to the Klondike project. Does anyone have any information on there chip sales/schedule?


I made an order for 500 chips in Sunday.
Yesterday Fedex called me that sending is here and I have to go to the customs


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Wesly on November 13, 2013, 06:14:11 AM
Create a blade which can be used to replace a current one in an avalon and sell it at a price which leaves a 20-30% earning margin to the buyer and you can probably sell six thousands of such blades in a few hours...

That's the impossible part. Everybody has a different idea of what the price should be to "leave 20-30% earning margin". And if you want to satisfy most potential buyers, the price has to be such that the vendor has to sell at loss.

Look: a Avalon 55nm chip at 1.5Gh/s delivered about 2 weeks from today would probably not mine more than 0.060-0.070 BTC during its entire lifetime (most people would agree). If you want to leave 20-30% earning margin, it means the vendor would have to sell at less than 0.046-0.058 BTC per chip. But the chip alone costs 0.060 BTC from Bitsyncom...
Am I missing something Avalon's website says 500 gen2 for 12BTC.
So 12/500 = .024 BTC per chip?


I didn't realize these chips have built-in Wifi Internet and come ready to daisy-chain to each other and power directly by 110V/220V AC outlet all while self-cooling to below 50 °C.  I am ordering 50,000 of these magical chips right away!


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: klondike_bar on November 13, 2013, 12:23:51 PM
Create a blade which can be used to replace a current one in an avalon and sell it at a price which leaves a 20-30% earning margin to the buyer and you can probably sell six thousands of such blades in a few hours...

That's the impossible part. Everybody has a different idea of what the price should be to "leave 20-30% earning margin". And if you want to satisfy most potential buyers, the price has to be such that the vendor has to sell at loss.

Look: a Avalon 55nm chip at 1.5Gh/s delivered about 2 weeks from today would probably not mine more than 0.060-0.070 BTC during its entire lifetime (most people would agree). If you want to leave 20-30% earning margin, it means the vendor would have to sell at less than 0.046-0.058 BTC per chip. But the chip alone costs 0.060 BTC from Bitsyncom...
Am I missing something Avalon's website says 500 gen2 for 12BTC.
So 12/500 = .024 BTC per chip?


I didn't realize these chips have built-in Wifi Internet and come ready to daisy-chain to each other and power directly by 110V/220V AC outlet all while self-cooling to below 50 °C.  I am ordering 50,000 of these magical chips right away!

what are you smoking? Obviously the chips need to be part of a system, just like the gen1 chips and chips made by every other manufacturer.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Lucko on November 13, 2013, 12:44:42 PM
He is making a point that you need a board and that increase costs...


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: HorseRider on November 13, 2013, 03:13:44 PM

Ngzhang, are you guys going to produce your own modules, or are you going to abandon the backwards compatibility idea?

We will release a few (very few) Avalon Gen2 Mini prototype on our shop in 1-2 days, this prototype will NOT mass production.

http://avalon-asics.com/shop/

(not put up yet)

It's basically based on our open-sourced design, 96 chips running at 1V/1.5GH, 144G overall speed. most of the parts are the same with Gen1 mini.

I think this is a start, it's easy to build upgrade modules for Gen1 machines.

But we will NOT produce compatible modules our self in large number, a lot of people can do it faster I think.
ngzhang is a scammer. If you are not familiar with this guy, please see his trusting feedback. If you have been hurt by him, give him a negative feedback, it only spends you 20 seconds.

https://i.imgur.com/MlFbazV.png


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: QualitySeeds on November 13, 2013, 03:27:40 PM
I see avalon chips that are cheaper then 10$

Probably Avalon 110nm. We are talking about 55nm chips here.

Can't we make a pcb-board for 110nm ?...And i got the datasheet from the chip would somebody take a look at that ? to confirm if its the 110nm chip

As expected, their 2nd generation chips will be created using a 55nm process and utilize the same packaging as their first generation 110nm chips, with small changes to padding but the same communications protocol. Although this constrained their design options, it will enable full backward compatibility with PCBs developed for their first generation chips

http://thegenesisblock.com/tag/pcb/


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Sitarow on November 13, 2013, 03:55:57 PM
Nice project. My concern it that Avalon will let us down with chip supply again like happened to the Klondike project. Does anyone have any information on there chip sales/schedule?


I made an order for 500 chips in Sunday.
Yesterday Fedex called me that sending is here and I have to go to the customs

We are looking forward to seeing what you can do with them.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: ngzhang on November 13, 2013, 05:46:03 PM
Are u gonna publish that as opensource to ? after you have your sales completed i would like to start my own but to little knowledge on this moment

This is already a opensource design long time ago.

https://github.com/BitSyncom/avalon2-ref

and now we moved all binary document to :

http://downloads.canaan-creative.com/hardware/A3255/prototype/

It's fairly stable now.

I just put 2 prototype on our shop, at a very high price (6BTC for 140G , really high), and out of stock in a few minutes. We have no plan to make more of them at present.

Because we met unpredictable delays on Gen1 chips, so we avoided pre-order model forever. our "in stock" supply ability is over 1PH pre month now, so there's nothing to worry about.

for out-China customers, here is our overseas chip agent:

Quote
World wide sales agent:
ELEN Technology Limited.,
Contact: Eric Chen
Email: eric_chen@elen-tech.com
Phone: +(852)31658617
FAX:+(852)30071717
Address: Rm.,604,Treasure Center, 42 Hung To Road, Kwun Tong,  Kln. HongKong

Note: Chips only , NO machines available. Accept USD ONLY.



Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Wesly on November 13, 2013, 05:53:22 PM
Create a blade which can be used to replace a current one in an avalon and sell it at a price which leaves a 20-30% earning margin to the buyer and you can probably sell six thousands of such blades in a few hours...

That's the impossible part. Everybody has a different idea of what the price should be to "leave 20-30% earning margin". And if you want to satisfy most potential buyers, the price has to be such that the vendor has to sell at loss.

Look: a Avalon 55nm chip at 1.5Gh/s delivered about 2 weeks from today would probably not mine more than 0.060-0.070 BTC during its entire lifetime (most people would agree). If you want to leave 20-30% earning margin, it means the vendor would have to sell at less than 0.046-0.058 BTC per chip. But the chip alone costs 0.060 BTC from Bitsyncom...
Am I missing something Avalon's website says 500 gen2 for 12BTC.
So 12/500 = .024 BTC per chip?


I didn't realize these chips have built-in Wifi Internet and come ready to daisy-chain to each other and power directly by 110V/220V AC outlet all while self-cooling to below 50 °C.  I am ordering 50,000 of these magical chips right away!

what are you smoking? Obviously the chips need to be part of a system, just like the gen1 chips and chips made by every other manufacturer.

I would like to know how much will the PCB board (or boards) cost?  Turnaround to mount the chips?  Firmware tested?  Type of Power supply?  controller?  By the time you are hashing, the difficulty will have grown another 100% and you will be lucky to break even when you can hold or buy bitcoin and wait for it to appreciate.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: HorseRider on November 13, 2013, 05:58:31 PM

I would like to know how much will the PCB board (or boards) cost?  Turnaround to mount the chips?  Firmware tested?  Type of Power supply?  controller?  By the time you are hashing, the difficulty will have grown another 100% and you will be lucky to break even when you can hold or buy bitcoin and wait for it to appreciate.

You asked a very good question. Let me answer this question for you. Though stupid scammer ngzhang tries his best, he can only design a chip at the shit level. This will make your PCB and IC cost times higher than effective chips. Good luck to order chips from scammer.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Wesly on November 13, 2013, 06:18:30 PM
It's fairly stable now.

Fairly?  So it should work "most" of the time?


I just put 2 prototype on our shop, at a very high price (6BTC for 140G , really high), and out of stock in a few minutes. We have no plan to make more of them at present.

Very high price?  High profit?  Even reusing existing parts (case, power, etc.) from Gen1 Mini, a 96-chip (2.3BTC in chips alone) 140 GH unit cost 6 BTC?  KnC just sold 140Gh ASIC expansion module (with PCB and $100 worth of VRM) for 2.8 BTC..  the November batch of KnC Juipter was selling for under 13 BTC (13 BTC if you add the cost of PSU) just before they were sold out.  It is guarantee to run at 550 GH or better or 3.3 BTC per 140 GH.  They have better power efficiency and higher density.  And that's not even close to as good as it gets, 3.3 BTC for 140GH is today's price, but BTC/GH is dropping quickly as difficulty rises with HashFast coming out next month and CoinTerra next year.  How can Avalon Gen2 compete?


Because we met unpredictable delays on Gen1 chips, so we avoided pre-order model forever. our "in stock" supply ability is over 1PH pre month now, so there's nothing to worry about.

Unpredictable?  So it is not your fault then?  Let's face it, because you screwed all Gen1 chips buyers over, nobody is ever going to buy pre-order from you guys anymore.  Therefore you really don't have a choice but to pay for these useless chips out of your stolen money and hope newer sucker will buy from you.  Why else would you be here to drum up more business if the chips are selling so well?  You can spin it however you want, but the truth is you are on the hook for all these chips that you have to prepaid for because you screwed people over on Gen1 and not because you want to provide better customer service.


Note: Chips only , NO machines available. Accept USD ONLY.

You forgot to mention your no Bullshit, no refund policy.  Ironically you are so full of Bullshit.  So how much will it cost and how long it will take to build a complete working machine based on your chips?  I say save your money and distribute your remaining Gen2 chips inventory to all Gen1 chip buyers to get some goodwill, otherwise you and your company is doomed.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Sitarow on November 13, 2013, 06:25:38 PM
It's fairly stable now.

Note: Chips only , NO machines available. Accept USD ONLY.

You forgot to mention your no Bullshit, no refund policy.  Ironically you are so full of Bullshit.  So how much will it cost and how long it will take to build a complete working machine based on your chips?  I say save your money and distribute your remaining Gen2 chips inventory to all Gen1 chip buyers to get some goodwill, otherwise you and your company is doomed.

I think marto74 will soon be able to answer this question.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: mrb on November 13, 2013, 06:58:16 PM
I see avalon chips that are cheaper then 10$

Probably Avalon 110nm. We are talking about 55nm chips here.

12BTC for a reel of 500. At $350/BTC, that's $8.40 per chip.

My bad. I didn't see the recent price decrease for a reel (was selling for 30 BTC).


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: aTg on November 13, 2013, 07:32:13 PM
Since low to 12BTC the price of BTC is double ... should lower it to 6 just to keep the same value.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Wesly on November 13, 2013, 08:28:56 PM
Since low to 12BTC the price of BTC is double ... should lower it to 6 just to keep the same value.

Besides that, Avalon's Gen2 chips' value is depreciating rapidly along with the increasing difficulty.  Difficulty will double by the end of this month after KnC finished shipping their Nov Batch and probably again in one month when Hashfast released their Gen1/Gen2/Gen3 in rapid succession (Ciara capable of 1000 units a day).  I sure hope Avalon has Gen4 ready early next year, because at this stage, even if they come out with Gen3 (28nm), it won't be enough to compete with KnC.  The only way they can get back in the game is beat KnC and others to Gen4 and have a complete product ready-to-ship before anybody else.  With their history, it is a bit much to ask people to trust them and rely on mom-and-pop manufacturers to create a final product.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: marto74 on November 13, 2013, 11:19:28 PM
It's fairly stable now.

Note: Chips only , NO machines available. Accept USD ONLY.

You forgot to mention your no Bullshit, no refund policy.  Ironically you are so full of Bullshit.  So how much will it cost and how long it will take to build a complete working machine based on your chips?  I say save your money and distribute your remaining Gen2 chips inventory to all Gen1 chip buyers to get some goodwill, otherwise you and your company is doomed.

I think marto74 will soon be able to answer this question.
The first batch of our HEX16a2 is sold out.
You can still get some of the End of November shipment order


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Wesly on November 14, 2013, 07:17:01 AM

Note: Chips only , NO machines available. Accept USD ONLY.

You forgot to mention your no Bullshit, no refund policy.  Ironically you are so full of Bullshit.  So how much will it cost and how long it will take to build a complete working machine based on your chips?  I say save your money and distribute your remaining Gen2 chips inventory to all Gen1 chip buyers to get some goodwill, otherwise you and your company is doomed.

I think marto74 will soon be able to answer this question.
The first batch of our HEX16a2 is sold out.
You can still get some of the End of November shipment order

279,30€ for 24 GH/s?  At the current 300€ per bitcoin exchange rate, that's 0.93 bitcoin per 24 GH/s or 5.58 BTC for 6 HEX16A2 (96 chips) hashing at 144 GH/s.  Avalon's Gen2 96-chip Mini prototype priced at 6 BTC is not far off since it includes extras like the WiFi controller, case, fans and PSU.  Your board sells for double of what KnC charges for their 28nm "Gen3" 140GH expansion module.  Neither your HEX16A2 board nor KnC includes the cost of controller and PSU.   That just proves my point that it is impossible for Avalon to stay competitive with their Gen2 chips that cost 2.3 BTC for chips (96) alone to match the performance of just one KnC ASIC chip.  The gap is only going to get wider when HashFast ship their 400GH chip next month.  You will need half a reel of Avalon Gen2 chips (266) or 16.6 boards to match the performance of a single HashFast Golden Nonce ASIC chip.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: HorseRider on November 14, 2013, 05:00:19 PM


Because we met unpredictable delays on Gen1 chips, so we avoided pre-order model forever. our "in stock" supply ability is over 1PH pre month now, so there's nothing to worry about.




oh no, dear ng, I caught you lying again. The delays are not unexpected, it is absolutely planned. 5 ~6 months back, you are so arrogant, thinking that you have "control" on the network hashing rate. You thought if you ship in September the chip buyer will still earn their investment back. You have even told your dear friends, that "I will not let the first wave buyer cannot ROI." You missed the point whether you will deliver it on time, you just think the hash rate won't increase madly, so that your delaying is not a big problem. During that periods, the total net work hashing rate experienced inexplainable increase, while there are only ASICMINER, BFL and You have the asic, and the other two is far more transparent than your mysterious operation. It is highly likely that you mined with your clients' machine.

The delay is not unpredictable, it is intentional. You think the buyer will accept. You are the lowest rogue I have ever seen, without no consciousness in mind at all.




-----
ngzhang is a scammer. If you are not familiar with this guy, please see his trusting feedback. If you have been hurt by him, give him a negative feedback, it only spends you 20 seconds. The link is https://bitcointalk.org/index.php?action=trust;u=38132. Remember check the "negative feedback"

https://i.imgur.com/MlFbazV.png
[/quote]


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: AdamKD on November 14, 2013, 07:56:21 PM
Why hasn't the btcointalk.org forum given the whole Avalon team scammer tags by now?

Edit:  Just realized you can buy Avalon chips not through Avalon but through a distributor through USD:

Quote
World wide sales agent:
ELEN Technology Limited.,
Contact: Eric Chen
Email: eric_chen@elen-tech.com
Phone: +(852)31658617
FAX:+(852)30071717
Address: Rm.,604,Treasure Center, 42 Hung To Road, Kwun Tong,  Kln. HongKong

wtf?  Probably cheaper than buying through USD on the Avalon site ... wow.  Or would the price have jumped a few hundred dollars with the recent BTC spike?

WTF would anyone, in their sane and right mind, buy off the Avalon website or from Tradehill?  Didn't tradehill have some kind of exclusivity with Avalon?  I thought it was advertised on their (Tradehill's) website but anything regarding 'exclusivity' isn't there anymore.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Rakessh on November 15, 2013, 02:42:58 AM

Ngzhang, are you guys going to produce your own modules, or are you going to abandon the backwards compatibility idea?

We will release a few (very few) Avalon Gen2 Mini prototype on our shop in 1-2 days, this prototype will NOT mass production.

http://avalon-asics.com/shop/

(not put up yet)

It's basically based on our open-sourced design, 96 chips running at 1V/1.5GH, 144G overall speed. most of the parts are the same with Gen1 mini.

I think this is a start, it's easy to build upgrade modules for Gen1 machines.

But we will NOT produce compatible modules our self in large number, a lot of people can do it faster I think.

I see in your shop 5.5 Bitcoin for a 4 module miner, what drugs are you taking?


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: chloegeek on November 18, 2013, 02:28:01 PM
Would love to see Gen2 boards being released for fitting into an Avalon Mini. This would make me super happy... Or just someone picking this up and running with it.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Sitarow on November 19, 2013, 12:52:24 AM
I received the two Gen 2 Mini Units today.

Ordered Thursday 14th. Waybill emailed and texted Friday the 15th and took delivery of units today November 18th 2013.

They two systems were simple to setup and pull 495 watts @ 120v.
Just below 140 GH/s performance.

The packaging was excellent and more than adequate.

I will give 1 hour and 1 day stat results.



Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Sitarow on November 19, 2013, 02:53:16 AM
2 hour results.

Seems one of the systems rebooted 1 hour 40 mins in.
140GH/s 494watt @ 120v

https://i.imgur.com/Mq0eEcd.png
https://i.imgur.com/pCpbSWg.png
https://i.imgur.com/PIpu9c0.png
https://i.imgur.com/33GicjN.png


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Xian01 on November 19, 2013, 05:13:51 AM
140GH/s 494watt @ 120v

 All things considered, that is not very good for a Gen2 :/


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: allinvain on November 19, 2013, 05:33:34 AM
140GH/s 494watt @ 120v

 All things considered, that is not very good for a Gen2 :/

Not very good at all considering that for that power consumption you can have 500+ GH with bitfury chips.

What I wish someone would do is build a clone of the Avalon blade but with bitfury chips. Naturally there would be considerable technical challenges with this (such as the fact that bitfury chips use a SPI bus, etc) but it would be a shame to waste the avalon chassis.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: loshia on November 19, 2013, 06:08:43 AM
140GH/s 494watt @ 120v

 All things considered, that is not very good for a Gen2 :/

Not very good at all considering that for that power consumption you can have 500+ GH with bitfury chips.

What I wish someone would do is build a clone of the Avalon blade but with bitfury chips. Naturally there would be considerable technical challenges with this (such as the fact that bitfury chips use a SPI bus, etc) but it would be a shame to waste the avalon chassis.
Hey,
you could easily run 10 Fury boards HEX16B with single tplink giving you 450 GH.  ;)


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: allinvain on November 19, 2013, 07:37:49 AM
140GH/s 494watt @ 120v

 All things considered, that is not very good for a Gen2 :/

Not very good at all considering that for that power consumption you can have 500+ GH with bitfury chips.

What I wish someone would do is build a clone of the Avalon blade but with bitfury chips. Naturally there would be considerable technical challenges with this (such as the fact that bitfury chips use a SPI bus, etc) but it would be a shame to waste the avalon chassis.
Hey,
you could easily run 10 Fury boards HEX16B with single tplink giving you 450 GH.  ;)

True enough, but the idea is to be able to mount them _inside_ the avalon case. I wonder if one could string some of these HEX16B boards in a row (horizontally and essentially laid on its side so the heatsink is facing the flow of the avalon fan). Or just make a stack and turn it sideways and mount several stacks inside the avalon case.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: form on November 28, 2013, 07:04:49 PM
Hey guys...

I finished a 16-chip board design.
Size: 145 mm x 70 mm (5.70866 inch x 2.75591 inch)

Board features:
  • Very efficient (~90%) DC/DC converter to power the ASICs
  • Adjustable voltage (0.85 - 1.25 V) to choose between efficiency and overclocking
  • USB-Interface to connect to a host running cgminer or bfgminer
  • I²C interface to chain multiple boards together
  • 100% flat surface on the bottom side to mount a usual heatsink
  • On-board temperature management
  • Fan connector with rotation speed measurement and PWM-control
  • Indicator LED to report USB-activity
  • 4-layer PCB for optimal heat/current transportation
  • Two board designs available: one for 10 and another for 16 ASICs

cgminer/bfgminer patch features:
  • Reporting temperature, real ASIC frequency and fan-speed back to the host
  • Control of ASIC frequency in a big range from 62.5 to 5000 MHz in smallest possible steps
  • Control of a desired temperature

Support:
The best way to get support at the moment is joining #avalon2 (http://irc://chat.au.freenode.net:6667/avalon2) on freenode IRC (http://freenode.net/)

Get a board:
I can offer bare pcb's and ready-to-mine units. But first i have to see how much demand here is, to get an idea of how many boards i should order - which is turning the screw of pricing.
If you want to order a board, send me a message with the following information:
  • ammount of bare PCBs you want
  • ammount of ready-to-mine boards you want
  • destination country

At december 8th i will make a summary, get prices at the distributors, pcb-fab and assy and will reply to your mails with an offer you can't refuse ;)
Be aware that i don't sell Avalon chips. If you want an assembled board, you have to supply the chips on tape or reel to me in germany.


.
.
.



https://raw.github.com/formtapez/avalon/master/Layout/16-chip-board/board-layer01-top-name.png


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: flyonwall on November 29, 2013, 12:51:31 AM
Just another card design

We are putting this up as another entry in the contest. All design materials will be made available to the public if we win Avalon's contest.

Features

  • Converts Gen2's CONFIG and REPORT signals into high-speed SPI protocol for direct connection to SPI pins of on-board PIC32 Microcontroller.
  • Power supply voltage is software-adjustable from 0.9V to 1.1V, in 64 steps. We used the LM10011 from TI for this.
  • Card has on-board USB controller, available through the PIC32MX chip.
  • Uses PIC32MX microcontroller, which has on-chip SPI and USB peripherals.
  • Uses only high slew-rate SN74LVC glue logic.
  • Compatible with either BFGMiner or CGMiner.
  • Temperature monitoring using the PIC32MX on-chip thermometer.
  • Uses a 25.000MHz oscillator module (instead of a crystal and low slew-rate logic used in ref design) for more reliable operation.
  • Same form-factor as original Gen1 hash card so that the same heat-sink can be used.

http://farm8.staticflickr.com/7358/11108851693_da9be96948_c.jpg


http://farm4.staticflickr.com/3802/11109307043_431799db1b_c.jpg



Title: Re: Open Source Avalon Gen2 55nm Board
Post by: allinvain on November 29, 2013, 05:47:36 AM
Shame nobody plans to build Avalon batc 1,2,and 3 compatible board but with 55nm chips.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: fasmax on November 29, 2013, 07:40:37 AM
Shame nobody plans to build Avalon batc 1,2,and 3 compatible board but with 55nm chips.

I agree. I have a working mini backplane that turns 2 Avalon hash units into a 20 chip Klondike.
 


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: bitterdog on November 29, 2013, 05:21:56 PM
Please Please PLEASE make a single or double chip USB miner


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: marto74 on November 30, 2013, 08:02:56 AM
Please Please PLEASE make a single or double chip USB miner
It'll be way too HOT


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Bicknellski on November 30, 2013, 08:13:02 AM
Please Please PLEASE make a single or double chip USB miner
It'll be way too HOT

Make a single or double chip USB coffee warmer.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: form on December 10, 2013, 09:01:47 PM
At december 8th i will make a summary, get prices at the distributors, pcb-fab and assy and will reply to your mails with an offer you can't refuse ;)

Hey,
sorry for being a bit late with my answer. Many people were asking me how much these boards will cost, and how long it takes, etc.
I was collecting the ammount of boards to get specific prices for boards and assembly - But here in germany the prices are way too high.
Meanwhile the user "bit-tech" flew to Shenzen in china to check the prices there and he got it managed to get really good quotes there.
And this is where i'm out of the game now:
bit-tech is now ordering a big amount of boards & chips and getting them assembled there. He will post here in the next days with more details.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Bit-Tech on December 13, 2013, 07:43:11 AM
Hi Guys

We will have a couple of working prototypes by this Wednesday , if everything goes as planned we will put it into mass production , il keep you guys updated on this thread.
We will be offering completed boards and DYI kit's based upon form's design. We'r launching our website soon.

Regards
Bit-Tech


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: fractal02 on December 13, 2013, 06:39:12 PM
Hi Guys

We will have a couple of working prototypes by this Wednesday , if everything goes as planned we will put it into mass production , il keep you guys updated on this thread.
We will be offering completed boards and DYI kit's based upon form's design. We'r launching our website soon.

Regards
Bit-Tech

Great !

Watching  ;D


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: testerx on December 14, 2013, 09:13:45 AM
Hi Guys

We will have a couple of working prototypes by this Wednesday , if everything goes as planned we will put it into mass production , il keep you guys updated on this thread.
We will be offering completed boards and DYI kit's based upon form's design. We'r launching our website soon.

Regards
Bit-Tech
Bit-Tech, were you able to source chips as well or are these going to be blank boards?


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: form on December 20, 2013, 10:12:04 AM
If someone needs cheap power-modules (PTH12040WAH) send a message to Lucko (https://bitcointalk.org/index.php?action=profile;u=89771).


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Bit-Tech on December 20, 2013, 10:36:37 AM
Hi Guys

We will have a couple of working prototypes by this Wednesday , if everything goes as planned we will put it into mass production , il keep you guys updated on this thread.
We will be offering completed boards and DYI kit's based upon form's design. We'r launching our website soon.

Regards
Bit-Tech
Bit-Tech, were you able to source chips as well or are these going to be blank boards?

source chips aswell .

Factory is missing one component they had to order it from digikey cause its not avaible here in Shenzhen , so there is another week of waiting again.





Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Lucko on December 21, 2013, 07:49:28 AM
If someone needs cheap power-modules (PTH12040WAH) send a message to Lucko (https://bitcointalk.org/index.php?action=profile;u=89771).
Yes I have 150 of them. So price will change a bit on numbers you would like to get but generally it will cost less then I pay for them. I made a mistake of buying too many... I'm in EU...


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: hongkongapple1 on December 23, 2013, 03:26:57 AM
I have make 2 ~   round about $250/board,  if anyone interested ~

All hardware have been assembled, including a Big Heatsink ~

~~~

I can't really test it , Need to be setup properly for testing ...

Compiling a proper Cgminer  ~ seem real difficult ~ !!

 ??? ~~~ as currently its stuck @ -->


result from CGMiner :

--- ~ >>>    KLN0:0 unknown work (a0:51be99bff) - ignored
--- ~ >>>    KLN0:0 unknown work (a1:92cv34ofe) - ignored
--- ~ >>>    KLN0:0 unknown work (a1:xxxxxxxxx) - ignored
--- ~ >>>    KLN0:0 unknown work (a2:xxxxxxxxx) - ignored


Anyone know the reason ??  Problem solve would means cheaper on Hardware ~ Labour cost free ! For 1st 50G


http://www.hongkongapple.com/miner/image_1.jpg
http://www.hongkongapple.com/miner/image_2.jpg
http://www.hongkongapple.com/miner/image_3.jpg
http://www.hongkongapple.com/miner/image_4.jpg
http://www.hongkongapple.com/miner/image_5.jpg


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: fasmax on December 23, 2013, 03:39:24 AM
It almost looks like a firmware problem.
What firmware did you load into the PIC chip?



Title: Re: Open Source Avalon Gen2 55nm Board
Post by: hongkongapple1 on December 23, 2013, 09:49:09 AM
I have try both ~

Loading  " Klondike.X.production.hex "

          under ->  by Formtapez_ avalon-master\firmware\Klondike.X\dist\K16\production


Also, try open the project there named "Klondike" in MPLAB X IDE,  and load from there



Title: Re: Open Source Avalon Gen2 55nm Board
Post by: form on December 23, 2013, 11:24:17 AM
Looks like you dont used the patched cgminer version.
You can also use BFGminer, which includes automatic detection of this boards.

Btw (not the problem here): Did you changed the chipcount to 16 in the code? The precompiled one is for the 10 chips board.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: turtle83 on December 23, 2013, 02:08:02 PM
I have make 2 ~   round about $250/board,  if anyone interested ~

All hardware have been assembled, including a Big Heatsink ~

~~~

I can't really test it , Need to be setup properly for testing ...

Compiling a proper Cgminer  ~ seem real difficult ~ !!

 ??? ~~~ as currently its stuck @ -->


result from CGMiner :

--- ~ >>>    KLN0:0 unknown work (a0:51be99bff) - ignored
--- ~ >>>    KLN0:0 unknown work (a1:92cv34ofe) - ignored
--- ~ >>>    KLN0:0 unknown work (a1:xxxxxxxxx) - ignored
--- ~ >>>    KLN0:0 unknown work (a2:xxxxxxxxx) - ignored


Anyone know the reason ??  Problem solve would means cheaper on Hardware ~ Labour cost free ! For 1st 50G


Need help compiling cgminer/bfgminer? shoot me a pm. ive done it many times on linux. Cant help with firmware problems.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: fasmax on December 23, 2013, 03:55:29 PM
Looks like you dont used the patched cgminer version.
You can also use BFGminer, which includes automatic detection of this boards.

Btw (not the problem here): Did you changed the chipcount to 16 in the code? The precompiled one is for the 10 chips board.

@form
I know that the driver for gen2 Avalon needs to subtract 0x180 from the returned nonce but are there any other changes?
 


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: form on December 23, 2013, 04:23:09 PM
I know that the driver for gen2 Avalon needs to subtract 0x180 from the returned nonce but are there any other changes?

There was a limitation (999 MHz) for the command-line parameter for the desired chip-frequency in some versions of cgminer - That has to be removed or changed to 5000 or so.
Thats the only thing that has to be changed, additionaly to the 0x180 substraction (which BFGminer detects automatically).


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: fasmax on December 23, 2013, 11:48:21 PM
@form
After looking at the Avalon data sheet I don't see how to get the clock frequency above 999mhz and satisfy all 3 equations.
Were you able to decipher the data sheet and set the core clock frequency at 1000mhz or above.
If so what values did you use for F,R & OD.
Thanks for any help you can provide to understand this.

 


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: form on December 24, 2013, 12:12:51 AM
After looking at the Avalon data sheet I don't see how to get the clock frequency above 999mhz and satisfy all 3 equations.
Were you able to decipher the data sheet and set the core clock frequency at 1000mhz or above.
If so what values did you use for F,R & OD.
Thanks for any help you can provide to understand this.

You can see what values are used, when you look at this function in the firmware:
https://github.com/formtapez/avalon/blob/master/firmware/Klondike.X/klondike.c#L307

The newest datasheet shows slightly other formulas, i didnt got it to work that way, still using the formulas from the older datasheet, works fine.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: hongkongapple1 on December 24, 2013, 12:09:05 PM
Will going to try the one compiled by T later on, 
mean while this is the output I'm getting ( with only chips no. Have been adjusted )

And also possible to pop the soft in openWRT ?

[2013-12-24 15:24:39] KLN0:0 Reply work [=] dev=0 workid=26 nonce=0x137b5eb7
 [2013-12-24 15:24:39] KLN0:0 reply [=:001a295eef04504b006f02000400]
 [2013-12-24 15:24:39] KLN0:0 FOUND NONCE (1a:04ef5ca9)
 [2013-12-24 15:24:39] KLN0:0 unknown work (1a:04ef5ca9) - ignored
 [2013-12-24 15:24:39] KLN0:0 Reply work [=] dev=0 workid=26 nonce=0x04ef5ca9
 [2013-12-24 15:24:40] [thread 0: 0 hashes, 0.0 khash/sec]
 [2013-12-24 15:24:40] Received stratum notify from pool 0 with job_id=78f7
 [2013-12-24 15:24:40] Generated stratum header 0000000287acb8d5de78560f7cd9e5df8e8836b0d95c59c6a5d865b9000000000000000021c30a1 5cb044379a8bae531dbb8bf994626651698757e779ee59afc71bde9cd52b936b61903a30c000000 00
 [2013-12-24 15:24:40] Work job_id 78f7 nonce2 00000000
 [2013-12-24 15:24:40] Generated target 0000000033330000000000000000000000000000000000000000000000000000
 [2013-12-24 15:24:40] Work stale due to work update (27 != 28)
 [2013-12-24 15:24:40] Discarded work
 [2013-12-24 15:24:40] Work stale due to work update (27 != 28)
 [2013-12-24 15:24:40] Discarded work
 [2013-12-24 15:24:40] Discarded 2 stales that didn't match current hash


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: form on December 24, 2013, 12:33:00 PM
try to adjust this value in klondike.h:

#define TICK_TOTAL 20800


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: hongkongapple1 on December 25, 2013, 12:07:17 AM
for all of us here  ~~  Merry Christmas  ~  Best wishes  :-*

Thanks Form,  u're you superb !    After adjustment I'm now getting 11 - 14 G ~  with almost no error , < 1%.. :D

I'm getting alot of " went idle before work was sent"

Result : ~

[2013-12-25 07:57:39] KLN0:0 went idle before work was sent
 [2013-12-25 07:57:41] KLN0:0 went idle before work was sent
 [2013-12-25 07:57:42] Accepted 08be9e7b KLN 0  Diff 29/12
 [2013-12-25 07:57:43] KLN0:0 went idle before work was sent
 [2013-12-25 07:57:45] KLN0:0 went idle before work was sent
 [2013-12-25 07:57:47] KLN0:0 went idle before work was sent
 [2013-12-25 07:57:49] KLN0:0 went idle before work was sent
 [2013-12-25 07:57:58] KLN0:0 went idle before work was sent
 [2013-12-25 07:57:58] Stratum from pool 0 requested work update
 [2013-12-25 07:57:59] Accepted 0c5327a8 KLN 0  Diff 20/12
 [2013-12-25 07:58:06] KLN0:0 went idle before work was sent
 [2013-12-25 07:58:08] KLN0:0 went idle before work was sent
 [2013-12-25 07:58:10] Accepted 0b6c42ce KLN 0  Diff 22/12
 [2013-12-25 07:58:10] Accepted 06e2cd2b KLN 0  Diff 37/12
 [2013-12-25 07:58:10] KLN0:0 went idle before work was sent
 [2013-12-25 07:58:12] KLN0:0 went idle before work was sent


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: form on December 25, 2013, 12:44:32 AM
Thanks Form,  u're you superb !    After adjustment I'm now getting 11 - 14 G ~  with almost no error , < 1%.. :D
I'm getting alot of " went idle before work was sent"

Yeah, i get these messages here, too - since months :)
Actually, changing TICK_TOTAL adjusts the timeout for one job. When the value is too big/small the result is many dupe/idle messages.
I think 20800 is near the "golden mean". It doesnt affect the hashrate as much as one would think.
I have updated the code (https://github.com/formtapez/avalon/tree/master/firmware) (and the .hex (https://github.com/formtapez/avalon/blob/master/firmware/Klondike.X/dist/K16/production/Klondike.X.production.hex)) in the github-repo (https://github.com/formtapez/avalon) now, too.

Can you tell something about your frequency and voltage settings? Are you cooling the chips from topside, too?


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: hongkongapple1 on December 25, 2013, 03:07:30 AM
I'm trying the 1v ,  bottom with ( Heat Sink +  Fan ) ~  For The Front Fan Only~   I was thinking of putting Heatsink at front..  since the Chip rise its temp. so rapidly ~  I try around 3200 - 3600 !    

Do u think I should also try +/- Tick_Total too ?  ;)

J


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: cdragon on December 25, 2013, 08:35:35 AM
Thanks Form,  u're you superb !    After adjustment I'm now getting 11 - 14 G ~  with almost no error , < 1%.. :D
I'm getting alot of " went idle before work was sent"

Yeah, i get these messages here, too - since months :)
Actually, changing TICK_TOTAL adjusts the timeout for one job. When the value is too big/small the result is many dupe/idle messages.
I think 20800 is near the "golden mean". It doesnt affect the hashrate as much as one would think.
I have updated the code (https://github.com/formtapez/avalon/tree/master/firmware) (and the .hex (https://github.com/formtapez/avalon/blob/master/firmware/Klondike.X/dist/K16/production/Klondike.X.production.hex)) in the github-repo (https://github.com/formtapez/avalon) now, too.

Can you tell something about your frequency and voltage settings? Are you cooling the chips from topside, too?
I'm from korea. I don't know english.
I have make 3 PCB.
I'm trying the 1 volt,  16chip is very cool.(bottom side heatsink with fan)
writing new hex file.

Result :
using cgminer cgminer-3.9.0-windows
7~16G show like that, but actually the 0G(btcguild).

using bfgminer-3.8.1-win32
I'm getting 4.65GH/s(same btcguild)

Thank for form.


--------------------------------------------------------------------------------
 bfgminer version 3.8.1 - Started: [2013-12-25 16:02:15] - [  0 days 01:55:49]
 [M]anage devices [P]ool management Settings [D]isplay options  [H]elp [Q]uit
 Connected to stratum-lb-usa48.btcguild.com diff 8 with stratum as user *****
 Block: ...180a0d30 #276856  Diff:1.18G ( 8.45Ph/s)  Started: [17:57:06]
 ST:2  F:0  NB:15  AS:1  BW:[ 57/ 37 B/s]  E:23.60  I:83.14uBTC/hr  BS:4.25k
 1      25.5C | 10.31/10.71/ 4.65Gh/s | A:948 R:1236+4( 57%) HW:2/.01%
--------------------------------------------------------------------------------
 KLN 0: 24.7C | 11.79/10.71/ 4.65Gh/s | A:948 R:1236+4( 57%) HW:2/.01%
--------------------------------------------------------------------------------
 [2013-12-25 17:57:16] Rejected 0fd229a5 KLN 0  Diff 16/8 (duplicate)
 [2013-12-25 17:57:24] Accepted 1c6650d9 KLN 0  Diff 9/8
 [2013-12-25 17:57:24] Rejected 1c6650d9 KLN 0  Diff 9/8 (duplicate)
 [2013-12-25 17:57:29] Accepted 0ed3b0d3 KLN 0  Diff 17/8
 [2013-12-25 17:57:29] Rejected 0ed3b0d3 KLN 0  Diff 17/8 (duplicate)
 [2013-12-25 17:57:32] Stratum from pool 0 requested work update
 [2013-12-25 17:57:32] Accepted 074c64dd KLN 0  Diff 35/8
 [2013-12-25 17:57:32] Rejected 074c64dd KLN 0  Diff 35/8 (duplicate)
 [2013-12-25 17:57:41] Accepted 0e913eed KLN 0  Diff 17/8
 [2013-12-25 17:57:41] Rejected 0e913eed KLN 0  Diff 17/8 (duplicate)
 [2013-12-25 17:57:42] Rejected 0e913eed KLN 0  Diff 17/8 (duplicate)
 [2013-12-25 17:57:45] Accepted 117e4481 KLN 0  Diff 14/8
 [2013-12-25 17:57:45] Rejected 117e4481 KLN 0  Diff 14/8 (duplicate)
 [2013-12-25 17:58:00] Accepted 1da98d79 KLN 0  Diff 8/8
 [2013-12-25 17:58:01] Rejected 1da98d79 KLN 0  Diff 8/8 (duplicate)
 [2013-12-25 17:58:02] Stratum from pool 0 requested work update


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: form on December 25, 2013, 10:36:07 AM
Did you used the .hex file from yesterday?


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: cdragon on December 25, 2013, 10:55:52 AM
Did you used the .hex file from yesterday?
yes!
I apply yesterday hex file.
old hex file is display ignore.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: hongkongapple1 on December 25, 2013, 11:46:43 AM
Cdragon,

You use bfgminer-3.8.1-win32, with which driver on windows?

The standard Avalon 2 Prototype is clock bewteen ( 1 - 2 K MHz ), i try keep trying the figure


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: cdragon on December 25, 2013, 12:06:08 PM
I used zadig(v2.0.1.162) (http://zadig.akeo.ie/downloads/)driver with windows7.
This driver is mount Univeral Serail Bus devices(K16).
I don't know how to adjust clock.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: form on December 25, 2013, 02:38:55 PM
I don't know how to adjust clock.

You should add this to the parameters of cg/bfgminer:
--klondike-options 1300:70

First number is frequency in MHz, second is desired temperature in °C.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: cdragon on December 25, 2013, 04:22:21 PM
I was change the frequency between 500~700MHz.
Increase in performance, but the result is similar to the previous.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: hongkongapple1 on December 25, 2013, 07:16:24 PM
Still Trying to Optimum the speed ~ usually over 3000 will have 100% no Rejected ~ 

Now I got top side with HeatSink too..  Result is very different performace, much better !

but still the arange is around 13-4 G

Is there a way we would know if all single chips is working ?  ::)


~~  Mine only works in CGminer,  I have the driver installed before, but still don't see it in BFGminer ~


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: hongkongapple1 on December 25, 2013, 08:26:20 PM
if that is still true on 16 chips board ?

hash unit working clock frequency = XCLKIN frequency * F/(R*(2^OD)).


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: cdragon on December 26, 2013, 01:30:37 AM
if that is still true on 16 chips board ?

I'm writing a blog every day about making the this board.
My blog name is say "indu dot com (http://blog.naver.com/iharryc)" :)


orignal artwork not modify.
appended outline only.
https://i.imgur.com/sn9kHpF.jpg

All parts are hands soldering by iron.
https://i.imgur.com/ujiitFe.jpg

cgminer(runing time 30min)
https://i.imgur.com/sMdxbqb.jpg
https://i.imgur.com/Wj3BgId.jpg

bfgminer(runing time 1hour)
https://i.imgur.com/St6pPnC.jpg
https://i.imgur.com/O8iabts.jpg


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: form on December 26, 2013, 09:45:55 AM
One important thing i forgot:
The value of MAX_WORK_COUNT in klondike.h has to match the value in the driver of cg/bfgminer.

In the github-repository i set it to "8" everywhere.
So when you are using other non-patched mining software (bfgminer for example), be sure to change it to "8", too.

@cdragon: Why are you hashing at 500 MHz?


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: hongkongapple1 on December 26, 2013, 01:38:32 PM
if that is still true on 16 chips board ?

hash unit working clock frequency = XCLKIN frequency * F/(R*(2^OD)).

Form :  We need oscilloscope for the ~ TMR0 Time period (uS) ?

            also if ~  2^18 hashes per tick ,  still valid ?


Cdragon:  Nice Soldering ~ the board looks great ~ Nice slot


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: IHateMayonnaise on December 26, 2013, 09:48:23 PM
I have been following this thread very closely for a while -- I am very impressed! You guys have put in a lot of hard work, and it will pay off very soon :)

I understand that the design is still in the prototyping stage, however I was wondering if there are any plans to make a group PCB order once the design is finalized. I am a DIY-er and have a reflow oven, so I would prefer to build some of these badboys myself. I would imagine that the Avalon2 chips would have to be sourced elsewhere.. unless we can get enough people interested in this design, maybe we can do a separate group order. If so, I'm in ;D

Keep up the great work!!

-IHateMayonnaise


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: hongkongapple1 on December 26, 2013, 10:32:02 PM
I have been following this thread very closely for a while -- I am very impressed! You guys have put in a lot of hard work, and it will pay off very soon :)

I understand that the design is still in the prototyping stage, however I was wondering if there are any plans to make a group PCB order once the design is finalized. I am a DIY-er and have a reflow oven, so I would prefer to build some of these badboys myself. I would imagine that the Avalon2 chips would have to be sourced elsewhere.. unless we can get enough people interested in this design, maybe we can do a separate group order. If so, I'm in ;D

Keep up the great work!!

-IHateMayonnaise

It great to hear people are interested ~

i have plenty of chips ~

The design by Form is great ~  we just need to try different figure in the firmware, to Optimize the speed

I can offer u $250 for a whole Kit ( PCB, Chips, 12" Fan & HeatSink included ),  If u're interested to Join us

or $280 for Assembled ~

Fan ~ ( 12" Cool Master 2000rpm ) Sickle Flow X - High Airflow 90 CFM -


-------------------

I have work out value Price:-   Since price for power module ( we are already having 1000+ pricing ) & $7 - 8 /chips are pretty much fixed ~

Only thing is labour cost can go down alot in volume.

2 -  5+ pcs    ~ $245  USD
6 - 10   pcs    ~ $235
11-19  pcs     ~ $225
     20+ pcs    ~ $215


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: hongkongapple1 on December 28, 2013, 11:38:06 AM
For ~   DEFAULT_HASHCLOCK  =  1000

We shoud have 16 Ghz ~  But still not the case here.

Below is needed to figure out :--


// set values for ASIC PLL, we use R=16 N=Freq in MHz

#define WORK_TICKS          16000   // 2^25 total / 2^18 hashes per tick   ( 2^25 ~ as the Crystal is 25Mhz ,  address me if I'm wrong )  ::)

#define TICK_TOTAL          20800   // 2^18 / 21.33uS TMR0 period (how do we find out if 21.33uS is right ? )


Hoping by more people joining ~ then we could figure this !   Maybe the about is piece of cake for U  ~~

 :-* 


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: cdragon on December 30, 2013, 05:35:22 AM
How do i patch cgminer on windows?
I have tried has failed.

https://i.imgur.com/Qk1rFne.jpg


Please, send me patched version.(cgminer or bfgminer)




Title: Re: Open Source Avalon Gen2 55nm Board
Post by: hongkongapple1 on December 30, 2013, 02:57:01 PM
Cdragon,

I have been trying to do the compile on cgminer / bfg ~  but seem very hard to install all we needed~  Even with MinGW !

I have moved to try in Linux ~ seem more native this way ~

J


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: n-gage on January 02, 2014, 10:41:56 PM
Guys!

Any updates on the situation? We are still unable to get these avalon2 chips to work. We keep getting those "ignore" messages on our pcb's. Any thoughts will be appreciated.



Title: Re: Open Source Avalon Gen2 55nm Board
Post by: hongkongapple1 on January 03, 2014, 04:05:33 AM
Try to adjust this will get u different result ~  currently Max I get is around 12 - 16 G~  unstable ~

1st - #define MAX_WORK_COUNT      8  // must be binary multiple and match driver

2nd - #define TICK_TOTAL          12355  // 2^18 / 21.33uS TMR0 period (adjusted down for push time)

3rd - #define DEFAULT_HASHCLOCK   2300

this are the combo ~ u need to try on vary no. ~ if u get a best Combo ~ pls suggest here too


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: n-gage on January 03, 2014, 04:04:11 PM
Try to adjust this will get u different result ~  currently Max I get is around 12 - 16 G~  unstable ~

1st - #define MAX_WORK_COUNT      8  // must be binary multiple and match driver

2nd - #define TICK_TOTAL          12355  // 2^18 / 21.33uS TMR0 period (adjusted down for push time)

3rd - #define DEFAULT_HASHCLOCK   2300

this are the combo ~ u need to try on vary no. ~ if u get a best Combo ~ pls suggest here too

Nothing changes. Still "ignored" messages. Looks like there is something missing in microcontroller <> chip data exchange



Title: Re: Open Source Avalon Gen2 55nm Board
Post by: hongkongapple1 on January 04, 2014, 07:34:34 PM
Try to adjust this will get u different result ~  currently Max I get is around 12 - 16 G~  unstable ~

1st - #define MAX_WORK_COUNT      8  // must be binary multiple and match driver

2nd - #define TICK_TOTAL          12355  // 2^18 / 21.33uS TMR0 period (adjusted down for push time)

3rd - #define DEFAULT_HASHCLOCK   2300

this are the combo ~ u need to try on vary no. ~ if u get a best Combo ~ pls suggest here too

Nothing changes. Still "ignored" messages. Looks like there is something missing in microcontroller <> chip data exchange



if the Max Count is 8 ~  >>>>  #define TICK_TOTAL   20800


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: hongkongapple1 on January 06, 2014, 05:53:26 AM
Now work flawlessly with MinePeon ~ for Rasp. PI ;D

0 Reject ~ 0 error

Special Thanks for Neil ~ who bring lots of us ~ To Joy of PI !! Pls support MinePeon !
It is so easy to use ~
:D

MinePeon - SSH
http://www.hongkongapple.com/miner/MinePeon_Patched.jpg

MinePeon - Web Interface
http://www.hongkongapple.com/miner/MinePeon_Interface.jpg


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Lucko on January 06, 2014, 11:19:13 AM
That nice to see... But you are still running at 1GH per chip... You need to get it up to 1,3 to 1,5 range...


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: hongkongapple1 on January 08, 2014, 01:19:26 AM
That nice to see... But you are still running at 1GH per chip... You need to get it up to 1,3 to 1,5 range...

Currently, its already Passed 1G / chip ~  

as I'm getting 17.6 G average
    Any news from guy ~  

http://www.hongkongapple.com/miner/17.6G.jpg



Title: Re: Open Source Avalon Gen2 55nm Board
Post by: hongkongapple1 on January 08, 2014, 02:00:09 AM
Update~   Speed have pass 21 G Now   ;D ~

Jeffrey


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: drinkmorecoffee on January 08, 2014, 07:15:51 PM
Update~   Speed have pass 21 G Now   ;D ~

Jeffrey

Definitely waiting for news on a price point for both the PCB-only and the completed mining board.  I'm in the US, so I can source parts locally and assemble myself if required. 

Also, can you please confirm that this board is using the 55nm gen2 Avalon chips, and not the 110nm first generation?

Great work, guys!


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: hongkongapple1 on January 11, 2014, 07:40:53 PM
Update~   Speed have pass 21 G Now   ;D ~

Jeffrey

Definitely waiting for news on a price point for both the PCB-only and the completed mining board.  I'm in the US, so I can source parts locally and assemble myself if required.  

Also, can you please confirm that this board is using the 55nm gen2 Avalon chips, and not the 110nm first generation?

Great work, guys!

55nm gen2 Avalon chips,  Its all the reason they're here~  Its 1 - 1.5 / chip " A3255 " ~    110nm will not get pass 350 Mhz /chip " A3256" ~


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: hongkongapple1 on January 11, 2014, 07:42:46 PM
Update~   Speed have pass 21 G Now   ;D ~

Jeffrey

Definitely waiting for news on a price point for both the PCB-only and the completed mining board.  I'm in the US, so I can source parts locally and assemble myself if required.  

Also, can you please confirm that this board is using the 55nm gen2 Avalon chips, and not the 110nm first generation?

Great work, guys!

55nm gen2 Avalon chips,  Its all the reason they're here~  Its 1 - 1.5 G/ chip " A3255 " ~    110nm will not get pass 350 Mhz /chip " A3256" ~


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Lucko on January 14, 2014, 08:19:06 AM
How are my ordered boards doing? You told me you will ship yesterday but still nothing...


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Lucko on January 15, 2014, 03:25:07 PM
Come on no replay? Is this a scam? You did log in today... And another users asked me over PM if I got any replay from you.

EDIT: I will ask Paypal to revers transaction if I don't get any response from you...

EDIT2: Got a replay now... It sounds legit so I'm currently not worried...


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: afchafch on January 16, 2014, 10:48:59 AM
One important thing i forgot:
The value of MAX_WORK_COUNT in klondike.h has to match the value in the driver of cg/bfgminer.

So when you are using other non-patched mining software (bfgminer for example), be sure to change it to "8", too.

how can I do it, what parameter is responsible for this in cgminer?


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: afchafch on January 16, 2014, 11:10:16 AM
Hi all,
2 days I try to configure this board...

http://s020.radikal.ru/i718/1401/2d/86757e5e2354.png

on 500 MHZ i have this
http://s61.radikal.ru/i171/1401/96/2f929328f1a9.png
everything above 700 MHZ is
http://s020.radikal.ru/i713/1401/c1/4aabc6f0ca8b.png
please HELP me, what i do wrong??
my be some config for miners?

log file:

Code:
 [2014-01-16 19:50:13] Timers: Using QueryPerformanceCounter
 [2014-01-16 19:50:13] Recalibrating timeofday offset (delta 1389890962.257346s)
 [2014-01-16 19:50:13] Global quota greatest common denominator set to 1
 [2014-01-16 19:50:13] setrlimit: Not supported by platform
 [2014-01-16 19:50:13] Started bfgminer 3.7.0
 [2014-01-16 19:50:13] Loaded configuration file bfgminer350mhz.conf
 [2014-01-16 19:50:13] usb_devinfo_scan: Error opening device: LIBUSB_ERROR_NOT_SUPPORTED
 [2014-01-16 19:50:13] usb_devinfo_scan: Error opening device: LIBUSB_ERROR_NOT_SUPPORTED
 [2014-01-16 19:50:13] usb_devinfo_scan: Error getting USB string 1 (iManufacturer): LIBUSB_ERROR_NOT_FOUND
 [2014-01-16 19:50:13] usb_devinfo_scan: Error getting USB string 2 (iProduct): LIBUSB_ERROR_NOT_FOUND
 [2014-01-16 19:50:13] usb_devinfo_scan: Error opening device: LIBUSB_ERROR_NOT_SUPPORTED
 [2014-01-16 19:50:13] usb_devinfo_scan: Error opening device: LIBUSB_ERROR_NOT_SUPPORTED
 [2014-01-16 19:50:13] usb_devinfo_scan: Error opening device: LIBUSB_ERROR_NOT_SUPPORTED
 [2014-01-16 19:50:13] usb_devinfo_scan: Error opening device: LIBUSB_ERROR_NOT_SUPPORTED
 [2014-01-16 19:50:13] usb_devinfo_scan: Error opening device: LIBUSB_ERROR_NOT_SUPPORTED
 [2014-01-16 19:50:13] usb_devinfo_scan: Error getting USB string 1 (iManufacturer): LIBUSB_ERROR_NOT_FOUND
 [2014-01-16 19:50:13] usb_devinfo_scan: Error getting USB string 2 (iProduct): LIBUSB_ERROR_NOT_FOUND
 [2014-01-16 19:50:13] usb_devinfo_scan: Error opening device: LIBUSB_ERROR_NOT_SUPPORTED
 [2014-01-16 19:50:13] usb_devinfo_scan: Error opening device: LIBUSB_ERROR_NOT_SUPPORTED
 [2014-01-16 19:50:13] usb_devinfo_scan: Error opening device: LIBUSB_ERROR_NOT_SUPPORTED
 [2014-01-16 19:50:13] FTD2XX.DLL failed to load, not using FTDI autodetect
 [2014-01-16 19:50:13] QueryDosDevice returned insufficent buffer error; enlarging to 200
 [2014-01-16 19:50:13] QueryDosDevice returned insufficent buffer error; enlarging to 400
 [2014-01-16 19:50:13] QueryDosDevice returned insufficent buffer error; enlarging to 800
 [2014-01-16 19:50:13] QueryDosDevice returned insufficent buffer error; enlarging to 1000
 [2014-01-16 19:50:13] QueryDosDevice returned insufficent buffer error; enlarging to 2000
 [2014-01-16 19:50:13] QueryDosDevice returned insufficent buffer error; enlarging to 4000
 [2014-01-16 19:50:13] lowlevel_scan: Found usb device at usb:005:002 (path=(null), vid=04d8, pid=f60a, manuf=Klondike Project, prod=K16, serial=(null))
 [2014-01-16 19:50:13] lowlevel_scan: Found usb device at usb:008:255 (path=(null), vid=1002, pid=4397, manuf=(null), prod=(null), serial=(null))
 [2014-01-16 19:50:13] lowlevel_scan: Found usb device at usb:010:255 (path=(null), vid=1002, pid=4396, manuf=(null), prod=(null), serial=(null))
 [2014-01-16 19:50:13] lowlevel_scan: Found usb device at usb:005:255 (path=(null), vid=1002, pid=4397, manuf=(null), prod=(null), serial=(null))
 [2014-01-16 19:50:13] lowlevel_scan: Found usb device at usb:009:001 (path=(null), vid=045e, pid=00db, manuf=(null), prod=(null), serial=(null))
 [2014-01-16 19:50:13] lowlevel_scan: Found usb device at usb:004:255 (path=(null), vid=1b21, pid=1042, manuf=(null), prod=(null), serial=(null))
 [2014-01-16 19:50:13] lowlevel_scan: Found usb device at usb:002:255 (path=(null), vid=1b21, pid=1042, manuf=(null), prod=(null), serial=(null))
 [2014-01-16 19:50:13] lowlevel_scan: Found usb device at usb:001:255 (path=(null), vid=1b21, pid=1042, manuf=(null), prod=(null), serial=(null))
 [2014-01-16 19:50:13] lowlevel_scan: Found usb device at usb:007:255 (path=(null), vid=1002, pid=4396, manuf=(null), prod=(null), serial=(null))
 [2014-01-16 19:50:13] lowlevel_scan: Found usb device at usb:009:255 (path=(null), vid=1002, pid=4397, manuf=(null), prod=(null), serial=(null))
 [2014-01-16 19:50:13] lowlevel_scan: Found usb device at usb:005:001 (path=(null), vid=046d, pid=c52b, manuf=(null), prod=(null), serial=(null))
 [2014-01-16 19:50:13] lowlevel_scan: Found usb device at usb:006:255 (path=(null), vid=1002, pid=4399, manuf=(null), prod=(null), serial=(null))
 [2014-01-16 19:50:13] lowlevel_scan: Found usb device at usb:003:255 (path=(null), vid=1002, pid=4396, manuf=(null), prod=(null), serial=(null))
 [2014-01-16 19:50:13] lowlevel_scan: Found vcom device at com:1 (path=\\.\COM1, vid=0000, pid=0000, manuf=(null), prod=(null), serial=(null))
 [2014-01-16 19:50:13] KLN0: reset got err 0
 [2014-01-16 19:50:13] KLN0:0 DSend cmd [I]
 [2014-01-16 19:50:14] KLN0:0 DReply info [I] version=0x10 prod=K16 serial=0xdeadbeef
 [2014-01-16 19:50:14] Klondike (usb:005:002) detect successful (1 attempt)
 [2014-01-16 19:50:14] Klondike cgpu added
 [2014-01-16 19:50:14] KLN 0 : Set temperature config: target=50 cutoff=70
 [2014-01-16 19:50:14] Probing for an alive pool
 [2014-01-16 19:50:14] Testing pool http://eu-stratum.btcguild.com:3333
 [2014-01-16 19:50:14] HTTP request failed: Empty reply from server
 [2014-01-16 19:50:14] Failed to connect in json_rpc_call
 [2014-01-16 19:50:14] HTTP request failed: Empty reply from server
 [2014-01-16 19:50:14] Failed to connect in json_rpc_call
 [2014-01-16 19:50:14] initiate_stratum with sockbuf=00000000
 [2014-01-16 19:50:15] Failed to get sessionid in initiate_stratum
 [2014-01-16 19:50:15] initiate_stratum with sockbuf=01d36cb0
 [2014-01-16 19:50:15] Failed to get sessionid in initiate_stratum
 [2014-01-16 19:50:15] Pool 0 stratum bdifficulty set to 2.000000
 [2014-01-16 19:50:15] Received stratum notify from pool 0 with job_id=11331
 [2014-01-16 19:50:15] Stratum authorisation success for pool 0
 [2014-01-16 19:50:15] Pool 0 http://eu-stratum.btcguild.com:3333 alive
 [2014-01-16 19:50:16] KLN0: listening for replies
 [2014-01-16 19:50:16] KLN0:0 Send cmd [S]
 [2014-01-16 19:50:16] KLN0:0 reply [S:0052100000004e7f000000000400]
 [2014-01-16 19:50:16] KLN0:0 Reply status [S] dev=0 chips=16 slaves=0 workcq=0 workid=0 temp=78 fan=127 errors=0 hashes=0 max=1024 noise=0
 [2014-01-16 19:50:16] KLN0: initializing data
 [2014-01-16 19:50:16] KLN0:0 Send config [C] dev=0 clock=600 temptarget=185 tempcrit=0 fan=255
 [2014-01-16 19:50:16] KLN0:0 reply [C:005802b900ff008de628c0671582]
 [2014-01-16 19:50:16] KLN0:0 Reply config [C] dev=0 clock=600 temptarget=185 tempcrit=0 fan=255
 [2014-01-16 19:50:16] KLN0:0 config (0: Clk: 600, T:70, C:0, F:99)
 [2014-01-16 19:50:16] KLN0: getting status
 [2014-01-16 19:50:16] KLN0:0 Send cmd [S]
 [2014-01-16 19:50:16] KLN0:0 reply [S:0052100000004e7f000000000400]
 [2014-01-16 19:50:16] KLN0:0 Reply status [S] dev=0 chips=16 slaves=0 workcq=0 workid=0 temp=78 fan=127 errors=0 hashes=0 max=1024 noise=0
 [2014-01-16 19:50:16] KLN0:0 Send enable [E] enable=1
 [2014-01-16 19:50:16] KLN0:0 reply [E:0052100000004e7f000000000400]
 [2014-01-16 19:50:16] KLN0:0 Reply status [E] dev=0 chips=16 slaves=0 workcq=0 workid=0 temp=78 fan=127 errors=0 hashes=0 max=1024 noise=0
 [2014-01-16 19:50:17] Waking up thread 0
 [2014-01-16 19:50:17] Creating extra submit work thread
 [2014-01-16 19:50:17] API not running - API will not be available
 [2014-01-16 19:50:17] KLN0: flushing work
 [2014-01-16 19:50:17] KLN0:0 Send cmd [A]
 [2014-01-16 19:50:17] Selecting pool 0 for work
 [2014-01-16 19:50:17] Generated stratum header 000000027e561e88ab630fa62750dbcc528783e0cf05096d4e42363400000000000000005014aefbfa1653d26f4ea072f16068c37e4ce47acfc4bcdddf102576a83338be52d81c101902666600000000
 [2014-01-16 19:50:17] Work job_id 11331 nonce2 00000000
 [2014-01-16 19:50:17] Generated target 000000007fff8000000000000000000000000000000000000000000000000000
 [2014-01-16 19:50:17] Generated stratum work
 [2014-01-16 19:50:17] Pushing work 2 from pool 0 to hash queue
 [2014-01-16 19:50:17] Network difficulty changed to 1.79G (12.81Ph/s)
 [2014-01-16 19:50:17] New block: ...ab630fa67e561e88 diff 1.79G (12.81Ph/s)
 [2014-01-16 19:50:17] Selecting pool 0 for work
 [2014-01-16 19:50:17] Generated stratum header 000000027e561e88ab630fa62750dbcc528783e0cf05096d4e4236340000000000000000b152c8be06cf192c38f7e91192f91d81f7ffd17964df649bc57ca473f6f9c71152d81c101902666600000000
 [2014-01-16 19:50:17] Work job_id 11331 nonce2 01000000
 [2014-01-16 19:50:17] KLN0:0 reply [A:0052100000004e7f000000000400]
 [2014-01-16 19:50:17] Generated target 000000007fff8000000000000000000000000000000000000000000000000000
 [2014-01-16 19:50:17] KLN0:0 Reply status [A] dev=0 chips=16 slaves=0 workcq=0 workid=0 temp=78 fan=127 errors=0 hashes=0 max=1024 noise=0
 [2014-01-16 19:50:17] Generated stratum work
 [2014-01-16 19:50:17] Pushing work 4 from pool 0 to hash queue
 [2014-01-16 19:50:17] Selecting pool 0 for work
 [2014-01-16 19:50:17] Generated stratum header 000000027e561e88ab630fa62750dbcc528783e0cf05096d4e4236340000000000000000a05459adb57f224f9a23558bb246a1aeb8b6373c6a066ae4391cdf03603389c252d81c101902666600000000
 [2014-01-16 19:50:17] Work job_id 11331 nonce2 02000000
 [2014-01-16 19:50:17] Generated target 000000007fff8000000000000000000000000000000000000000000000000000
 [2014-01-16 19:50:17] Generated stratum work
 [2014-01-16 19:50:17] Pushing work 6 from pool 0 to hash queue
 [2014-01-16 19:50:17] Selecting pool 0 for work
 [2014-01-16 19:50:17] Generated stratum header 000000027e561e88ab630fa62750dbcc528783e0cf05096d4e423634000000000000000069610fc648dbe15d0eff4d518d2139e7b05772d2085a17b8b24eaf7313464c5352d81c101902666600000000
 [2014-01-16 19:50:17] Work job_id 11331 nonce2 03000000
 [2014-01-16 19:50:17] Generated target 000000007fff8000000000000000000000000000000000000000000000000000
 [2014-01-16 19:50:17] Generated stratum work
 [2014-01-16 19:50:17] Pushing work 8 from pool 0 to hash queue
 [2014-01-16 19:50:17] Selecting pool 0 for work
 [2014-01-16 19:50:17] Generated stratum header 000000027e561e88ab630fa62750dbcc528783e0cf05096d4e4236340000000000000000dcd2c693da935acbf33d57626a16205cc47144c1127313a29ebc73d391f99a8652d81c101902666600000000
 [2014-01-16 19:50:17] Work job_id 11331 nonce2 04000000
 [2014-01-16 19:50:17] Generated target 000000007fff8000000000000000000000000000000000000000000000000000
 [2014-01-16 19:50:17] Generated stratum work
 [2014-01-16 19:50:17] Pushing work 10 from pool 0 to hash queue
 [2014-01-16 19:50:17] Selecting pool 0 for work
 [2014-01-16 19:50:17] Generated stratum header 000000027e561e88ab630fa62750dbcc528783e0cf05096d4e4236340000000000000000c56f61d17901bac04e0b1eed361f1bf4793ef1b917de03b7f6fc4b8b65f0ecd752d81c101902666600000000
 [2014-01-16 19:50:17] Work job_id 11331 nonce2 05000000
 [2014-01-16 19:50:17] Generated target 000000007fff8000000000000000000000000000000000000000000000000000
 [2014-01-16 19:50:17] Generated stratum work
 [2014-01-16 19:50:17] Pushing work 12 from pool 0 to hash queue
 [2014-01-16 19:50:17] Selecting pool 0 for work
 [2014-01-16 19:50:17] Generated stratum header 000000027e561e88ab630fa62750dbcc528783e0cf05096d4e4236340000000000000000ae19f83b25a2cee489b48cfe0084447418a3dacdaef9c07d52b1ddcd6cf9fdef52d81c101902666600000000
 [2014-01-16 19:50:17] Work job_id 11331 nonce2 06000000
 [2014-01-16 19:50:17] Generated target 000000007fff8000000000000000000000000000000000000000000000000000
 [2014-01-16 19:50:17] Generated stratum work
 [2014-01-16 19:50:17] Pushing work 14 from pool 0 to hash queue
 [2014-01-16 19:50:17] Selecting pool 0 for work
 [2014-01-16 19:50:17] Generated stratum header 000000027e561e88ab630fa62750dbcc528783e0cf05096d4e4236340000000000000000b814c274391fcf6babd97fa51b37b00ac84a6af67b771c73d7ec0299e693d67552d81c101902666600000000
 [2014-01-16 19:50:17] Work job_id 11331 nonce2 07000000
 [2014-01-16 19:50:17] Generated target 000000007fff8000000000000000000000000000000000000000000000000000
 [2014-01-16 19:50:17] Generated stratum work
 [2014-01-16 19:50:17] Pushing work 16 from pool 0 to hash queue
 [2014-01-16 19:50:17] Selecting pool 0 for work
 [2014-01-16 19:50:17] Generated stratum header 000000027e561e88ab630fa62750dbcc528783e0cf05096d4e42363400000000000000007621f6ec5b1c80783f74a703d437cd4cdf29c2e3ed1be19a0dca8030346c994052d81c101902666600000000
 [2014-01-16 19:50:17] Work job_id 11331 nonce2 08000000
 [2014-01-16 19:50:17] Generated target 000000007fff8000000000000000000000000000000000000000000000000000
 [2014-01-16 19:50:17] Generated stratum work
 [2014-01-16 19:50:17] Pushing work 18 from pool 0 to hash queue
 [2014-01-16 19:50:17] Popping ping in miner thread
 [2014-01-16 19:50:17] KLN 0: Popping work from get queue to get work
 [2014-01-16 19:50:17] KLN 0: Got work 2 from get queue to get work for thread 0
 [2014-01-16 19:50:17] Selecting pool 0 for work
 [2014-01-16 19:50:17] WORKDATA: 570000aeef01d04538ec3ed470735eb9d9f6d803e2efaa6440cb2507cc380ec2498639a83338be52d81c1019026666
 [2014-01-16 19:50:17] KLN0:0 sending work (0:00)
 [2014-01-16 19:50:17] Generated stratum header 000000027e561e88ab630fa62750dbcc528783e0cf05096d4e42363400000000000000002913630fcdab61f7860abd315c2cb2ad480d11f8ab1bb8f5d473b059533eca4a52d81c101902666600000000
 [2014-01-16 19:50:17] KLN0:0 Send work [W] dev=0 workid=0x00 ...
 [2014-01-16 19:50:17] Work job_id 11331 nonce2 09000000
 [2014-01-16 19:50:17] Generated target 000000007fff8000000000000000000000000000000000000000000000000000
 [2014-01-16 19:50:17] Generated stratum work
 [2014-01-16 19:50:17] Pushing work 20 from pool 0 to hash queue
 [2014-01-16 19:50:17] KLN0:0 reply [W:0057100000004e7f000000000400]
 [2014-01-16 19:50:17] KLN0:0 Reply status [W] dev=0 chips=16 slaves=0 workcq=0 workid=0 temp=78 fan=127 errors=0 hashes=0 max=1024 noise=0
 [2014-01-16 19:50:17] KLN 0: Popping work from get queue to get work
 [2014-01-16 19:50:17] KLN 0: Got work 4 from get queue to get work for thread 0
 [2014-01-16 19:50:17] Selecting pool 0 for work
 [2014-01-16 19:50:17] WORKDATA: 570001f06bab1130c3e0482ef279d21b3a6c2556c34f6bd79348acd4a1ca1544f7ce9ef6f9c71152d81c1019026666
 [2014-01-16 19:50:17] KLN0:0 sending work (0:01)
 [2014-01-16 19:50:17] Generated stratum header 000000027e561e88ab630fa62750dbcc528783e0cf05096d4e4236340000000000000000fc2008eb64670e53c4d5f4095dce9752afa42cf02af90be421d636dadf260efd52d81c101902666600000000
 [2014-01-16 19:50:17] KLN0:0 Send work [W] dev=0 workid=0x01 ...
 [2014-01-16 19:50:17] Work job_id 11331 nonce2 0a000000
 [2014-01-16 19:50:17] Generated target 000000007fff8000000000000000000000000000000000000000000000000000
 [2014-01-16 19:50:17] Generated stratum work
 [2014-01-16 19:50:17] Pushing work 22 from pool 0 to hash queue
 [2014-01-16 19:50:17] KLN0:0 reply [W:0057100001004e7f008800000400]
 [2014-01-16 19:50:17] KLN0:0 Reply status [W] dev=0 chips=16 slaves=0 workcq=1 workid=0 temp=78 fan=127 errors=0 hashes=136 max=1024 noise=0
 [2014-01-16 19:50:17] KLN 0: Popping work from get queue to get work
 [2014-01-16 19:50:17] KLN 0: Got work 6 from get queue to get work for thread 0
 [2014-01-16 19:50:17] Selecting pool 0 for work
 [2014-01-16 19:50:17] WORKDATA: 57000282a77f41545d2ca8bfe12a76dbc478419e17995dcd96646c1c5131e9f4754562603389c252d81c1019026666
 [2014-01-16 19:50:17] KLN0:0 sending work (0:02)
 [2014-01-16 19:50:17] Generated stratum header 000000027e561e88ab630fa62750dbcc528783e0cf05096d4e423634000000000000000022dcfe56f6b2850f4becd6e7418a5f7aa0e8e08ff9c850b8fcb928122bd4a5c052d81c111902666600000000
 [2014-01-16 19:50:17] KLN0:0 Send work [W] dev=0 workid=0x02 ...
 [2014-01-16 19:50:17] Work job_id 11331 nonce2 0b000000
 [2014-01-16 19:50:17] Generated target 000000007fff8000000000000000000000000000000000000000000000000000
 [2014-01-16 19:50:17] Generated stratum work
 [2014-01-16 19:50:17] Pushing work 24 from pool 0 to hash queue
 [2014-01-16 19:50:17] KLN0:0 reply [W:0057100002004e7f001201000400]
 [2014-01-16 19:50:17] KLN0:0 Reply status [W] dev=0 chips=16 slaves=0 workcq=2 workid=0 temp=78 fan=127 errors=0 hashes=274 max=1024 noise=0
 [2014-01-16 19:50:17] KLN 0: Popping work from get queue to get work
 [2014-01-16 19:50:17] KLN 0: Got work 8 from get queue to get work for thread 0
 [2014-01-16 19:50:17] Selecting pool 0 for work
 [2014-01-16 19:50:17] WORKDATA: 57000376eae5f2a87c19cc773f391921435c2f8dfadd6b07d4b2a74369488d6799174113464c5352d81c1019026666
 [2014-01-16 19:50:17] KLN0:0 sending work (0:03)
 [2014-01-16 19:50:17] Generated stratum header 000000027e561e88ab630fa62750dbcc528783e0cf05096d4e42363400000000000000003ae1d0420264e3de62194ac7aade6861f39e8ceb9d8df9cc683be7e4fdcfb4b752d81c111902666600000000
 [2014-01-16 19:50:17] KLN0:0 Send work [W] dev=0 workid=0x03 ...
 [2014-01-16 19:50:17] Work job_id 11331 nonce2 0c000000
 [2014-01-16 19:50:17] Generated target 000000007fff8000000000000000000000000000000000000000000000000000
 [2014-01-16 19:50:17] Generated stratum work
 [2014-01-16 19:50:17] Pushing work 26 from pool 0 to hash queue
 [2014-01-16 19:50:17] KLN0:0 reply [W:0057100003004e7f009c01000400]
 [2014-01-16 19:50:17] KLN0:0 Reply status [W] dev=0 chips=16 slaves=0 workcq=3 workid=0 temp=78 fan=127 errors=0 hashes=412 max=1024 noise=0
 [2014-01-16 19:50:17] KLN 0: Popping work from get queue to get work
 [2014-01-16 19:50:17] KLN 0: Got work 10 from get queue to get work for thread 0
 [2014-01-16 19:50:17] Selecting pool 0 for work
 [2014-01-16 19:50:17] WORKDATA: 5700040ffab58778a45fea5916e919ab9605ea6728f6e2098eb650e67799180927351e91f99a8652d81c1019026666
 [2014-01-16 19:50:17] Generated stratum header 000000027e561e88ab630fa62750dbcc528783e0cf05096d4e4236340000000000000000422d37fcddb78a707f37e52448124801d5fba5635a59bd11f0c2c6960907977752d81c111902666600000000
 [2014-01-16 19:50:17] KLN0:0 sending work (0:04)
 [2014-01-16 19:50:17] Work job_id 11331 nonce2 0d000000
 [2014-01-16 19:50:17] KLN0:0 Send work [W] dev=0 workid=0x04 ...
 [2014-01-16 19:50:17] Generated target 000000007fff8000000000000000000000000000000000000000000000000000
 [2014-01-16 19:50:17] Generated stratum work
 [2014-01-16 19:50:17] Pushing work 28 from pool 0 to hash queue
 [2014-01-16 19:50:17] KLN0:0 reply [W:0057100004004e7f002602000400]
 [2014-01-16 19:50:17] KLN0:0 Reply status [W] dev=0 chips=16 slaves=0 workcq=4 workid=0 temp=78 fan=127 errors=0 hashes=550 max=1024 noise=0
 [2014-01-16 19:50:17] KLN 0: Popping work from get queue to get work
 [2014-01-16 19:50:17] KLN 0: Got work 12 from get queue to get work for thread 0
 [2014-01-16 19:50:17] Selecting pool 0 for work
 [2014-01-16 19:50:17] WORKDATA: 570005b569544e8b1f1f6e6dac72391c2c49be687bfb3fbb0df1ad5f0386b3d06b21a365f0ecd752d81c1019026666
 [2014-01-16 19:50:17] KLN0:0 sending work (0:05)
 [2014-01-16 19:50:17] Generated stratum header 000000027e561e88ab630fa62750dbcc528783e0cf05096d4e423634000000000000000057d2c987c25fa845f428f8d55f3988393f3fcb054c65662c835f0250cbfd137552d81c111902666600000000
 [2014-01-16 19:50:17] KLN0:0 Send work [W] dev=0 workid=0x05 ...
 [2014-01-16 19:50:17] Work job_id 11331 nonce2 0e000000
 [2014-01-16 19:50:17] Generated target 000000007fff8000000000000000000000000000000000000000000000000000
 [2014-01-16 19:50:17] Generated stratum work
 [2014-01-16 19:50:17] Pushing work 30 from pool 0 to hash queue
 [2014-01-16 19:50:17] KLN0:0 reply [W:0057100005004e7f00b002000400]
 [2014-01-16 19:50:17] KLN0:0 Reply status [W] dev=0 chips=16 slaves=0 workcq=5 workid=0 temp=78 fan=127 errors=0 hashes=688 max=1024 noise=0
 [2014-01-16 19:50:17] KLN 0: Popping work from get queue to get work
 [2014-01-16 19:50:17] KLN 0: Got work 14 from get queue to get work for thread 0
 [2014-01-16 19:50:17] Selecting pool 0 for work
 [2014-01-16 19:50:17] WORKDATA: 570006e13daaf0870ef1abb02fc625ca1812cb131199851f99f6da1dec83776481b7bc6cf9fdef52d81c1019026666
 [2014-01-16 19:50:17] KLN0:0 sending work (0:06)
 [2014-01-16 19:50:17] Generated stratum header 000000027e561e88ab630fa62750dbcc528783e0cf05096d4e4236340000000000000000cc9dad57fe73ff70aba425f202f64e62de181edc0bafad6476abb13d7283c8d252d81c111902666600000000
 [2014-01-16 19:50:17] KLN0:0 Send work [W] dev=0 workid=0x06 ...
 [2014-01-16 19:50:17] Work job_id 11331 nonce2 0f000000
 [2014-01-16 19:50:17] Generated target 000000007fff8000000000000000000000000000000000000000000000000000
 [2014-01-16 19:50:17] Generated stratum work
 [2014-01-16 19:50:17] Pushing work 32 from pool 0 to hash queue
 [2014-01-16 19:50:17] KLN0:0 reply [W:0057100006004e7f003a03000400]
 [2014-01-16 19:50:17] KLN0:0 Reply status [W] dev=0 chips=16 slaves=0 workcq=6 workid=0 temp=78 fan=127 errors=0 hashes=826 max=1024 noise=0
 [2014-01-16 19:50:17] KLN 0: Popping work from get queue to get work
 [2014-01-16 19:50:17] KLN 0: Got work 16 from get queue to get work for thread 0
 [2014-01-16 19:50:17] Selecting pool 0 for work
 [2014-01-16 19:50:17] WORKDATA: 5700072969b464b8a94cd28f5867662599e04c3e12949f4def9ef1bc6e835a0b4499f7e693d67552d81c1019026666
 [2014-01-16 19:50:17] KLN0:0 sending work (0:07)
 [2014-01-16 19:50:17] Generated stratum header 000000027e561e88ab630fa62750dbcc528783e0cf05096d4e42363400000000000000005d3f97c9a878ad4eb4aa0a130841912cd2c2253ada24f4b50587af0726f98d5152d81c111902666600000000
 [2014-01-16 19:50:17] KLN0:0 Send work [W] dev=0 workid=0x07 ...
 [2014-01-16 19:50:17] Work job_id 11331 nonce2 10000000
 [2014-01-16 19:50:17] Generated target 000000007fff8000000000000000000000000000000000000000000000000000
 [2014-01-16 19:50:17] Generated stratum work
 [2014-01-16 19:50:17] Pushing work 34 from pool 0 to hash queue
 [2014-01-16 19:50:17] KLN0:0 reply [W:0057100007004e7f00c403000400]
 [2014-01-16 19:50:17] KLN0:0 Reply status [W] dev=0 chips=16 slaves=0 workcq=7 workid=0 temp=78 fan=127 errors=0 hashes=964 max=1024 noise=0
 [2014-01-16 19:50:17] KLN0:0 reply [=:0001452d32724e7f002602000400]
 [2014-01-16 19:50:17] KLN0:0 FOUND NONCE (01:72322bc5)
 [2014-01-16 19:50:17] KLN0:0 SUBMIT NONCE (01:72322bc5)
 [2014-01-16 19:50:17]  Proof: 00000000ec2f1ccd0b6f42515ce0a063dd1dde127b05f79d3fc98d5650e578ac
Target: 000000007fff8000000000000000000000000000000000000000000000000000
TrgVal? no (false positive; hash > target)
 [2014-01-16 19:50:17] New best share: 1
 [2014-01-16 19:50:17] KLN0:0 chip stats 0, 72322bc5, 268435456, 16
 [2014-01-16 19:50:17] KLN0:0 Reply work [=] dev=0 workid=1 nonce=0x72322bc5
 [2014-01-16 19:50:17] KLN 0: Popping work from get queue to get work
 [2014-01-16 19:50:17] KLN 0: Got work 18 from get queue to get work for thread 0
 [2014-01-16 19:50:17] Selecting pool 0 for work
 [2014-01-16 19:50:17] Generated stratum header 000000027e561e88ab630fa62750dbcc528783e0cf05096d4e42363400000000000000002b4f1007b5159fc4c4ff839d4f5813f1f053137020cd9bc0168db220841830a152d81c111902666600000000
 [2014-01-16 19:50:17] Work job_id 11331 nonce2 11000000
 [2014-01-16 19:50:17] Generated target 000000007fff8000000000000000000000000000000000000000000000000000
 [2014-01-16 19:50:17] Generated stratum work
 [2014-01-16 19:50:17] Pushing work 37 from pool 0 to hash queue
 [2014-01-16 19:50:18] [thread 0: 4294967295 hashes, 1174.8 khash/sec]
 [2014-01-16 19:50:18] KLN0 24.3C | 5s: 0.00 avg: 4.21 u: 4.21 Gh/s | A:0 R:0+0(none) HW:0/none
 [2014-01-16 19:50:18] KLN0:0 reply [=:00014bb45b3f4e7f00b002000400]
 [2014-01-16 19:50:18] KLN0:0 FOUND NONCE (01:3f5bb2cb)
 [2014-01-16 19:50:18] KLN0:0 SUBMIT NONCE (01:3f5bb2cb)
 [2014-01-16 19:50:18]  Proof: 000000000f025d5d6e4600e98ce40c0395a003fa2db72717c33c39bf0586da2e
Target: 000000007fff8000000000000000000000000000000000000000000000000000
TrgVal? YES (hash <= target)
 [2014-01-16 19:50:18] Pushing submit work to work thread
 [2014-01-16 19:50:18] KLN0:0 chip stats 0, 3f5bb2cb, 268435456, 16
 [2014-01-16 19:50:18] New best share: 17
 [2014-01-16 19:50:18] KLN0:0 Reply work [=] dev=0 workid=1 nonce=0x3f5bb2cb
 [2014-01-16 19:50:18] DBG: sending eu-stratum.btcguild.com submit RPC call: {"params": ["username", "11331", "01000000", "52d81c10", "cbb25b3f"], "id": 2, "method": "mining.submit"}
 [2014-01-16 19:50:18] KLN0:0 reply [=:0001452d32724e7f003a03000400]
 [2014-01-16 19:50:18] KLN0:0 FOUND NONCE (01:72322bc5)
 [2014-01-16 19:50:18] KLN0:0 SUBMIT NONCE (01:72322bc5)
 [2014-01-16 19:50:18]  Proof: 00000000ec2f1ccd0b6f42515ce0a063dd1dde127b05f79d3fc98d5650e578ac
Target: 000000007fff8000000000000000000000000000000000000000000000000000
TrgVal? no (false positive; hash > target)
 [2014-01-16 19:50:18] KLN0:0 chip stats 0, 72322bc5, 268435456, 16
 [2014-01-16 19:50:18] KLN0:0 Reply work [=] dev=0 workid=1 nonce=0x72322bc5
 [2014-01-16 19:50:18] KLN0:0 reply [=:00014bb45b3f4e7f00c403000400]
 [2014-01-16 19:50:18] KLN0:0 FOUND NONCE (01:3f5bb2cb)
 [2014-01-16 19:50:18] KLN0:0 SUBMIT NONCE (01:3f5bb2cb)
 [2014-01-16 19:50:18]  Proof: 000000000f025d5d6e4600e98ce40c0395a003fa2db72717c33c39bf0586da2e
Target: 000000007fff8000000000000000000000000000000000000000000000000000
TrgVal? YES (hash <= target)
 [2014-01-16 19:50:18] Pushing submit work to work thread
 [2014-01-16 19:50:18] KLN0:0 chip stats 0, 3f5bb2cb, 268435456, 16
 [2014-01-16 19:50:18] KLN0:0 Reply work [=] dev=0 workid=1 nonce=0x3f5bb2cb
 [2014-01-16 19:50:18] KLN0:0 reply [=:0001452d32724e7f002602000400]
 [2014-01-16 19:50:18] KLN0:0 FOUND NONCE (01:72322bc5)
 [2014-01-16 19:50:18] KLN0:0 SUBMIT NONCE (01:72322bc5)
 [2014-01-16 19:50:18]  Proof: 00000000ec2f1ccd0b6f42515ce0a063dd1dde127b05f79d3fc98d5650e578ac
Target: 000000007fff8000000000000000000000000000000000000000000000000000
TrgVal? no (false positive; hash > target)
 [2014-01-16 19:50:18] KLN0:0 chip stats 0, 72322bc5, 268435456, 16
 [2014-01-16 19:50:18] KLN0:0 Reply work [=] dev=0 workid=1 nonce=0x72322bc5
 [2014-01-16 19:50:18] KLN0:0 reply [=:00025d0560674e7f00b002000400]
 [2014-01-16 19:50:18] KLN0:0 FOUND NONCE (02:676003dd)
 [2014-01-16 19:50:18] KLN0:0 SUBMIT NONCE (02:676003dd)
 [2014-01-16 19:50:18]  Proof: 00000000d4312e4f6f5cbabf3ceafa518a5d9023409dfa270539b02e01a174cb
Target: 000000007fff8000000000000000000000000000000000000000000000000000
TrgVal? no (false positive; hash > target)
 [2014-01-16 19:50:18] KLN0:0 chip stats 0, 676003dd, 268435456, 16
 [2014-01-16 19:50:18] KLN0:0 Reply work [=] dev=0 workid=2 nonce=0x676003dd
 [2014-01-16 19:50:18] PROOF OF WORK RESULT: true (yay!!!)
 [2014-01-16 19:50:18] Accepted 0f025d5d KLN 0  Diff 17/2


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: DrZeck on January 17, 2014, 07:59:28 AM
I cant help much at the moment, my boards still waiting for parts to arrive but i think you should do debuging on linux machine. raspberry pi would be good start.

you should use patched version of cgminer/bfgminer from formtapez git.

Cheers,


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: hongkongapple1 on January 17, 2014, 03:36:26 PM
Give u a hint~ 

No worried ~ 

Set the Clock higher ! 

u will see.. ~   Step by Step, u will get to 21.xG  for sure

( I've tested many on CGMiner )

remember large bottom Heatsink is a MUST


Jeffrey


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: explorer232 on January 17, 2014, 10:00:05 PM
I would like to try this design each. Do anyone have pure PCB for sale?


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Ostenbacken on January 18, 2014, 12:23:45 AM
Hi guys. I have a concern about that the 16-chip board could overload the PTH14020WAH voltage converter.

According to my experimental data with 10-chip boards of this topic, and according to the Avalon-2 datasheet, it seems that the maximum load current of the voltage converter (50A) will be exceeded when the chips are run at their maximum speed.

By datasheet, the chips claim 2.05W/Gh. We could run the chips at 1.5-1.6GH/s on the 10-chip board, so on the 16-chip board the typical power consumption will be 2.05*1.6*16=52.48W. Assuming 1V core supply voltage, this results in 52.48A consumption from the DVDD source.

But the measured power consumption is a bit higher. The 10-chip board draws 3.5A from the 12V source which is 42W. Assume 3W goes into 3.3V supply to power the PIC and the rest of the circuit, while 39W goes into the voltage converter. Assuming 85% efficiency (per datasheet at this output voltage), the output power is 33.15W which corresponds to 33A current draw for 10 chips. If we run 16 chips in this mode, the current would proportionally rise to 53.04A.

This is only a slight overload, but still. I wonder if any of you guys have any experience about how does the voltage converter behave in this overload mode. Does it still function properly? Does the output voltage drop or start oscillating or smth? Do the converter's components overheat?


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Lucko on January 18, 2014, 11:48:55 AM
hongkongapple1 please confirm TNT pickup of my boards... They will not come until you do that. It is a week now... Come on... If you would like to send them other way just say so and don't wait anymore.... If you need help say... I know you are/ware sick but still...

Ostenbacken read specification a bit batter. Overload is 100A... Over 50A you just need cooling(moving air)...


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Ostenbacken on January 18, 2014, 01:34:35 PM
Ostenbacken read specification a bit batter. Overload is 100A... Over 50A you just need cooling(moving air)...
I just read the datasheet again. All performance graphs end at 50A output current. There is even an output current derating below 50A recommended for applications with insufficient cooling. The overcurrent protection shuts down the regulator at 95A output current. So where did you find 100A output current capability in the datasheet? Which page? Or perhaps you were looking at a different product specs? PTH12040WAH is the correct part number.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Lucko on January 18, 2014, 02:57:57 PM
I was writing from memory... So 95A... It is tested and it works(on a different board)... So don't worry...


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Ostenbacken on January 18, 2014, 04:20:29 PM
So 95A... It is tested and it works(on a different board)... So don't worry...
Ok, at least it sort of works. I already ordered the PCBs so I'll probably just run the modules overloaded or reduce the hash rate. But it's a bad engineering practice. Do you think TI's engineers were not tempted to quote higher values in their datasheet if the device was really capable of providing more output current? These days everything is around marketing, and part manufacturers sometimes quote very optimistic values that are only achievable in very controlled circumstances, while in real applications the part can't be realistically expected to deliver that performance. So there must be reasons why their nominal output current is limited to 50A, not more.

Overcurrent protection is just a safeguard against unexpected, exceptional overloads but not a guideline to constantly run your device at currents between 50 and 95A. If you constantly violate datasheet requirements in your designs, you're simply asking for trouble. Say, if this module fails catastrophically, not only it will cost you some $40-$50 to replace it, but it could also fry 16 of your Avalon chips. In the end you may lose a whole board with all parts.

I would consider reducing the number of chips on the board to 12-14 or making a custom VDD voltage regulator in place of the PTH12040 module. The latter approach could also save costs considerably. I have some experience with switching mode power converters, but not at these high currents.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Lucko on January 18, 2014, 05:08:06 PM
Don't complicate things for a board that will work only 6 to 12 months


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Lucko on January 20, 2014, 02:50:51 PM
hongkongapple1 still sick? Can you please send my boards on the way...


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: BigJRepairs on January 20, 2014, 08:15:50 PM
For what it's worth Lucko I think he's trying, he just bit off more than he could chew.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: whommbat on January 21, 2014, 03:37:04 AM
I just got a new miner today and it seems to be working great. Only thing is I noticed some inconsistencies as far as the match_work_count goes.
Can anyone confirm that there is an issue? Weird thing is, I'm hashing at the advertised rate...
Please give me some insight.
I appreciate it.


https://i.imgur.com/2ZkCO4J.png?1


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: hongkongapple1 on January 21, 2014, 12:04:25 PM
hongkongapple1 still sick? Can you please send my boards on the way...

Dear Lucko,  I have now still now 5 boards for u,  & 11 boards for my Finland Clients~  who he have actually have wait for the longest time ~  there is a lots of credit for your guys ~  who paitent enought to wait ~  While problem arise on the board,  some board can't pass the test, which cos more delay ~

All should be finialized ~  should be able to send them all all tomorrow.. ~

Lets u guys had a great news ~ 

Now the board can run very stable @ 1.59 Ghz / Chips ~

Means u can now get ~ a promised ( 25.5 Ghz very Stable !)


~  So some who do true this dude !  Will Paid off now ~

Pls do not ask me how,  this is lots of hardwork & co-operation ~  ( including working under a 5 days Extreme Fever & Flu, super head killing condition ~  luckily all are passed !  only my voice are not back yet,  I have almost lost my voice )

Only avaliable to Lucko & great supporter ~

I will preload the firmware for u ~   


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Girhes on January 21, 2014, 01:48:55 PM
Pls do not ask me how,  this is lots of hardwork & co-operation

Please let me ask if you also had to modify the board, or made software tweaking only?

I've already sent the plans to my factory, but I don't have the time to debug the board right now, so I'll have to cancel the order then :\


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: explorer232 on January 21, 2014, 03:57:32 PM
hongkongapple1 still sick? Can you please send my boards on the way...

Dear Lucko,  I have now still now 5 boards for u,  & 11 boards for my Finland Clients~  who he have actually have wait for the longest time ~  there is a lots of credit for your guys ~  who paitent enought to wait ~  While problem arise on the board,  some board can't pass the test, which cos more delay ~

All should be finialized ~  should be able to send them all all tomorrow.. ~

Lets u guys had a great news ~  

Now the board can run very stable @ 1.59 Ghz / Chips ~

Means u can now get ~ a promised ( 25.5 Ghz very Stable !)


~  So some who do true this dude !  Will Paid off now ~

Pls do not ask me how,  this is lots of hardwork & co-operation ~  ( including working under a 5 days Extreme Fever & Flu, super head killing condition ~  luckily all are passed !  only my voice are not back yet,  I have almost lost my voice )

Only avaliable to Lucko & great supporter ~

I will preload the firmware for u ~    

Hi,
do you have already readed GNU v3 public licence because original source code & hw is published under GNU v3 so if you use this code you must to publish modifications!  

I am author of another avalon 2 open source design (sw & hw) for info but this is usable for another people and safe more time.
This is fu****g bussines copy copy copy but no support for developer!  
 


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: BigJRepairs on January 21, 2014, 05:04:31 PM
So 95A... It is tested and it works(on a different board)... So don't worry...
Ok, at least it sort of works. I already ordered the PCBs so I'll probably just run the modules overloaded or reduce the hash rate. But it's a bad engineering practice. Do you think TI's engineers were not tempted to quote higher values in their datasheet if the device was really capable of providing more output current? These days everything is around marketing, and part manufacturers sometimes quote very optimistic values that are only achievable in very controlled circumstances, while in real applications the part can't be realistically expected to deliver that performance. So there must be reasons why their nominal output current is limited to 50A, not more.

Overcurrent protection is just a safeguard against unexpected, exceptional overloads but not a guideline to constantly run your device at currents between 50 and 95A. If you constantly violate datasheet requirements in your designs, you're simply asking for trouble. Say, if this module fails catastrophically, not only it will cost you some $40-$50 to replace it, but it could also fry 16 of your Avalon chips. In the end you may lose a whole board with all parts.

I would consider reducing the number of chips on the board to 12-14 or making a custom VDD voltage regulator in place of the PTH12040 module. The latter approach could also save costs considerably. I have some experience with switching mode power converters, but not at these high currents.

I share your cause for concern here. My uncles worked at TI 30 years as a lead engineer I'll run it by him. I have several years of experience myself. 2 years in Metrology constantly having to bring engineers back to the real world, because measurements are only as reliable as the instrument taking the measurement, and of course they would quote higher values if there was any chance it was capable.

They show on the graphs optimum current output is 35A, 50A is the absolute maximum. The derating curve suggests component breakdown over 50A. I didn't have a chance to examine the justification for your estimates. Is there any chance that they're off?


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: BigJRepairs on January 22, 2014, 03:57:23 AM
I can't get the sim to run on Altium for nothing. Does anyone know if those were built in an older Eagle environment, or what sim software will run it if any?

Quote
By datasheet, the chips claim 2.05W/Gh. We could run the chips at 1.5-1.6GH/s on the 10-chip board, so on the 16-chip board the typical power consumption will be 2.05*1.6*16=52.48W. Assuming 1V core supply voltage, this results in 52.48A consumption from the DVDD source.

But the measured power consumption is a bit higher. The 10-chip board draws 3.5A from the 12V source which is 42W. Assume 3W goes into 3.3V supply to power the PIC and the rest of the circuit, while 39W goes into the voltage converter. Assuming 85% efficiency (per datasheet at this output voltage), the output power is 33.15W which corresponds to 33A current draw for 10 chips. If we run 16 chips in this mode, the current would proportionally rise to 53.04A.

I believe your math may be off trying to use optimum W/GH to calculate DC/DC converter current I/O. I noticed you quoted the current and voltage draw from the source but did you take any other measurements off the 10 chip board? If you measured a current draw on this converter above 35 amps with 10 chips it would really save me a lot of time.

I'm hoping it was intended to reflect this:

1.1V * 2A = 2.2 W/GH ==> 36A Draw for 16 chips or 35.2W for the same -- Give or take because engineers are forced to lie by management


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: HerrHeimlich on January 23, 2014, 06:18:55 PM
Hi everybody,

now I have my first Klondike-boards in hands and it seems that they need the last firmware to become flashed. Can anybody give me a description howto do this?

I also want to mine with the boards using minepeon. Must I patch the cgminer used by minepeon? If yes, how to do this?

A little help would be wonderfull.

Best regards

Joerg


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: end18 on January 24, 2014, 03:59:36 AM
Hi everybody,

now I have my first Klondike-boards in hands and it seems that they need the last firmware to become flashed. Can anybody give me a description howto do this?

I also want to mine with the boards using minepeon. Must I patch the cgminer used by minepeon? If yes, how to do this?

A little help would be wonderfull.

Best regards

Joerg

First, Klondike thread is here -> https://bitcointalk.org/index.php?topic=190731.3540 (https://bitcointalk.org/index.php?topic=190731.3540)

you can get last firmware  here ( It's write in first page of upper thread ) -> http://github.com/bkkcoins/klondike (http://github.com/bkkcoins/klondike)

you can find detail manual of Klondike , here ->  http://www.projectklondike.org/  (http://www.projectklondike.org/)

Buy PicKit3 in from here.  www.microchipdirect.com  (http://www.microchipdirect.com)

Download MPLAB IDE form www.microchip.com and compile firmware oor just write Hex to your PIC MCU with IPE (it's part of MPLAB IDE)


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: HerrHeimlich on January 25, 2014, 11:25:38 PM
Ok, what I did:
- bought Pickit3, downloaded MPLAB X, installed it
- download latest firmware once from
     github.com/formtapez/avalon and from
     github.com/zipiju/k16-firmware
-connected Pickit3 to computer, drivers have been installed
- started Pickit3
- choosen as device: PIC16LF1459
- pressed connect
- warning window pops up to check wether the choose device is correct or not. => checked it chip on board
   is PIC16LF1459 => pressed ok
- warning window pops up: Target Device ID (0x0) does not match the expected Device ID (0x3027). Would
  you like to continue? => press ok => CONNECTION WILL BE ESTABLISHED
- choose downloaded .hex-file => press Program
- error message comes up: failed to program device

What am I doing wrong? For me it seems that I have the .hex-files? Is this correct?

Does hongkongapple1 gave is latest firmware to anyone of you? I asked him twice for the .hex-file for 25GHs and he gave me no response nor the files.

Can anybody help me a little bit?
 


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: MrTeal on January 26, 2014, 10:27:13 AM
Ok, what I did:
- bought Pickit3, downloaded MPLAB X, installed it
- download latest firmware once from
     github.com/formtapez/avalon and from
     github.com/zipiju/k16-firmware
-connected Pickit3 to computer, drivers have been installed
- started Pickit3
- choosen as device: PIC16LF1459
- pressed connect
- warning window pops up to check wether the choose device is correct or not. => checked it chip on board
   is PIC16LF1459 => pressed ok
- warning window pops up: Target Device ID (0x0) does not match the expected Device ID (0x3027). Would
  you like to continue? => press ok => CONNECTION WILL BE ESTABLISHED
- choose downloaded .hex-file => press Program
- error message comes up: failed to program device

What am I doing wrong? For me it seems that I have the .hex-files? Is this correct?

Does hongkongapple1 gave is latest firmware to anyone of you? I asked him twice for the .hex-file for 25GHs and he gave me no response nor the files.

Can anybody help me a little bit?
 
The PicKit is not able to talk to the chip. Do you have the board powered while you try this?


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: HerrHeimlich on January 26, 2014, 12:12:39 PM
Yes, it becomes power from the psu. If the pickkit connects to the board the led is flashing once.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: cdragon on January 26, 2014, 01:30:04 PM
@HerrHeimlich

You have to use MPLAB IPE.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: HerrHeimlich on January 26, 2014, 10:26:40 PM
Yes I use it. But the errormessage says the it could not write to the board. It seems to be a settings problem. The programmer tries to write from 0x0 and the expected range seems to begin at 0x3027.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: MrTeal on January 26, 2014, 10:34:47 PM
Yes I use it. But the errormessage says the it could not write to the board. It seems to be a settings problem. The programmer tries to write from 0x0 and the expected range seems to begin at 0x3027.

No, what that message means is that the programmer is querying the chip for it's ID. That's hardcoded into the Pic, and it works if it's blank and can't be erased. Different PICs have different IDs, so if MPLAB is expecting 0x3027 and instead reads 0x4ca0 (PIC18F46J50) it will pop up and error saying that you're trying to write to the wrong kind of PIC.

If the programmer queries the PIC for it's device ID and reads 0x00, that means it's unable to talk to the PIC at all. Check that you have 3.3V to the chip, and that the PICKIT is connected correctly.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: HerrHeimlich on January 27, 2014, 12:06:18 AM
I have 3.3 V and the Pickit is connected correctly.
I can also download the existing firmware from the board.
Could it be that there must be a special setting in MPLABX IDE for prject properties ? Under prject properties - licensed debugger - auto select memories and ranges: I can choose "allow licensed debugger to select memories" or must ist be "manually select memories and ranges"?


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: end18 on January 27, 2014, 05:06:22 AM
I have 3.3 V and the Pickit is connected correctly.
I can also download the existing firmware from the board.
Could it be that there must be a special setting in MPLABX IDE for prject properties ? Under prject properties - licensed debugger - auto select memories and ranges: I can choose "allow licensed debugger to select memories" or must ist be "manually select memories and ranges"?

No, you did it right way.

I think, you have problem in your pcb or soldering.

I tested firmware working in my 10-chip board( I just tuned it up for mining speed ) and minimal setting in my breadboard.

Just connect usb header & ICSP Pins and powered form pickit3(with MPLAB 3.3v power output setting) , it works well.



Title: Re: Open Source Avalon Gen2 55nm Board
Post by: HerrHeimlich on January 27, 2014, 07:25:14 PM
Try to adjust this will get u different result ~  currently Max I get is around 12 - 16 G~  unstable ~

1st - #define MAX_WORK_COUNT      8  // must be binary multiple and match driver

2nd - #define TICK_TOTAL          12355  // 2^18 / 21.33uS TMR0 period (adjusted down for push time)

3rd - #define DEFAULT_HASHCLOCK   2300

this are the combo ~ u need to try on vary no. ~ if u get a best Combo ~ pls suggest here too

Nothing changes. Still "ignored" messages. Looks like there is something missing in microcontroller <> chip data exchange



if the Max Count is 8 ~  >>>>  #define TICK_TOTAL   20800


Can anybody please tell me where I have to change these values? In CGMINER? Or in the firmware of the board?



Title: Re: Open Source Avalon Gen2 55nm Board
Post by: HerrHeimlich on January 27, 2014, 07:38:44 PM
I have the idea that my PicKit3 is not working correctly. So I ordered a new one. Until it arrvives and I can flash the firmware for 25 GHs I will try to make the boards run as they at moment are.

I'm using minepeon succesfully for my Jalapenos and I want to use it (another Raspy with Minepeon) for my boards.
What have i done?
- installed the board incl. headsink and fan
- download cgminer from github

cd cgminer-klondike
chmod +x ./autogen.sh
./autogen.sh
./configure --enable-klondike
make

- added in the miner.conf following line: "klondike-options": "1300:50",

- startet cgminer
- startet the board
- cgminer detects the board
- cgminer gives errormessage: Klondike (1:8 ) detect read failed (0:-7)
- board is running with 17 GHs
- cgminer gives errormessage: KLN0:0 went idle before work was sent

What must I do to make this board mining under cgminer? Please help me


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: form on January 27, 2014, 07:56:10 PM
What must I do to make this board mining under cgminer? Please help me

Edit driver-klondike.c and set MAX_WORK_COUNT to 8, then compile again.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: HerrHeimlich on January 28, 2014, 12:11:08 AM
Edit driver-klondike.c and set MAX_WORK_COUNT to 8, then compile again.


I did it. but it has changed nothing. I have also follow the tip to change
#define REPLY_WAIT_TIME 25
#define CMD_REPLY_RETRIES 4
and compiled it new (make). Restart and nothing has changed.

Ideas?


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: BigJRepairs on January 29, 2014, 03:08:16 AM
Hey Jeffery,

Did you leave the PIC blank? No device shows up on windows or Linux.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: BigJRepairs on January 30, 2014, 04:06:15 PM
hongkongapple1 still sick? Can you please send my boards on the way...

Dear Lucko,  I have now still now 5 boards for u,  & 11 boards for my Finland Clients~  who he have actually have wait for the longest time ~  there is a lots of credit for your guys ~  who paitent enought to wait ~  While problem arise on the board,  some board can't pass the test, which cos more delay ~

All should be finialized ~  should be able to send them all all tomorrow.. ~

Lets u guys had a great news ~  

Now the board can run very stable @ 1.59 Ghz / Chips ~

Means u can now get ~ a promised ( 25.5 Ghz very Stable !)


~  So some who do true this dude !  Will Paid off now ~

Pls do not ask me how,  this is lots of hardwork & co-operation ~  ( including working under a 5 days Extreme Fever & Flu, super head killing condition ~  luckily all are passed !  only my voice are not back yet,  I have almost lost my voice )

Only avaliable to Lucko & great supporter ~

I will preload the firmware for u ~    

Hi,
do you have already readed GNU v3 public licence because original source code & hw is published under GNU v3 so if you use this code you must to publish modifications!  

I am author of another avalon 2 open source design (sw & hw) for info but this is usable for another people and safe more time.
This is fu****g bussines copy copy copy but no support for developer!  
 

I think it's a bluff or the pic got wiped during shipping, my boards turned out DOA even after a 5 day shipping delay that he claimed from the PIC. From what I understand Lucko has the same problem. I'm going to work this out and fork https://github.com/formtapez/avalon/tree/master/firmware (WHERE IT BELONGS) It's probably going to take me a week unless someone has an updated version. I'll provide flashing service afterwards, you just have to cover shipping and provide an ESD bag.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: hongkongapple1 on January 30, 2014, 05:26:11 PM
Ok, what I did:
- bought Pickit3, downloaded MPLAB X, installed it
- download latest firmware once from
     github.com/formtapez/avalon and from
     github.com/zipiju/k16-firmware
-connected Pickit3 to computer, drivers have been installed
- started Pickit3
- choosen as device: PIC16LF1459
- pressed connect
- warning window pops up to check wether the choose device is correct or not. => checked it chip on board
   is PIC16LF1459 => pressed ok
- warning window pops up: Target Device ID (0x0) does not match the expected Device ID (0x3027). Would
  you like to continue? => press ok => CONNECTION WILL BE ESTABLISHED
- choose downloaded .hex-file => press Program
- error message comes up: failed to program device

What am I doing wrong? For me it seems that I have the .hex-files? Is this correct?

Does hongkongapple1 gave is latest firmware to anyone of you? I asked him twice for the .hex-file for 25GHs and he gave me no response nor the files.

Can anybody help me a little bit?
 

NO one yet have the firmware ~  not even the people who have contribute me & great Minepeon Patch ~ 
Not even those who have bought 10+ unit ~ 
As the firmware is not in a releasing stage yet ~ 
Also I only help on providing the Hardware ~  ( Not software )  this is a project -  where anyone contribute some part ~

So what is ur part ?   U can't even flash a firmware which "form" already provided ~   

pls do not expect anyone will answer ur question ~  as I don't think they will just give out instruction which is already known !

Thx ~ for the blame ~  but again I should mention it ~ " I don't provide the firmware "   

It will be release when it is already, or while there is that I have gather enough interest ~ pls read & all the messge before asking ~

And pls read the Manual from Microchip ~  PICKIT

read about the what the errror message have tell u !!   as I remember the messge will tell u to set the compiler properly !   

I HAVE ONLY SET IT ONCE,  AND I DID IT WITHOUT EVER HAVE THIS KNOWAGE B4 ~ SO I WILL U CAN DO IT TOO ~~ 

This is a PROJECT, what u have to expect is KEEP TRYING UNTIL U GOT IT ~



Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Lucko on January 30, 2014, 07:50:29 PM
You don't provide even working board or completed parts... If I plug in yours it will just smoke with all the solder bridges over ASICs and the rest of problems like 4 out of 5 are missing fan connector, coolers have no way of attaching, 4 chips are strange, some strange damage on the back that looks like a crack(bed quality?)…

https://www.dropbox.com/sh/lz2kjfyoxewl9xu/1gjxpuMm3s

And you were promising something else when we talked... And all the delays(not like I have problems but your board is ready for shipping and then nothing) unresponsiveness and so on... Basically I wold like my money back and I can send you boards back...

EDIT: I asked to have them without power supply

Testing and programming that wasn't done:
Quote
How is the board. Is it hashing over 20GH jet?

BTW. If I take boards without power module. Will you be able to program and test them?

Regards



Yes, I can do the Clipping on for testing ~ I use two plastic clipper,  it will hold it firmly without slipping ~ while I test run

jeff


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: HerrHeimlich on January 30, 2014, 09:07:19 PM

NO one yet have the firmware ~  not even the people who have contribute me & great Minepeon Patch ~ 
Not even those who have bought 10+ unit ~ 
As the firmware is not in a releasing stage yet ~ 
Also I only help on providing the Hardware ~  ( Not software )  this is a project -  where anyone contribute some part ~

So what is ur part ?   U can't even flash a firmware which "form" already provided ~   

pls do not expect anyone will answer ur question ~  as I don't think they will just give out instruction which is already known !

Thx ~ for the blame ~  but again I should mention it ~ " I don't provide the firmware "   



Hallo Jeffrey,
thanks for your clear words. But if you remember, you posted at 6th january in minepeons forum that you have a running system and that you will bring up the firmware to run with 25GHs http://www.minepeon.com/forums/viewtopic.php?f=17&t=1219 (http://www.minepeon.com/forums/viewtopic.php?f=17&t=1219) within the next week. And there you offered ready to run boards!!! No word about being in a project state of development.
You offered the boards there ready to run for 280,-- US$ and I ordered two of them including headsink and fans. So I think you have to be a fair salesman and help your customer to get what they paid for.
Nothing more. If you can't do it then tell it clearly - once here and also at minepeon's forum.

In minepeons's forum there is a posting of bigjrepair where he also asks you for the firmware http://www.minepeon.com/forums/viewtopic.php?f=17&t=1219&p=5204#p5204 (http://www.minepeon.com/forums/viewtopic.php?f=17&t=1219&p=5204#p5204)

I don't want trouble, I just want my boards running.

Best Joerg


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: BigJRepairs on January 30, 2014, 09:29:11 PM
Those 3 chips in picture 6 look smoked. That split on the back in 8 is just metal for the heatsink to pull heat away from the chips. The Q48 package is a serious pain to solder properly and you can't really do it with a iron, heat gun, or reflow oven unless you have a pile of chips to practice on. The alternative is vision alignment and it's expensive unless you have one I don't suggest messing with this board. I have a Pickit3 coming today or tomorrow, I'm not promising 25 GH/S I think that's a bad idea even for a short time. 


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Lucko on January 30, 2014, 11:08:42 PM
Those 3 chips in picture 6 look smoked. That split on the back in 8 is just metal for the heatsink to pull heat away from the chips. The Q48 package is a serious pain to solder properly and you can't really do it with a iron, heat gun, or reflow oven unless you have a pile of chips to practice on. The alternative is vision alignment and it's expensive unless you have one I don't suggest messing with this board. I have a Pickit3 coming today or tomorrow, I'm not promising 25 GH/S I think that's a bad idea even for a short time. 
There is something over them that is for sure... What it is I have no idea... And they looked to be hand soldered since soldering paste is still around them and on the other side of the board. I know form so I already asked him for help but thanks for offering... I hope he will be able to fix solderbridges on chips...


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: HerrHeimlich on January 31, 2014, 07:28:47 AM
Hallo Jeffrey,

I can only accompany to Lucko.

The boards are not running as promised (you just said by yourself that not the right firmware is flashed). Just do it like this: I send back the boards immediatly to you and I will get a complete refund from you via paypal in Euro. To show me that you will really send the money back we do it like this: you send me half of the amount via paypal - I send you the tracking# of the parcel I send out - when you received the parcel (both of us can track it) you send out the second half of the amount.
Do you agree?

Best regards

Joerg


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: sri07174 on January 31, 2014, 10:00:59 AM
thanks for your design
can i make this board for 2 layer?
and witch file should i have to write in the pic?


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: S4VV4S on January 31, 2014, 03:06:25 PM
Has anyone built this?



Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Ostenbacken on January 31, 2014, 10:28:02 PM
Hi guys,

good news. It took me and my friends about a week to debug the 16-chip board but now it's nearly finished. To be brief: there were quite some bugs in the firmware. Also we've fixed some suboptimalities in the firmware operation. But now it's very reliable and predictable with bfgminer: you tell the board how fast should it operate the chips, and you get exactly that speed all the way between 500Mh/s per chip to 1700MH/s per chip. With the 16-chip board modifications to bfgminer were also necessary: at high speeds the board completes its work queue too quickly so that a significant amount of time was lost in idle.

With careful thermal design and at 1.025V power, we can run the 16-chip board at 27.2GH/s rated speed. bfgminer currently reports 26.3GH/s but it may change due to averaging.

I'm going to post the firmware updates shortly. A question: what is the optimal way of posting the firmware updates? I could send it to the author of the original project to be incorporated in the github repository. The bfgminer software also has to be modified for operation at maximum speed.

The Texas Instruments voltage converter is pretty overloaded at these speeds. Both inductors and FETs on it heat a lot despite forced air coolong. At least, small heatsinks must be mounted on them. Also I'd recommend making 10-chip boards or placing less than 16 chips on the 16-chip boards such as 12-14 in order not to overload the voltage converter.

http://s020.radikal.ru/i719/1401/62/b501996fcfa8.png


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: form on January 31, 2014, 10:54:13 PM
I'm going to post the firmware updates shortly. A question: what is the optimal way of posting the firmware updates? I could send it to the author of the original project to be incorporated in the github repository. The bfgminer software also has to be modified for operation at maximum speed.

Great work!
I can merge your code into the github-repo, or giving you direct access to it.
Can i just verify your work? Just send a PM with a link to an archive with your firmware and bfgminer-patch please.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: BigJRepairs on February 01, 2014, 04:44:32 AM
It turns out Jeffery wasn't bluffing, he just didn't explain it well. He paid a developer $2000 USD for what turned out to not be what he expected. I believe that is what he meant by great contributers and he has emailed me what he has stable at 21 GH/S.

I don't see a reason to fork seeing as he paid for this and Ostenbacken and Form have this under control. Tips incoming when I get these running. I'm also leaving my offer open to flash free minus shipping for anyone that can't do it prior to this fiasco.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Ostenbacken on February 01, 2014, 11:14:04 PM
Hi everybody,

here is the updated firmware:
firmware.rar (http://www7.zippyshare.com/v/47383598/file.html)

for the 10-chip board simply change the 'ChipCount' line to 10, we've checked it and it works.

Here is the updated Klondike driver for the bfgminer:

driver-klondike.rar (http://www75.zippyshare.com/v/49421870/file.html)

We are asking everybody who benefited from our firmware and driver troubleshooting, to support our incentive of sharing our achievements with the community by making a small BTC donation to:
19bWQt5ix6u7hgZyYUcADy72MLsuGzCRYn

The updated firmware supports speeds down to 500MHz. It is possible to implement support for lower frequencies as well by using nonzero values for the OD parameter. While making the updates we've hit some Microchip XC8 compiler bugs so that expression evaluations in the UpdateClock() resulted in wrong values. Updating the compiler to the latest version did not help. The workaround was to split big expression evaluations into smaller statements.

Here is the performance achieved with two 10-chip boards and one 16-chip board running at speed 1717 (rated 1.717GH/s per chip). Again, careful thermal design is mandatory to achieve this performance. Heatsinks are required on both sides of the PCB with high-performance rubber inserts between the heatsink and PCB/chips. You can look up overclockers' resources for tips in thermal design.
http://s020.radikal.ru/i710/1402/a6/818c5c336781.png


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: drinkmorecoffee on February 02, 2014, 05:48:14 AM
Hi everybody,

here is the updated firmware:
firmware.rar (http://www7.zippyshare.com/v/47383598/file.html)

for the 10-chip board simply change the 'ChipCount' line to 10, we've checked it and it works.

Here is the updated Klondike driver for the bfgminer:

driver-klondike.rar (http://www75.zippyshare.com/v/49421870/file.html)



Excellent work, guys!

One question: There has been a lot of back-and-forth on the firmware, but little discussion on the PCB itself.  Which PCB design file/s are you guys using for your boards?  I just don't want to risk building up an old PCB with current firmware.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: BigJRepairs on February 02, 2014, 06:57:31 AM
Ok, what I did:
- bought Pickit3, downloaded MPLAB X, installed it
- download latest firmware once from
     github.com/formtapez/avalon and from
     github.com/zipiju/k16-firmware
-connected Pickit3 to computer, drivers have been installed
- started Pickit3
- choosen as device: PIC16LF1459
- pressed connect
- warning window pops up to check wether the choose device is correct or not. => checked it chip on board
   is PIC16LF1459 => pressed ok
- warning window pops up: Target Device ID (0x0) does not match the expected Device ID (0x3027). Would
  you like to continue? => press ok => CONNECTION WILL BE ESTABLISHED
- choose downloaded .hex-file => press Program
- error message comes up: failed to program device

What am I doing wrong? For me it seems that I have the .hex-files? Is this correct?

Does hongkongapple1 gave is latest firmware to anyone of you? I asked him twice for the .hex-file for 25GHs and he gave me no response nor the files.

Can anybody help me a little bit?
 

My guess is you're using headers with ext cable. Take them off and plug debugger straight into board.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Ostenbacken on February 02, 2014, 10:19:13 AM
Which PCB design file/s are you guys using for your boards?  I just don't want to risk building up an old PCB with current firmware.
PCB changes were minor, so any PCB design version, if it works at all, should also work with the latest firmware (the one that I posted). I would NOT recommend building the 16-chip board for the reason of overloading the voltage converter. Or if you build it, mount 10-12 chips on it. With chips working in turbo mode, it's 2.5W per GH. At 1.6GH the power per chip is 4W which corresponds to 4A current draw per chip. So with 12 chips you'll get 48A which is just below the maximum rated load (50A) of the voltage converter module. This way your circuit should run safely. To have a little extra margin, 10 chips would be even better.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: DrZeck on February 02, 2014, 06:06:08 PM
Hi Folks,

did anyone tried I2C board chain ? Is it working ?

Cheers,


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: BigJRepairs on February 02, 2014, 07:53:54 PM
Hi everybody,

here is the updated firmware:
firmware.rar (http://www7.zippyshare.com/v/47383598/file.html)

for the 10-chip board simply change the 'ChipCount' line to 10, we've checked it and it works.

Here is the updated Klondike driver for the bfgminer:

driver-klondike.rar (http://www75.zippyshare.com/v/49421870/file.html)

The updated firmware supports speeds down to 500MHz. It is possible to implement support for lower frequencies as well by using nonzero values for the OD parameter. While making the updates we've hit some Microchip XC8 compiler bugs so that expression evaluations in the UpdateClock() resulted in wrong values. Updating the compiler to the latest version did not help. The workaround was to split big expression evaluations into smaller statements.

Here is the performance achieved with two 10-chip boards and one 16-chip board running at speed 1717 (rated 1.717GH/s per chip). Again, careful thermal design is mandatory to achieve this performance. Heatsinks are required on both sides of the PCB with high-performance rubber inserts between the heatsink and PCB/chips. You can look up overclockers' resources for tips in thermal design.

The firmware loaded fine but I can't get BFGminer to compile that driver. I think it's due to the .o file but I'm not sure how to fix that.

make -C lib
make[3]: Entering directory '/home/bfgminer/lib'
make  all-recursive
make[4]: Entering directory '/home/bfgminer/lib'
make[5]: Entering directory '/home/bfgminer/lib'
make[5]: Nothing to be done for 'all-am'.
make[5]: Leaving directory '/home/bfgminer/lib'
make[4]: Leaving directory '/home/bfgminer/lib'
make[3]: Leaving directory '/home/bfgminer/lib'
cd libblkmaker && make
make[3]: Entering directory '/home/bfgminer/libblkmaker'
make[3]: Nothing to be done for 'all'.
make[3]: Leaving directory '/home/bfgminer/libblkmaker'
  CCLD     bfgminer
bfgminer-driver-klondike.o: In function `klondike_init':
/home/bfgminer/driver-klondike.c:772: undefined reference to `opt_klondike_options'
collect2: error: ld returned 1 exit status
Makefile:922: recipe for target 'bfgminer' failed
make[2]: *** [bfgminer] Error 1
make[2]: Leaving directory '/home/bfgminer'
Makefile:1964: recipe for target 'all-recursive' failed
make[1]: *** [all-recursive] Error 1
make[1]: Leaving directory '/home/bfgminer'
Makefile:815: recipe for target 'all' failed


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: form on February 02, 2014, 08:32:53 PM
The firmware loaded fine but I can't get BFGminer to compile that driver. I think it's due to the .o file but I'm not sure how to fix that.

It seemed he used an older version of bfgminer.
You can use the normal version and just change 2 lines:

#define MAX_WORK_COUNT 8
#define LATE_UPDATE_MS ((int)(0.5 * 1000))

These changes did a good job for me. I never saw a duplicate/idle message anymore since that, even with the board-firmware from before. (Including a slightly higher hashrate)
His new firmware for the board didnt work so well for me, the old one is faster at even lower frequencies, but i still have to debug it a little further...


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Ostenbacken on February 02, 2014, 09:28:17 PM
His new firmware for the board didnt work so well for me, the old one is faster at even lower frequencies, but i still have to debug it a little further...
Can you post any details? The frequency formula in the original firmware was incorrect, so you had to pick frequencies without any clear understanding how frequency relates to the hashrate. With my firmware, speeds 1650-1717 yield maximum performance, while lower speeds (down to 500MHz) also work well and in a predictable fashion so that the actual hashrate matches with the speed you specify, i.e. speed 500 -> 500MH per chip and so on. Here's a screenshot:
http://s019.radikal.ru/i601/1402/ca/70cccdc0e4bc.png
Here's an example command line:
./bfgminer -o stratum+tcp://stratum.mining.eligius.st:3334 -u <username> -p <password> --klondike-options 1718:70
substitute your pool credentials, username and password where appropriate.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: BigJRepairs on February 03, 2014, 05:46:37 AM
Quote
#define MAX_WORK_COUNT 8
#define LATE_UPDATE_MS ((int)(0.5 * 1000))


I was able to compile bfgminer with this change but the git firmware is just giving a bunch of request work updates, I'm going to leave it running a while, unless you meant a different firmware?


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Ostenbacken on February 03, 2014, 07:01:48 PM
It seemed he used an older version of bfgminer.
You can use the normal version and just change 2 lines:

#define MAX_WORK_COUNT 8
#define LATE_UPDATE_MS ((int)(0.5 * 1000))
That's right. We didn't make any more changes in the driver. However, please note: we recently figured out that more optimal LATE_UPDATE_MS delays are:
#define LATE_UPDATE_MS ((int)(0.7 * 1000))
for 16-chip boards, and
#define LATE_UPDATE_MS ((int)(1.5 * 1000))
for 10-chip boards.

Also we checked the most recent bfgminer sources. The reduced value of the LATE_UPDATE_MS delay is not yet incorporated in it, so you have to do it yourself.

---

One more thing. We are asking everybody who benefited from our firmware and driver troubleshooting, to support our incentive of sharing our achievements with the community by making a small BTC donation to:
19bWQt5ix6u7hgZyYUcADy72MLsuGzCRYn


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: BigJRepairs on February 05, 2014, 04:36:37 PM
It turned out the request work updates were due to a short in the board. So 4/5 running not bad I guess. I am having a strange issue with the raspberry pi. It doesn't seem to like more than 2 of these connected at once. The cards aren't bad because I can interchange them. Anyone else run into this? Mabey, just too much for the little guy.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: BigJRepairs on February 05, 2014, 04:46:48 PM
Hi Folks,

did anyone tried I2C board chain ? Is it working ?

Cheers,

Im interested in giving this a shot. I hope no one saw my original comment it was seriously retarded. I can breadboard it out. The design below the ISP on the schematic is reference for the chain right?


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: DrZeck on February 05, 2014, 06:48:42 PM
Hi Folks,

did anyone tried I2C board chain ? Is it working ?

Cheers,

Im interested in giving this a shot. I hope no one saw my original comment it was seriously retarded. I can breadboard it out. The design below the ISP on the schematic is reference for the chain right?

Yes, that is for chaining boards, the pads are located here: https://www.dropbox.com/s/f486v7mr564iy7d/board-layer01-top-name.png

i have build different boards and leave a connector for that but i am still waiting boards to arrive so i dont have 2 to try, i have one for debugging only: https://www.dropbox.com/s/9ojltfykb4v6sdb/IMG_20140205_192247.jpg

it is strange that this is working at all with pic connected like that bit i did not have qfn pic at the time.

this is the board with very poor dc dc design  ;D : https://www.dropbox.com/s/uisskylqk1uu1z1/IMG_20140117_134651.jpg

and the new Board: https://www.dropbox.com/s/pzs0ex8tyo5gyqh/HashMaster%201.8.png

So, i will try everything when i get boards, i will post results here.

If you try i2c chain please post some news, you need to connect SDA , SCL and GND for that to work, in parallel. Do not connect 3.3v pin.

So:

TP6 - 3.3V - DO NOT CONNECT

TP7 - SCL - CONNECT TO TP7 ON NEXT BOARD

TP8 - SDA - CONNECT TO TP8 ON NEXT BOARD

TP9 - GND - THIS IS GROUND, if you running boards on same power supply they are already connected so you can connect just signal lines ( SCL and SDA )

Good Luck











Title: Re: Open Source Avalon Gen2 55nm Board
Post by: BigJRepairs on February 05, 2014, 09:12:21 PM
One last retarded question before I move to the chain. The fifth board is bothering me. What 2 points are you measuring to adjust voltage? TP1 to ground?


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: form on February 05, 2014, 09:30:12 PM
One last retarded question before I move to the chain. The fifth board is bothering me. What 2 points are you measuring to adjust voltage? TP1 to ground?

yes


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: DrZeck on February 05, 2014, 09:40:24 PM
One last retarded question before I move to the chain. The fifth board is bothering me. What 2 points are you measuring to adjust voltage? TP1 to ground?

Ok, form has answered on that question. one more thing, if you connect fan to the board cut the yellow wire, it will reset PIC16LF1459 all the time. everything else is ok on that side.

@form what we need to change in the code for tach to working ? i have removed it from hardware completely, but it can be used for some alarm when the fan stop working or something like that ... is it big change or minor ? Thanks,

Cheers,



Title: Re: Open Source Avalon Gen2 55nm Board
Post by: form on February 05, 2014, 10:06:44 PM
Ok, form has answered on that question. one more thing, if you connect fan to the board cut the yellow wire, it will reset PIC16LF1459 all the time. everything else is ok on that side.
@form what we need to change in the code for tach to working ? i have removed it from hardware completely, but it can be used for some alarm when the fan stop working or something like that ... is it big change or minor ? Thanks,

Thats an issue caused by non-standard fans, which actively outputs +12 volts on the tacho-output.
The board is designed for normal CPU-fans (i think it was specified by intel), which have a passive open-collector output on the tacho-pin, which alternatevly connects this pin to GND and leave it open again.

When a non-standard fan outputs +12 volts there, the PIC is entering high voltage programming mode, which is not intended to happen.

So actually no way to avoid it via software, just cut the wire - The software doesnt take care of the RPM anyway.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: BigJRepairs on February 05, 2014, 11:52:23 PM
Ok, form has answered on that question. one more thing, if you connect fan to the board cut the yellow wire, it will reset PIC16LF1459 all the time. everything else is ok on that side.
@form what we need to change in the code for tach to working ? i have removed it from hardware completely, but it can be used for some alarm when the fan stop working or something like that ... is it big change or minor ? Thanks,

Thats an issue caused by non-standard fans, which actively outputs +12 volts on the tacho-output.
The board is designed for normal CPU-fans (i think it was specified by intel), which have a passive open-collector output on the tacho-pin, which alternatevly connects this pin to GND and leave it open again.

When a non-standard fan outputs +12 volts there, the PIC is entering high voltage programming mode, which is not intended to happen.

So actually no way to avoid it via software, just cut the wire - The software doesnt take care of the RPM anyway.

I just hardwire the fans full speed. Am I reading the chipset datasheet wrong or would stock setting be 1V at 500-1000 MHZ?


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: DrZeck on February 06, 2014, 10:44:27 AM
Ok, form has answered on that question. one more thing, if you connect fan to the board cut the yellow wire, it will reset PIC16LF1459 all the time. everything else is ok on that side.
@form what we need to change in the code for tach to working ? i have removed it from hardware completely, but it can be used for some alarm when the fan stop working or something like that ... is it big change or minor ? Thanks,

Thats an issue caused by non-standard fans, which actively outputs +12 volts on the tacho-output.
The board is designed for normal CPU-fans (i think it was specified by intel), which have a passive open-collector output on the tacho-pin, which alternatevly connects this pin to GND and leave it open again.

When a non-standard fan outputs +12 volts there, the PIC is entering high voltage programming mode, which is not intended to happen.

So actually no way to avoid it via software, just cut the wire - The software doesnt take care of the RPM anyway.

I just hardwire the fans full speed. Am I reading the chipset datasheet wrong or would stock setting be 1V at 500-1000 MHZ?

0.9V is the default voltage but 1V is just fine i did try 1.2V and they still live, but there is no change with speed for now.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: BigJRepairs on February 07, 2014, 03:57:45 PM
I had seen Ost mention using 1.025V. I don't see much of any difference between .9 and 1.025. Wouldn't it make more sense to keep it around .9V?


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: DrZeck on February 07, 2014, 04:26:27 PM
I had seen Ost mention using 1.025V. I don't see much of any difference between .9 and 1.025. Wouldn't it make more sense to keep it around .9V?

at lower voltage it will draw more amps for same performance, so 1v is ideal if there is no difference in speed.

did you try to chain boards ?

Cheers,


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: form on February 07, 2014, 04:48:40 PM
at lower voltage it will draw more amps for same performance

I think you are wrong. There is no DC/DC converter "inside" the chips ;D


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: BigJRepairs on February 07, 2014, 05:49:51 PM
at lower voltage it will draw more amps for same performance

I think you are wrong. There is no DC/DC converter "inside" the chips ;D

I concur I'm lost as to what this would be set at ideally or if it even matters between .9 and 1. The best response I've found is around .940 1640:70 into BFG. What do you set your cards at form?

Also wondering if anyone has interest in my jacked up card? Whatever is wrong with it isn't obvious, it connects to BFG miner but won't do any work. I know it isn't the ASIC's because I have 4 others assembled in the same manner. Anyway, I'm tired of messing with it.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: BigJRepairs on February 07, 2014, 06:17:21 PM
Quote

did you try to chain boards ?


I didn't try hooking up two boards together like you were saying. (I'm not saying that wouldn't work, I'm not sure actually) It works using the schematic in a master slave effect. You need the pull-down resistors on SCL and SDA to create the logic 0 on the chain.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Ostenbacken on February 07, 2014, 06:26:26 PM
I had seen Ost mention using 1.025V. I don't see much of any difference between .9 and 1.025. Wouldn't it make more sense to keep it around .9V?
0.9V is the default. When you try to overclock the chips, hardware error rate increases. Raising the power supply voltage helps reducing the error rate somewhat. In the end, you're trying to get the maximum speed with an acceptable error rate, or the maximum effective speed of hashing as reported by your pool. Both raising the supply voltage and overclocking the chips will increase the total power consumption of the chips and reduce their power efficiency, i.e. GH per Watt. It also increases heating and puts more demands on your thermal design. You can measure power consumption by using an ampermeter on the 12V input power supply wire.

If you're optimizing power per GH, you should instead try to lower the chip supply voltage and speed, until you get the best GH/Watt ratio.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: BigJRepairs on February 07, 2014, 08:00:38 PM
I had seen Ost mention using 1.025V. I don't see much of any difference between .9 and 1.025. Wouldn't it make more sense to keep it around .9V?
0.9V is the default. When you try to overclock the chips, hardware error rate increases. Raising the power supply voltage helps reducing the error rate somewhat. In the end, you're trying to get the maximum speed with an acceptable error rate, or the maximum effective speed of hashing as reported by your pool. Both raising the supply voltage and overclocking the chips will increase the total power consumption of the chips and reduce their power efficiency, i.e. GH per Watt. It also increases heating and puts more demands on your thermal design. You can measure power consumption by using an ampermeter on the 12V input power supply wire.

If you're optimizing power per GH, you should instead try to lower the chip supply voltage and speed, until you get the best GH/Watt ratio.


It's DVDD adjustment right? Ideally the maximum hash rate you could get would be around 1.1V at 2A Iop, Frequency = ? Or .9V per chip still around 2A Iop if you are going for efficency, Frequency = ? When you came up with the 4A per chip were you measuring the operating current per chip or measuring the power consumption of the board? I also noticed you're chips running at 35C, how long have you been able to sustain that?


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: DrZeck on February 07, 2014, 10:07:54 PM
at lower voltage it will draw more amps for same performance

I think you are wrong. There is no DC/DC converter "inside" the chips ;D

Yeah, i was trying to say something else here  ::) and too bad avalon did not include some dc/dc reg inside the chips , i spend fortune just for dc/dc controllers  ;D

Any way IMHO chips are really power hungry, interested to see that they can "eat" 4+ amps with ease  ( @~1.5 - 1.7gh/s )  :D

About i2c i am newbie in that field, i start with mcu's codes and so on ...  when i start to work on first miner with bitfury chips, But i think that the i2c lines need to be in pull up, and as much as i know that worked with k16 klondike boards and not changed here at all.

how do you connect boards on raspberry ? hubs ?

@BigJRepairs why do you think you need pull down resistor on SCL/SDA lines ?

@Ostenbacken your code works ok with my boards, but i have 4 chips only at the moment on boards, there is very low error rate, about 1% - running for 8 hours approx @ 1V 1400mhz but i have some wierd situation when i build code and program chip with that .hex, i have higher error rates and simply it just not working like your compiled hex. need to see what is wrong there, i have installed mplabx 2.00 and xc8 1.30, but on 1.85 and xc8 1.20 everything was the same ... so its working but not good.  ???

I hope i will get boards at monday so i will try everything i can before assembling boards. Will post results here ...

Cheers,







Title: Re: Open Source Avalon Gen2 55nm Board
Post by: BigJRepairs on February 08, 2014, 12:57:00 AM
Is there a way I can get a live current measurement in parallel between sense+ or TP1 and sense- on the voltage regulator?

Quote

@BigJRepairs why do you think you need pull down resistor on SCL/SDA lines ?


I originally had pull-up then I edited it to pull down. I think it is pull up anyway, one device = bus driver. The rest of the devices = bus passengers or "slaves" even if it's one. The resistors keep the slaves clock and data line in time with the master. I think it's referred to as a wired logic connection. I'd guess it would work with the resistors on the board just between two the way you said. Why would you go through the trouble for just 2 boards though?



Title: Re: Open Source Avalon Gen2 55nm Board
Post by: DrZeck on February 08, 2014, 08:18:19 AM
Is there a way I can get a live current measurement in parallel between sense+ or TP1 and sense- on the voltage regulator?

Quote

@BigJRepairs why do you think you need pull down resistor on SCL/SDA lines ?


I originally had pull-up then I edited it to pull down. I think it is pull up anyway, one device = bus driver. The rest of the devices = bus passengers or "slaves" even if it's one. The resistors keep the slaves clock and data line in time with the master. I think it's referred to as a wired logic connection. I'd guess it would work with the resistors on the board just between two the way you said. Why would you go through the trouble for just 2 boards though?



i am building a bit more boards ( 150 ) so i need that feature if its working, if not well ... hubs ...  ;D


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Ostenbacken on February 08, 2014, 10:36:17 AM
It's DVDD adjustment right? Ideally the maximum hash rate you could get would be around 1.1V at 2A Iop, Frequency = ?
Yes, it's DVDD adjustment. The max hash rate with my firmware is achieved at speed=1650 to speed=1750-1800 which may not be the same as the chip's operating frequency but it yields precisely that hashrate (i.e. 16.5GH/s for speed=1650, etc). The DVDD voltage we're using at these speeds is always below 1.06V. When measuring the voltage, be sure to attach both of your voltmeter's probes to decoupling capacitors near the chips. Otherwise measurement results may be distorted due to voltage drops across wires as high currents are flowing through them.

You should start with lower speed values like 1000, slowly raising them up while improving your thermal design and VDD setting. Once you have established a reliable operation at a lower speed, you can go higher.
were you measuring the operating current per chip or measuring the power consumption of the board?
I was measuring power consumption of the board and then recalculating values into DVDD current given a rated voltage converter efficiency and budgeting some 3W for 3.3V supply current. It's hard to measure DVDD current directly because the current is high and because it's hard to break DVDD circuit at one location in order to insert an ampermeter there.
I also noticed you're chips running at 35C, how long have you been able to sustain that?
Indefinitely. Our thermal design is very capable, involving heatsinks on both sides of the PCB. The thermistor was physically attached to one of the per-chip top side heatsinks and protected from forced air cooling by a layer of glue and a piece of plastic, so as not to distort measurement results due to sensor cooling. The top side heatsinks were also not very hot on touch. However, these results may still be inaccurate because of the very nature of measuring temperature with thermistors. I'm going to try the more accurate chip thermal sensors, namely MCP9700A. Also there are no means of measuring the chips' junction temperature. With heatsinks occupying all the space around the chips, you could only mount a thermal sensor on the heatsink, and then your results will depend on quality of thermal coupling between the chip and the heatsink. So even with better sensors, any temperature measurement of this kind should be considered only approximate.
http://i031.radikal.ru/1402/10/87bad2fb9ab8t.jpg (http://radikal.ru/fp/5ce34fafd78842e1b911c40f04b1c690)


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Ostenbacken on February 08, 2014, 10:50:36 AM
@Ostenbacken your code works ok with my boards, but i have 4 chips only at the moment on boards, there is very low error rate, about 1% - running for 8 hours approx @ 1V 1400mhz but i have some wierd situation when i build code and program chip with that .hex, i have higher error rates and simply it just not working like your compiled hex. need to see what is wrong there,
Can you tell more details? What kind of errors are you getting (HW error rate or smth else)? Did you try lower speeds? Do you get the exact speed per chip according to the software setting? When you built the code, did you change ChipCount to 4 in the file "klondike.c", line 127? Also, to what locations of the board did you solder your 4 chips? There are two chains on the board up to 8 chips each. If you mount a smaller number of chips, you must distribute them evenly across chains, or the firmware will treat them incorrectly. Also the total number of chips must be even so that both chains contain the same number of chips.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: DrZeck on February 08, 2014, 11:31:38 AM
@Ostenbacken your code works ok with my boards, but i have 4 chips only at the moment on boards, there is very low error rate, about 1% - running for 8 hours approx @ 1V 1400mhz but i have some wierd situation when i build code and program chip with that .hex, i have higher error rates and simply it just not working like your compiled hex. need to see what is wrong there,
Can you tell more details? What kind of errors are you getting (HW error rate or smth else)? Did you try lower speeds? Do you get the exact speed per chip according to the software setting? When you built the code, did you change ChipCount to 4 in the file "klondike.c", line 127? Also, to what locations of the board did you solder your 4 chips? There are two chains on the board up to 8 chips each. If you mount a smaller number of chips, you must distribute them evenly across chains, or the firmware will treat them incorrectly. Also the total number of chips must be even so that both chains contain the same number of chips.

Hi,

the chips are soldered 2 in the first bank and 2 in second bank, yes i did change chip count to 4 and there is no much difference with that, i have some time now so i will try few things.

Ohh i forget to mention LED is always on. do you have same situation ?


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Ostenbacken on February 08, 2014, 11:50:39 AM
the chips are soldered 2 in the first bank and 2 in second bank, yes i did change chip count to 4 and there is no much difference with that, i have some time now so i will try few things.
Please try everything I've suggested and post your results.
Ohh i forget to mention LED is always on. do you have same situation ?
I've reprogrammed the LED to be on when the board is doing work and to be off when the board is idle. This was handy during debugging of idle conditions encountered when all 16 chips are mounted. Also it's more informative. Some people like when a LED is flashing fast but in case of our board, that flashing doesn't really give you much useful information about the board condition. The primary purpose of LEDs is to display some information that can aid in diagnostics. I think that the "busy/idle" display is a good application for that LED.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: DrZeck on February 08, 2014, 02:23:20 PM
Ok, i dont know what was the problem with building/programing firmware last time but now works fine, i have same results with both hex, but when i change chip to 4 i have a lot of work ignored messages, i did try to change delay in the klondike driver to 0.5,0.7,1.0,1.5,2.0,2.5 the best results are on 0.5-0.7 as you said before, but i did not test board for a long time. i have real hashrate with 4 chips and after some time hashing hash rate drops a bit but not because of firmware problem but temperature problem ( very bad heatsink ATM on boards )

I will post complete test results next week when i completely populate one board with 10 / 16 chips and adequate heatsink/fans.

@Ostenbacken Can u please upload compiled hex for 10 chips too, just to have it when i start to test boards.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: BigJRepairs on February 09, 2014, 07:01:31 PM
Quote
The max hash rate with my firmware is achieved at speed=1650 to speed=1750-1800 which may not be the same as the chip's operating frequency but it yields precisely that hashrate

I've been using your firmware and found personally this isn't true at all. I'm still around 1280 .94V, my two boards running on Debian run around 10 GH/s. The other 2 on raspberry pi, Archlinux run at 17 GH/s. The bfgbuild, drivers and firmware are identical. I've confirmed these speeds on both multipool and givemecoins.

Can someone confirm that shorter and higher quality USB cables yield higher speeds? I'm not entirely sure yet but this may be the most cost effective upgrade you can make. I also appreciate the change to the LED.

Quote
It's hard to measure DVDD current directly because the current is high and because it's hard to break DVDD circuit at one location in order to insert an ampermeter there.

I agree, I'm considering moving the regulator to a breadboard in an attempt to get a more accurate measurement of the output current unless someone has a better idea. An easier method might be increasing the resistance at Pin 11 (sense +) through TP1 on the regulator and measuring the change in voltage to get a better idea of the output current. Things like that work in my head, but don't always pan out in the real world. Have you had any regulators fail yet?
 
Quote
Our thermal design is very capable, involving heatsinks on both sides of the PCB. The thermistor was physically attached to one of the per-chip top side heatsinks and protected from forced air cooling by a layer of glue and a piece of plastic, so as not to distort measurement results due to sensor cooling. The top side heatsinks were also not very hot on touch. However, these results may still be inaccurate because of the very nature of measuring temperature with thermistors. I'm going to try the more accurate chip thermal sensors, namely MCP9700A. Also there are no means of measuring the chips' junction temperature. With heatsinks occupying all the space around the chips, you could only mount a thermal sensor on the heatsink, and then your results will depend on quality of thermal coupling between the chip and the heatsink. So even with better sensors, any temperature measurement of this kind should be considered only approximate.

I favor the method of holding my hand slightly above the heatsinks, I've suspected via IR gun that the reported 25C is closer to 30 on my boards. I might be able to borrow a slim PRT that could take this measurement pretty accurately. Like you said all temperature measurements utilizing resistance in this method are approximate. Utilizing a 4-wire resistance and an ice point reference is probably the cheapest. I cut up a 10 ft hunk of aluminum C-Channel from the Home Depot and thermal pasted it :)


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Ostenbacken on February 09, 2014, 11:02:41 PM
I've been using your firmware and found personally this isn't true at all.
Any details? How many chips do you have on your board? Have you recompiled the firmware with the proper number of chips? What speed are you setting in bfgminer? Have you tried lower speeds so as to exclude the effect of heating? Say, try speed=1000 and tell me if you're getting 1GH/s per chip. Are you getting any error/warning messages from bfgminer? If yes, what messages specifically? That could aid in diagnostics.

Also, have you tried to see per-chip performance? There are some APIs/command line tools that let you see how many nonces did each chip produce. Chances are that you have failed or improperly soldered chips on your board(s).

We now have multiple users using our firmware with proper results, so please be sure to verify that you did everything right.
Can someone confirm that shorter and higher quality USB cables yield higher speeds?
I would consider this highly unlikely. It's like spending a fortune on your HDMI or S/PDIF cables: that won't improve your digital audio quality unless your existing cable setup was completely screwed up.
An easier method might be increasing the resistance at Pin 11 (sense +) through TP1 on the regulator
That also seems to me a bad idea. The sense pins are inputs and they normally draw little to no current, so increasing the resistance will not produce any meaningful voltage drop that is proportional to output current.
Have you had any regulators fail yet?
Not yet.
I favor the method of holding my hand slightly above the heatsinks,
With hand or with a sensor, no matter how good is it, there is a fundamental problem of access to junction temperature. You can't measure temperature directly on the chip die, and that's the only one that matters. Temperature on the heatsink may be substantially lower than that on the junction if thermal coupling is poor between the chip and the heatsink. In this case the heatsink will stay cool but the chip will remain hot. Just imagine a heatsink that is not in physical contact with your chip. The same thing happens when it is in physical contact but for some reason thermal coupling isn't very good. Temperature difference also increases when the amount of dissipated power increases, so your estimation of junction temperature will be increasingly less accurate as the amount of power dissipated by chips gets higher. You could of course do all the math if you have thermal models of your system and you correctly estimate their parameters but well that's a very demanding job to do it right.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: BigJRepairs on February 10, 2014, 05:41:09 AM
They're all 16 chip boards. I misunderstood your logic as entering the frequency yielded a specific hashrate. Yes, the frequency seems to correspond with the number of chips on board. When I switch the boards out they yield the same hashrates so something is going on with the power supply or operating system I'm not sure which yet. My step up transformer that runs my 220V BGA station went down so I had the chips placed professionally at Mastek Innerstep, which by the way if anyone wants professional chip placement I already paid for the stencil I think they want $25 a board for 16 chips but the stencil would work for less chips obviously. PM me for contact info.

I don't have a lot of USB cables so I wan't sure if one was messed up or not. I'm just shooting darts for the difference between my two sets of boards. I figured mabey high data transfer coupled with lead resistance. It doesn't matter, like you said I used a 6 foot PS3 controller cable and nothing changed.

If someone blows up a regulator please post details :) In the mean time I'll keep stepping up a 16 chip board to blow one up on purpose and report back. My better thought is to lift the inductor used for the overcurrent protection and take AC and DC measurements there.

Quote
With hand or with a sensor, no matter how good is it, there is a fundamental problem of access to junction temperature. You can't measure temperature directly on the chip die, and that's the only one that matters. Temperature on the heatsink may be substantially lower than that on the junction if thermal coupling is poor between the chip and the heatsink. In this case the heatsink will stay cool but the chip will remain hot. Just imagine a heatsink that is not in physical contact with your chip. The same thing happens when it is in physical contact but for some reason thermal coupling isn't very good. Temperature difference also increases when the amount of dissipated power increases, so your estimation of junction temperature will be increasingly less accurate as the amount of power dissipated by chips gets higher. You could of course do all the math if you have thermal models of your system and you correctly estimate their parameters but well that's a very demanding job to do it right.

I've taken these measurements for several companies, you can't do anything about the inside of the chips to the best of my knowledge but most models suggest platinum with 4 wire yields at least +/- .1 C I think. You take a thin strand of platinum that's zero to at least an ice point reference and a span of 100. Then you thermal paste the platinum in between the heatsink and the chip, any exposed platinum must be insulated. Or you can buy a thin film prt also platinum that's already charted and hook it up to an Agilent meter and something like Benchlink.

You build a model of the metal instead of the system so you can reuse it. Really you can just weld (not solder) the tips of any RTD together as long as you have an idea of the composition, and do the same thing as long as you can generate ice point and 100C. It's probably only worth it if you're going to build a lot of boards. I have one set up to control the heat for an infrared reball station in my shed as well, it's pretty accurate. I favor my hand because it's easier. I was just curious how many days you've had them running at 35. 



Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Ostenbacken on February 10, 2014, 10:30:36 AM
Yes, the frequency seems to correspond with the number of chips on board.
Ok, so is it correct that you're getting the correct per-chip hashrate with my firmware?
You build a model of the metal instead of the system
I guess you misunderstood me. You're talking about building a precision thermal sensor whereas what I had in mind is to estimate junction temperature based on indirect off-junction temperature measurements. For instance, you can measure temperature drop at two points in a heat conductor. If thermal conductivity is known, this will give you an estimate on the amount of heat that passes through it. You can then extrapolate the temperature drop into the junction, if thermal conductivity between junction and your measurement points is known. Perhaps with additional measurements and calibration, you can do it pretty accurately, if you dare to perform everything that is needed. A MS degree in physics is recommended :)

But I don't think that it's really necessary. In my case, the chips work well (1.725GH/s per chip) and this can justify that they don't overheat. I do get the heatsink temperature reading that can be used to judge if the fan has failed or smth, so that the software could stop chip operation to prevent damage.
I was just curious how many days you've had them running at 35. 
That's a sustained temperature reading. They work non-stop for several days in this mode.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: BigJRepairs on February 10, 2014, 04:59:24 PM
Yes, frequency of 1000 gets 16GH/s on a 16 chip board. I'm suggesting that measuring the junction between the heatsink and the chip is easier and reusable for reference measurement. I wasn't sure if you were talking about using the MCP9700A to take that measurement for reference or building it into your design.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Ostenbacken on February 10, 2014, 06:13:55 PM
Yes, frequency of 1000 gets 16GH/s on a 16 chip board.
That's perfect. It seems that you did it right. Now what's left is to optimize your heatsinks, and you could go up to 1.6 - 1.7GH/s per chip.
I wasn't sure if you were talking about using the MCP9700A to take that measurement for reference or building it into your design.
These chips are inexpensive so I was thinking about building them into my design to replace the thermistor. Though the sensors are accurate, given the above considerations, their measurement would be only good for the purposes of thermal shutdown and some rough monitoring of the module condition. Perhaps the performance of forced air cooling system could be also evaluated based on this sensor data. I'm going to integrate several boards into a rackmount case, and there I'd need to take care of aerodynamics, fan locations, etc.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Lucko on February 13, 2014, 08:17:32 PM
Do anyone has windows miner solution? I can't figure it out how to run this on windows...


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: DrZeck on February 18, 2014, 12:46:24 AM
Do anyone has windows miner solution? I can't figure it out how to run this on windows...

I did trying, but with no luck, i cant install winusb driver with zadig, i can install libusb driver and cgminer see "something"  :D  but thats all. i will try it again i just dont have time now ...

On the other hand my boards are here working great with Ostenbacken's firmware, i can pull out even 1.8g from chips but i did try that with 3 chips in both banks, i really did not mesaure power draw and coller needs to be well BIG so, i leave the boards with 10 chips on ~ 14gh and that is working great.

some pics:

https://i.imgur.com/sh6Mpkg.jpg

https://i.imgur.com/15bOI9d.jpg

And Hubs:  ;D

https://i.imgur.com/6W7FDVB.jpg

And that is running on guild ...

https://i.imgur.com/HqvlOK1.png

Another question, can someone make i2c connection to work ? i am newbie for software so that is HUGE task for me, You can send offers here or PM

Cheers,


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: sylvius on March 12, 2014, 06:52:25 AM
excuse my English.

Firstly I thank Form for maintenance are sharing open source.
I downloaded the document map on git.
My question is, what software do you use to see patterns, I did not find this information in the readme.
my system is Linux.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: IoIooIIoIo on March 16, 2014, 10:35:23 AM
Im keen on giving this build a go but would like someone to contact me with supporting help :)
K16 were fun to build but this looks alittle more techy ;)


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: afchafch on May 01, 2014, 10:45:02 AM
Who want to buy last 8 PCBs?
http://www.ebay.com/itm/251514968840?ssPageName=STRK:MESELX:IT&_trksid=p3984.m1555.l2649
http://www.ebay.com/itm/251506931170?ssPageName=STRK:MESELX:IT&_trksid=p3984.m1555.l2649
Price was reduced.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: Somekindabitcoin on May 13, 2014, 07:32:21 AM
I will buy a bulk amount of those PCB's. Tell me price per thousand and where you're shipping from. I'm in hawaii. Direct me to an assembly service as well. I want to place them in my immersion tank. Thanks.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: afchafch on May 19, 2014, 09:50:51 AM
Somekindabitcoin, I answer you in PM.


Title: Re: Open Source Avalon Gen2 55nm Board
Post by: cubissimo on July 01, 2014, 09:40:06 PM
afchafch, I will buy a bulk amount of those PCB's too. please tell me the shipment and the cost by 1000. I'll need an assembly service too. I

Thanks!