Bitcoin Forum

Bitcoin => Hardware => Topic started by: kev7112001 on February 07, 2013, 01:08:00 AM



Title: Avalon Asic Design Discussion
Post by: kev7112001 on February 07, 2013, 01:08:00 AM
This bothers me, Avalon chose to put the heatsinks on the back of the board instead of directly on the chips themselves also there should channel guides for the airflow to make sure the air flows through the fins efficiently, this was one of the problems the xbox360 had with its GPU they used a channel guide but it wasn't covering the top of the GPU heatsink because they had the DVD-ROM drive siting on top which didn't push enough air through the fins.I have fixed many xbox360's with simple cardboard cuts to make the heatsinks work like they should with proper airflow and not one has ever overheated again or even run the fan on high when doing long periods of gaming. just my 2 cents but i believe they will have heating issue in the future.


Title: Re: Avalon Asic Design Discussion
Post by: DeathAndTaxes on February 07, 2013, 01:14:01 AM
Energy density matters.  Xbox360 GPU consumed about 100W from a square area the size of your smallest fingernail.  Each of the 80 SHA256 processors consumes about 2W and combined they are spread out over the surface area of a small book.  Comparing the cooling requirements isn't exactly apples to apples.


Title: Re: Avalon Asic Design Discussion
Post by: kev7112001 on February 07, 2013, 01:16:07 AM
Well they have already said the fans run loud and several restarts happen randomly


Title: Re: Avalon Asic Design Discussion
Post by: kev7112001 on February 07, 2013, 01:18:01 AM
and they all share the same heastink. so the on close to the fan is cooler than the last. i say the last chips are way hotter than the first


Title: Re: Avalon Asic Design Discussion
Post by: kev7112001 on February 07, 2013, 01:24:48 AM
which when you have a board with different temps and the heating and cooling expansion and contraction is going to result in problems.


Title: Re: Avalon Asic Design Discussion
Post by: Littleshop on February 07, 2013, 02:14:12 AM
Energy density matters.  Xbox360 GPU consumed about 100W from a square area the size of your smallest fingernail.  Each of the 80 SHA256 processors consumes about 2W and combined they are spread out over the surface area of a small book.  Comparing the cooling requirements isn't exactly apples to apples.
2W per chip is not too bad if the board is connected well heat wise to the heatsink and the heat can make it from the chip, through the board and into that heatsink.   The fans look powerful enough to do the job.

As Kev says, the only issue I see is the differential with some of the chips getting hotter then others. If there is room, little heatsinks on the hotter rows of chips could help.


Title: Re: Avalon Asic Design Discussion
Post by: ngzhang on February 07, 2013, 02:45:45 AM
No over heating issues observed. Fans always running @ 1600~2200rpm. Chip temperature is about 50~60 C.

Fans will increase speed when temp goes up, 3600rpm max.

We design and produced some heatsink installed at front , but we found its unnecessary during the test.


Title: Re: Avalon Asic Design Discussion
Post by: PuertoLibre on February 07, 2013, 02:47:29 AM
No over heating issues observed. Fans always running @ 1600~2200rpm. Chip temperature is about 50~60 C.

Fans will increase speed when temp goes up, 3600rpm max.

We design and produced some heatsink installed at front , but we found its unnecessary during the test.
Are the Avalon designed to overclock or are they fixed to a certain preset GH/s?


Title: Re: Avalon Asic Design Discussion
Post by: Aseras on February 07, 2013, 03:02:48 AM
They are Qfn chips. The bottom is where the heats sink goes. The top,is plastic and has very poor thermal conduction.

http://www.google.com/images?q=qfn+package


Title: Re: Avalon Asic Design Discussion
Post by: kev7112001 on February 07, 2013, 03:22:44 AM
Disadvantages

The small size of the exposed contacts, and the large area of exposed thermal pad makes it easy for small parts, such as 3x3 mm DFN packages, to float on the pool of molten solder under the thermal pad during assembly. This causes the parts to make no contact to the printed circuit board pads in some instances. Due to the excellent thermal characteristics of this mounting package, it is very hard to rework the device, as hot air reflow typically does not offer enough heat to the thermal pad without damage to surrounding board material or parts. Oxidation of the exposed chip contact pads after being exposed to a reflow oven during initial assembly makes solder wetting to them during rework quite difficult. Additionally there is no clearance for a soldering pencil to reflow pads under the chip if touch up is desired. Sometimes contact can be made up the sides of the DFN package contact pads, but this does not work well in practice.


Title: Re: Avalon Asic Design Discussion
Post by: PuertoLibre on February 07, 2013, 03:55:51 AM
Disadvantages

The small size of the exposed contacts, and the large area of exposed thermal pad makes it easy for small parts, such as 3x3 mm DFN packages, to float on the pool of molten solder under the thermal pad during assembly. This causes the parts to make no contact to the printed circuit board pads in some instances. Due to the excellent thermal characteristics of this mounting package, it is very hard to rework the device, as hot air reflow typically does not offer enough heat to the thermal pad without damage to surrounding board material or parts. Oxidation of the exposed chip contact pads after being exposed to a reflow oven during initial assembly makes solder wetting to them during rework quite difficult. Additionally there is no clearance for a soldering pencil to reflow pads under the chip if touch up is desired. Sometimes contact can be made up the sides of the DFN package contact pads, but this does not work well in practice.
Despite these limitation both BFL and bASIC had been utilizing QFN designs in their ASIC engineering attempts. Only one has switched to FCBGA due to high heat and the need to overclock their ASICs chips.


Title: Re: Avalon Asic Design Discussion
Post by: kev7112001 on February 07, 2013, 04:06:00 AM
Disadvantages

The small size of the exposed contacts, and the large area of exposed thermal pad makes it easy for small parts, such as 3x3 mm DFN packages, to float on the pool of molten solder under the thermal pad during assembly. This causes the parts to make no contact to the printed circuit board pads in some instances. Due to the excellent thermal characteristics of this mounting package, it is very hard to rework the device, as hot air reflow typically does not offer enough heat to the thermal pad without damage to surrounding board material or parts. Oxidation of the exposed chip contact pads after being exposed to a reflow oven during initial assembly makes solder wetting to them during rework quite difficult. Additionally there is no clearance for a soldering pencil to reflow pads under the chip if touch up is desired. Sometimes contact can be made up the sides of the DFN package contact pads, but this does not work well in practice.
Despite these limitation both BFL and bASIC had been utilizing QFN designs in their ASIC engineering attempts. Only one has switched to FCBGA due to high heat and the need to overclock their ASICs chips.

these kind of machines need to be built to run 24/7 there no refund so if it breaks your screwed and I doubt they test every unit to make sure everything is quality and working as it should. with so many parts the chances of a defect are greater.


Title: Re: Avalon Asic Design Discussion
Post by: kev7112001 on February 07, 2013, 04:14:26 AM
What I would at least like to see in the next batches are better use of forcing air in the fins of the heatsinks especially when adding more modules.I bet it would decrease temps by 5 to 10 degrees which would allow better overclocking.It should also be a more push pull fan design since the module heatsink is so long.


Title: Re: Avalon Asic Design Discussion
Post by: Inaba on February 07, 2013, 04:27:10 AM
We found the vias to be inadequate to cool the QFN package during Bitcoin mining.  Under normal operations (e.g. anything not Bitcoin mining, with a toggle rate < 20%, so basically every other application on the planet) vias are more than adequate to dissipate the heat.  With bitcoin mining, the heat generation is much higher and sustained, so the heat starts spreading out into the ground and thermal planes, degrading (and possibly destroying) surrounding components after a long enough time scale.  Granted, our heat density is vastly greater than Avalon's density, so this is probably not nearly the issue it is with BFL's chips, so the cooling with via's are probably the right choice in this application.  

In short, the cooling method on the back side of the board is normal and expected with this type of design.  Adding a HSF to the top of the chip would solve any potential remaining issues if they exist(ed) I would imagine.



Title: Re: Avalon Asic Design Discussion
Post by: kev7112001 on February 07, 2013, 04:29:09 AM
Also what happens when some of the chips fail will it continue running with the rest?


Title: Re: Avalon Asic Design Discussion
Post by: PuertoLibre on February 07, 2013, 05:30:34 AM
What I would at least like to see in the next batches are better use of forcing air in the fins of the heatsinks especially when adding more modules.I bet it would decrease temps by 5 to 10 degrees which would allow better overclocking.It should also be a more push pull fan design since the module heatsink is so long.
I actually agree,

They should have probably have gone with a large 280mm+ fan assembly. (IMO only)

Edit: Push/pull would have been better than what they did. I have to agree. I wonder how it will fare in summer to be honest. Jeffs machine is having issues. Some say it is heat related and other say it isn't.

I wish the guy with the thermal imager (Aseras I think it was) would get his machine soon.


Title: Re: Avalon Asic Design Discussion
Post by: mrb on February 07, 2013, 05:57:41 AM
A 280mm fan would have made the 4U (178mm) chassis way taller. Not good.


Title: Re: Avalon Asic Design Discussion
Post by: kev7112001 on February 07, 2013, 06:01:38 AM
Has anyone seen this http://techcrunch.com/2012/06/26/this-fanless-heatsink-is-the-next-generation-in-cpu-cooling/

http://tctechcrunch2011.files.wordpress.com/2012/06/sandia-heatsink-impeller-cooler-cutaway.jpeg?w=300

http://www.youtube.com/watch?feature=player_embedded&v=JWQZNXEKkaU


Title: Re: Avalon Asic Design Discussion
Post by: PuertoLibre on February 07, 2013, 06:12:16 AM
A 280mm fan would have made the 4U (178mm) chassis way taller. Not good.
Wrong direction. Like a computer case intake on the side.

http://www.newegg.com/Product/Product.aspx?Item=N82E16835705056


Title: Re: Avalon Asic Design Discussion
Post by: hardcore-fs on February 07, 2013, 06:17:19 AM
We found the vias to be inadequate to cool the QFN package during Bitcoin mining.  Under normal operations (e.g. anything not Bitcoin mining, with a toggle rate < 20%, so basically every other application on the planet) vias are more than adequate to dissipate the heat.  With bitcoin mining, the heat generation is much higher and sustained, so the heat starts spreading out into the ground and thermal planes, degrading (and possibly destroying) surrounding components after a long enough time scale.  Granted, our heat density is vastly greater than Avalon's density, so this is probably not nearly the issue it is with BFL's chips, so the cooling with via's are probably the right choice in this application.  

In short, the cooling method on the back side of the board is normal and expected with this type of design.  Adding a HSF to the top of the chip would solve any potential remaining issues if they exist(ed) I would imagine.



It is extremely POOR PCB design practice to attempt to use VIAS for cooling, one only has to take a look DOWN the via to see why......

Plus I fail to see how something only a few micons thick could be expected to 'cool'  a large thermal load, thankfully BFL saw through this particular alchemists fantacy.


Title: Re: Avalon Asic Design Discussion
Post by: crazyates on February 07, 2013, 06:18:06 AM
Has anyone seen this http://techcrunch.com/2012/06/26/this-fanless-heatsink-is-the-next-generation-in-cpu-cooling/

http://tctechcrunch2011.files.wordpress.com/2012/06/sandia-heatsink-impeller-cooler-cutaway.jpeg?w=300

http://www.youtube.com/watch?feature=player_embedded&v=JWQZNXEKkaU
Those are still experimental, and would not be good for something with 80 chips @ 2W each.

On the other hand, have you guys looked into Water Cooling (http://www.youtube.com/watch?v=VUbpb23yTK8)?


Title: Re: Avalon Asic Design Discussion
Post by: cedivad on February 07, 2013, 06:43:07 AM
You guys should investigate more on how server heat dissipation works. There is a reason if they are done that way. Avalon design is correct.


Title: Re: Avalon Asic Design Discussion
Post by: PuertoLibre on February 07, 2013, 07:42:51 AM
You guys should investigate more on how server heat dissipation works. There is a reason if they are done that way. Avalon design is correct.
Servers use fans with high static pressure. (I don't recall the correct term)

The current way seems to be more in line with a normal ventilation technique.

------------------------

I'll deposit a question:

Why did it matter what Jeffs Garziks environmental conditions were like if these units are (supposedly) rated up to 105F operation? (Has this changed?)

I assume Jeff wasn't roasting himself in his home. I myself am a fan of Avalon but keep in mind that does not mean I will overlook some glitches. Was Jeffs errors about software and not temperature?

I think Ngzhang seems to think it was just a bug. I would love some confirmation that this is indeed the case.

Edit: I live in an environment where temperatures reach 105F to 110F pretty regularly. I plan to move the device even further south where it will probably be just as equally hot.

BFL devices were last rated only for 95F operation.


Title: Re: Avalon Asic Design Discussion
Post by: mrb on February 07, 2013, 07:59:45 AM
A 280mm fan would have made the 4U (178mm) chassis way taller. Not good.
Wrong direction. Like a computer case intake on the side.

http://www.newegg.com/Product/Product.aspx?Item=N82E16835705056

This would not be proper airflow in a rack (and Avalon is designed to be racked).


Title: Re: Avalon Asic Design Discussion
Post by: cedivad on February 07, 2013, 08:19:30 AM
I've seen many racked servers working even without the jet-like fans. However, these fans are not slow and they draw a lot correct? I bet that they do their job correctly.


Title: Re: Avalon Asic Design Discussion
Post by: PuertoLibre on February 07, 2013, 08:29:22 AM
A 280mm fan would have made the 4U (178mm) chassis way taller. Not good.
Wrong direction. Like a computer case intake on the side.

http://www.newegg.com/Product/Product.aspx?Item=N82E16835705056

This would not be proper airflow in a rack (and Avalon is designed to be racked).

Strange, I have seen Server racks online with those kinds of configurations. (mostly 120mm fans)


Title: Re: Avalon Asic Design Discussion
Post by: mrb on February 07, 2013, 09:25:18 AM
Rackable server chassis pull air from the front, and push it to the back. Any opening on top or bottom of the chassis must assume it is obstructed by the chassis below or above.


Title: Re: Avalon Asic Design Discussion
Post by: Photon939 on February 07, 2013, 12:43:53 PM
I've been asked to make a water cooling block for these, not sure how it will work out with the via's but it should give much more even cooling. With the way the boards are laid out it should also be fairly straightforward to cool both sides of the chips. Waiting on dimensions atm, should have it together fairly soon.

It will be interesting to see what kind of a price point you come up with since the chip arrays in the Avalon are so large, making it from copper would be very expensive and aluminum causes corrosion problems in water cooling loops.


Title: Re: Avalon Asic Design Discussion
Post by: Aseras on February 07, 2013, 02:47:02 PM
What I would at least like to see in the next batches are better use of forcing air in the fins of the heatsinks especially when adding more modules.I bet it would decrease temps by 5 to 10 degrees which would allow better overclocking.It should also be a more push pull fan design since the module heatsink is so long.
I actually agree,

They should have probably have gone with a large 280mm+ fan assembly. (IMO only)

Edit: Push/pull would have been better than what they did. I have to agree. I wonder how it will fare in summer to be honest. Jeffs machine is having issues. Some say it is heat related and other say it isn't.

I wish the guy with the thermal imager (Aseras I think it was) would get his machine soon.

Yep, that's me, and I am waiting. I can't wait to get mine and tear it open and look around. I can't help it, that's the scientist in me. ( I work for a very large university )


Title: Re: Avalon Asic Design Discussion
Post by: Aseras on February 07, 2013, 02:52:41 PM
I've been asked to make a water cooling block for these, not sure how it will work out with the via's but it should give much more even cooling. With the way the boards are laid out it should also be fairly straightforward to cool both sides of the chips. Waiting on dimensions atm, should have it together fairly soon.

It would be interesting to know if the blank space behind the chip has traces or if it could be drilled out. If you could make direct contact with the pad underneath you could cool them far better.


Title: Re: Avalon Asic Design Discussion
Post by: Aseras on February 07, 2013, 03:03:26 PM
A 280mm fan would have made the 4U (178mm) chassis way taller. Not good.
Wrong direction. Like a computer case intake on the side.

http://www.newegg.com/Product/Product.aspx?Item=N82E16835705056

This would not be proper airflow in a rack (and Avalon is designed to be racked).

Strange, I have seen Server racks online with those kinds of configurations. (mostly 120mm fans)

These fans you guys are looking at are crap. Server, rackmounts fans are substantial and HUGE. 120mm, but 2-3 inches thick with crazy high power motors.


Title: Re: Avalon Asic Design Discussion
Post by: MrTeal on February 07, 2013, 08:39:25 PM
There are a wide number of calculators available that will allow to find out what your thermal resistance is through a via. Simple ones are usually worst case since they only take into account the conduction of the plating and not the reflow of the solder in the untented via, but it's not rocket science to find the thermal resistance going from one side of the PCB to the other. I'd be shocked if ngzhang didn't know pretty accurately what kind of temperature rise he's expecting from the thermal pad to the heatsink.


Title: Re: Avalon Asic Design Discussion
Post by: Aseras on February 07, 2013, 09:10:58 PM
For this chip, at 100nm I don't think a QFN and vias is a problem. That's how they were all made back when the process was started. It's when you shrink the process and you start having chips with astronomical heat densities that you need better thermal conduction and BGA and heatspreaders come into play. Some of the current chips like the VRM on a 5000+ AMD or quad core chip are higher thermal densities than nuclear reactors per sq cm under full load. It's ridiculous. No we have exotic cooling and heatpipes and vapor phase cooling, along with water and other ideas.



Title: Re: Avalon Asic Design Discussion
Post by: kev7112001 on February 08, 2013, 03:57:55 AM
BFL design is how it should have been done there should be no reason to need that many chips


Title: Re: Avalon Asic Design Discussion
Post by: mrb on February 08, 2013, 04:05:41 AM
How you define "should have been done" is arbitrary. Obviously Avalon has done it the right way for them: a design with many small 110nm chips was simpler and allowed them to ship before BFL who is struggling with fewer more complex 65nm chips.


Title: Re: Avalon Asic Design Discussion
Post by: kev7112001 on February 08, 2013, 04:08:09 AM
How you define "should have been done" is arbitrary. Obviously Avalon has done it the right way for them: a design with many small 110nm chips was simpler and allowed them to ship before BFL who is struggling with fewer more complex 65nm chips.

using that many adds to complexity and we do know if they have actually shipped yet


Title: Re: Avalon Asic Design Discussion
Post by: mrb on February 08, 2013, 04:16:01 AM
The added PCB complexity of Avalon is completely negligible compared to the complexity of making a working 65nm chip.


Title: Re: Avalon Asic Design Discussion
Post by: Nemesis on February 08, 2013, 04:16:04 AM
How you define "should have been done" is arbitrary. Obviously Avalon has done it the right way for them: a design with many small 110nm chips was simpler and allowed them to ship before BFL who is struggling with fewer more complex 65nm chips.

by ship, you meant you received one? If not, STFU already.


Title: Re: Avalon Asic Design Discussion
Post by: Syke on February 08, 2013, 04:18:27 AM
How you define "should have been done" is arbitrary. Obviously Avalon has done it the right way for them: a design with many small 110nm chips was simpler and allowed them to ship before BFL who is struggling with fewer more complex 65nm chips.

by ship, you meant you received one? If not, STFU already.

Avalon has working chips, BFL doesn't. Plain and simple.


Title: Re: Avalon Asic Design Discussion
Post by: Littleshop on February 08, 2013, 04:18:58 AM
BFL design is how it should have been done there should be no reason to need that many chips

Each design has its merits.  The Avalon design is cheaper do design and has lower startup costs.  The BFL design is much more expensive to start but is cheaper to manufacture and cheaper to run long term.  The real prize goes to who builds first, and in this case it is Avalon.  If they can pump out two or three rounds of these they make a pretty good profit.  There also may be a secondary market for these chips outside of bitcoin.  



Title: Re: Avalon Asic Design Discussion
Post by: Nemesis on February 08, 2013, 04:23:28 AM
How you define "should have been done" is arbitrary. Obviously Avalon has done it the right way for them: a design with many small 110nm chips was simpler and allowed them to ship before BFL who is struggling with fewer more complex 65nm chips.

by ship, you meant you received one? If not, STFU already.

Avalon has working chips, BFL doesn't. Plain and simple.

working? you meant for 24hrs max? Yes thats your definition of working.

Plain and simple.

For any sane person, Avalon is still working on their units still. BFL has done the design for 65nm chips which is the hardest part. Testing these chips is very trivial (either work or dont), with only 8 chips per board, its even less prone to bugs.


Title: Re: Avalon Asic Design Discussion
Post by: Nemesis on February 08, 2013, 04:25:27 AM
BFL design is how it should have been done there should be no reason to need that many chips

Each design has its merits.  The Avalon design is cheaper do design and has lower startup costs.  The BFL design is much more expensive to start but is cheaper to manufacture and cheaper to run long term.  The real prize goes to who builds first, and in this case it is Avalon.  If they can pump out two or three rounds of these they make a pretty good profit.  There also may be a secondary market for these chips outside of bitcoin.  



What a pile of wishful thinking.

Do you survive life on daily basis with all the big IFs?

Secondary market for these chips? LOL



Title: Re: Avalon Asic Design Discussion
Post by: kev7112001 on February 08, 2013, 04:31:42 AM
BFL has had a working prototype and Avalon the same the only difference between the two is Avalon sent there prototypes to two people, then claim there done. Well if you can send 2 you can send them all.


Title: Re: Avalon Asic Design Discussion
Post by: Syke on February 08, 2013, 04:32:56 AM
How you define "should have been done" is arbitrary. Obviously Avalon has done it the right way for them: a design with many small 110nm chips was simpler and allowed them to ship before BFL who is struggling with fewer more complex 65nm chips.

by ship, you meant you received one? If not, STFU already.

Avalon has working chips, BFL doesn't. Plain and simple.

working? you meant for 24hrs max? Yes thats your definition of working.

Those all appear to be software-related issues. You know, the kind of issues BFL hasn't run into yet because they don't have working chips to start developing the software for yet.


Title: Re: Avalon Asic Design Discussion
Post by: mrb on February 08, 2013, 04:52:43 AM
BFL has had a working prototype

BFL has never had a working prototype.


Title: Re: Avalon Asic Design Discussion
Post by: Nemesis on February 08, 2013, 04:53:18 AM
How you define "should have been done" is arbitrary. Obviously Avalon has done it the right way for them: a design with many small 110nm chips was simpler and allowed them to ship before BFL who is struggling with fewer more complex 65nm chips.

by ship, you meant you received one? If not, STFU already.

Avalon has working chips, BFL doesn't. Plain and simple.

working? you meant for 24hrs max? Yes thats your definition of working.

Those all appear to be software-related issues. You know, the kind of issues BFL hasn't run into yet because they don't have working chips to start developing the software for yet.

Is this even a debate or arguement? You dont know anything for sure or just purely speculate

You trust what they say? Oh yes, it doesnt matter u trust them or not, they already said... NO BS TERM OF SALE... no questions, no guarantee

software related? hmmm k.


Title: Re: Avalon Asic Design Discussion
Post by: Littleshop on February 08, 2013, 05:16:48 AM
BFL design is how it should have been done there should be no reason to need that many chips

Each design has its merits.  The Avalon design is cheaper do design and has lower startup costs.  The BFL design is much more expensive to start but is cheaper to manufacture and cheaper to run long term.  The real prize goes to who builds first, and in this case it is Avalon.  If they can pump out two or three rounds of these they make a pretty good profit.  There also may be a secondary market for these chips outside of bitcoin.  



What a pile of wishful thinking.

Do you survive life on daily basis with all the big IFs?

Secondary market for these chips? LOL



It is not wishful thinking, they are taking orders for batch two now.   This strategy has worked.

Considering that these chips probably cost less then $5 each, a single chip on a USB device as a SHA256 accelerator that could be sold at a profit for $39. 



Title: Re: Avalon Asic Design Discussion
Post by: Nemesis on February 08, 2013, 05:18:55 AM
BFL design is how it should have been done there should be no reason to need that many chips

Each design has its merits.  The Avalon design is cheaper do design and has lower startup costs.  The BFL design is much more expensive to start but is cheaper to manufacture and cheaper to run long term.  The real prize goes to who builds first, and in this case it is Avalon.  If they can pump out two or three rounds of these they make a pretty good profit.  There also may be a secondary market for these chips outside of bitcoin.  



What a pile of wishful thinking.

Do you survive life on daily basis with all the big IFs?

Secondary market for these chips? LOL



It is not wishful thinking, they are taking orders for batch two now.   This strategy has worked.

Considering that these chips probably cost less then $5 each, a single chip on a USB device as a SHA256 accelerator that could be sold at a profit for $39. 



Tom would like to thank you for letting him know he's successful.

This community got jerked left and right and still keep smiling to the next scam.
 


Title: Re: Avalon Asic Design Discussion
Post by: Littleshop on February 08, 2013, 05:26:10 AM
BFL design is how it should have been done there should be no reason to need that many chips

Each design has its merits.  The Avalon design is cheaper do design and has lower startup costs.  The BFL design is much more expensive to start but is cheaper to manufacture and cheaper to run long term.  The real prize goes to who builds first, and in this case it is Avalon.  If they can pump out two or three rounds of these they make a pretty good profit.  There also may be a secondary market for these chips outside of bitcoin.  



What a pile of wishful thinking.

Do you survive life on daily basis with all the big IFs?

Secondary market for these chips? LOL



It is not wishful thinking, they are taking orders for batch two now.   This strategy has worked.

Considering that these chips probably cost less then $5 each, a single chip on a USB device as a SHA256 accelerator that could be sold at a profit for $39. 



Tom would like to thank you for letting him know he's successful.

This community got jerked left and right and still keep smiling to the next scam.
 


You seem to be talking about something quite different then me, or the subject of this thread.  I am talking about Avalon, a company that has started to ship. 


Title: Re: Avalon Asic Design Discussion
Post by: johnyj on February 08, 2013, 06:03:30 AM
By far the most beautiful ASIC layout comes from ASICminer

http://i50.tinypic.com/2iktwfn.jpg

It reminds me of the time when every company use their own design to make various computer boards 20-30 years ago, so lively and full of inspiration


Title: Re: Avalon Asic Design Discussion
Post by: smoothie on February 08, 2013, 06:20:18 AM
We found the vias to be inadequate to cool the QFN package during Bitcoin mining.  Under normal operations (e.g. anything not Bitcoin mining, with a toggle rate < 20%, so basically every other application on the planet) vias are more than adequate to dissipate the heat.  With bitcoin mining, the heat generation is much higher and sustained, so the heat starts spreading out into the ground and thermal planes, degrading (and possibly destroying) surrounding components after a long enough time scale.  Granted, our heat density is vastly greater than Avalon's density, so this is probably not nearly the issue it is with BFL's chips, so the cooling with via's are probably the right choice in this application.  

In short, the cooling method on the back side of the board is normal and expected with this type of design.  Adding a HSF to the top of the chip would solve any potential remaining issues if they exist(ed) I would imagine.



It is extremely POOR PCB design practice to attempt to use VIAS for cooling, one only has to take a look DOWN the via to see why......

Plus I fail to see how something only a few micons thick could be expected to 'cool'  a large thermal load, thankfully BFL saw through this particular alchemists fantacy.


typo?


Title: Re: Avalon Asic Design Discussion
Post by: mrb on February 08, 2013, 10:04:45 AM
How you define "should have been done" is arbitrary. Obviously Avalon has done it the right way for them: a design with many small 110nm chips was simpler and allowed them to ship before BFL who is struggling with fewer more complex 65nm chips.

by ship, you meant you received one? If not, STFU already.

You seem upset that BFL did not ship first. That is not a reason for writing an abusive post. Watch your language.


Title: Re: Avalon Asic Design Discussion
Post by: kev7112001 on February 08, 2013, 02:07:55 PM
Well this is a topic of design so we need to stop talking about shipping who was first or last cause technically no one has one, so there is yet to be a first shipper


Title: Re: Avalon Asic Design Discussion
Post by: Nemesis on February 08, 2013, 02:12:29 PM
How you define "should have been done" is arbitrary. Obviously Avalon has done it the right way for them: a design with many small 110nm chips was simpler and allowed them to ship before BFL who is struggling with fewer more complex 65nm chips.

by ship, you meant you received one? If not, STFU already.

You seem upset that BFL did not ship first. That is not a reason for writing an abusive post. Watch your language.

No I'm stating the fact. You need to learn to use the brain between your ears.



Title: Re: Avalon Asic Design Discussion
Post by: Aseras on February 08, 2013, 03:18:05 PM
These are all first generation "prototypes" they are not super tested rugged bulletproof designs. they are all made by hobbyists and fly by night companies. The first gen machines are going to have issues. It happens. BFL has issues with their first FPGA singles overheating and causing problems. However the early adopters get to make a larger profit by taking the risk.


Title: Re: Avalon Asic Design Discussion
Post by: jjiimm_64 on February 08, 2013, 03:51:12 PM

THIS:
These are all first generation "prototypes" they are not super tested rugged bulletproof designs. they are all made by hobbyists and fly by night companies. The first gen machines are going to have issues. It happens. BFL has issues with their first FPGA singles overheating and causing problems. However the early adopters get to make a larger profit by taking the risk.


Title: Re: Avalon Asic Design Discussion
Post by: Bogart on February 08, 2013, 06:49:51 PM
A 280mm fan would have made the 4U (178mm) chassis way taller. Not good.
Wrong direction. Like a computer case intake on the side.

http://www.newegg.com/Product/Product.aspx?Item=N82E16835705056

This would not be proper airflow in a rack (and Avalon is designed to be racked).

Strange, I have seen Server racks online with those kinds of configurations. (mostly 120mm fans)

These fans you guys are looking at are crap. Server, rackmounts fans are substantial and HUGE. 120mm, but 2-3 inches thick with crazy high power motors.

I have some 120mm fans that run on 48V, and they're rated to move 200CFM each.  About 10 times what most 120mm fans will do.

When I powered one up loose on a table, it blew with enough force to push itself across the table, and drew blood when it walked right off the table edge and I tried to catch it.

They're loud as hell too, with a real high tone.

I like Avalon's design where the air flows in a straight path in the front, across the fins, and out the back.

I never liked the BFL and bASIC designs where the air is forced to make a right-angle turn.


Title: Re: Avalon Asic Design Discussion
Post by: mrb on February 08, 2013, 07:08:15 PM
Well this is a topic of design so we need to stop talking about shipping who was first or last cause technically no one has one, so there is yet to be a first shipper

Anyway, talking about who shipped or not is irrelevant to prove my point: Avalon is first to mine. This would not have been possible had they chosen a more complex 90nm or 65nm design, therefore 110nm was the right choice in order to beat BFL on time having devices mining as we speak (prototype or not, shipped or not).

Nemesis: watch your language - this is your 2nd warning. Next time you will find yourself in my ignore list.


Title: Re: Avalon Asic Design Discussion
Post by: Nemesis on February 08, 2013, 07:22:28 PM
Well this is a topic of design so we need to stop talking about shipping who was first or last cause technically no one has one, so there is yet to be a first shipper

Anyway, talking about who shipped or not is irrelevant to prove my point: Avalon is first to mine. This would not have been possible had they chosen a more complex 90nm or 65nm design, therefore 110nm was the right choice in order to beat BFL on time having devices mining as we speak (prototype or not, shipped or not).

Nemesis: watch your language - this is your 2nd warning. Next time you will find yourself in my ignore list.

And i said your point is moot if those AVALONs arent not in their customers hands. Having prototypes with unknown bugs means.... they beat BFL?

Its also amusing that you said " shipped or not" ...

Sure, ignore me. Or grown up and admit your point is nonsense.


Title: Re: Avalon Asic Design Discussion
Post by: PuertoLibre on February 08, 2013, 10:08:20 PM
A 280mm fan would have made the 4U (178mm) chassis way taller. Not good.
Wrong direction. Like a computer case intake on the side.

http://www.newegg.com/Product/Product.aspx?Item=N82E16835705056

This would not be proper airflow in a rack (and Avalon is designed to be racked).

Strange, I have seen Server racks online with those kinds of configurations. (mostly 120mm fans)

These fans you guys are looking at are crap. Server, rackmounts fans are substantial and HUGE. 120mm, but 2-3 inches thick with crazy high power motors.

I have some 120mm fans that run on 48V, and they're rated to move 200CFM each.  About 10 times what most 120mm fans will do.

When I powered one up loose on a table, it blew with enough force to push itself across the table, and drew blood when it walked right off the table edge and I tried to catch it.

They're loud as hell too, with a real high tone.

I like Avalon's design where the air flows in a straight path in the front, across the fins, and out the back.

I never liked the BFL and bASIC designs where the air is forced to make a right-angle turn.
They make tiny fans of 30 to 40mm that push about 125cfm each if I recall correctly. My server has about 4 on each side. (8 total at 15-16 thousand RPM)

So at 120mm a high end delta fan should be doing quite a bit. From what I understood the static pressure is more important as it keeps the components nice and cool. The Avalon seem to be pull only configuration. I also wonder why they didn't buy a modular power supply. The top where the powersupply is located has restricted airflow with all those cables. It would be interesting to measure if that is a spot where heat can build up and cause power supply issues.


Title: Re: Avalon Asic Design Discussion
Post by: mrb on February 09, 2013, 08:53:41 PM
Anyway, talking about who shipped or not is irrelevant to prove my point: Avalon is first to mine. This would not have been possible had they chosen a more complex 90nm or 65nm design, therefore 110nm was the right choice in order to beat BFL on time having devices mining as we speak (prototype or not, shipped or not).

Nemesis: watch your language - this is your 2nd warning. Next time you will find yourself in my ignore list.

And i said your point is moot if those AVALONs arent not in their customers hands. Having prototypes with unknown bugs means.... they beat BFL?
Its also amusing that you said " shipped or not" ...
Sure, ignore me. Or grown up and admit your point is nonsense.

(Finally you write a post without insults. Stay polite and I will not ignore you. It is that simple.)

I said "shipped or not" because this is an irrelevant semantic disagreement: I consider the 2 units in the wild mean Avalon started shipping. You disagree. Big deal. I also believe them when they say that 53 units are in transit (ie. "shipped"). You will be convinced very soon, probably after Chinese New Year. Just wait and see.


Title: Re: Avalon Asic Design Discussion
Post by: Nemesis on February 09, 2013, 09:27:48 PM
Anyway, talking about who shipped or not is irrelevant to prove my point: Avalon is first to mine. This would not have been possible had they chosen a more complex 90nm or 65nm design, therefore 110nm was the right choice in order to beat BFL on time having devices mining as we speak (prototype or not, shipped or not).

Nemesis: watch your language - this is your 2nd warning. Next time you will find yourself in my ignore list.

And i said your point is moot if those AVALONs arent not in their customers hands. Having prototypes with unknown bugs means.... they beat BFL?
Its also amusing that you said " shipped or not" ...
Sure, ignore me. Or grown up and admit your point is nonsense.

(Finally you write a post without insults. Stay polite and I will not ignore you. It is that simple.)

I said "shipped or not" because this is an irrelevant semantic disagreement: I consider the 2 units in the wild mean Avalon started shipping. You disagree. Big deal. I also believe them when they say that 53 units are in transit (ie. "shipped"). You will be convinced very soon, probably after Chinese New Year. Just wait and see.


I'm a hot head because i cant stand seeing this community being scammed left and right. Avalon never tell a whole truth and even lie in many instances. You believe them? good for you.