Great, thanks for that. I will run bare wires to one board and then using the short connecting wires (supplied with boards) run power from that board to the other 2 consecutively. I was tempted to try this already, but resisted the urge out of fear of destroying my new gear.
Just make sure you get the polarity right.
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My 3* boards have just arrived. My power supply has no PCIe connector, just single positive and negative wires. My question is; what is the best way to wire this to my board? Should I wire the power supply wires to some sort of adapter and plug into the PCIe connection or would it be better to figure out a way to wire this to the barrel jack connection?
You can put bare wires in the green screw terminals.
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If i plug both of them is there a problem or it doesn't matter?
If you have two power cables, and one board, plug them both into the board. If you have multiple boards, stick each power cable in a different board. The more power cables you have in parallel, the better. However, do not use two different PSUs together in a single board.
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I'm well aware of ways to work around it, but I don't think anyone's using the data so with so much else to work on, unless it's requested I'll just leave it as is.
I was actually thinking that the user interested in having better statistics would volunteer to do the work themselves
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If someone wanted to get per-chip statistics, the better way would be to have a dynamic list, which grows automatically when a new chip is mentioned in the results.
Of course, with the number of chips growing into the hundreds, the value of knowing exactly what happens in each individual chip starts to diminish. EDIT: also, measuring these statistics in the driver, with a high difficulty setting, produces very erratic per-chip results, unless you measure over very long times.
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EDIT: Shouldn't be hard for me to generically change it to as many chips are reported in chips, but I believe some earlier samples/firmware didn't report that so I'll add a workaround.
And some new firmware reports the wrong value Also, the OneStringMiner devices allow a simple serial connection to connect multiple boards through 1 'master' board connected to a USB port (potentially resulting in hundreds of chips). The firmware automatically detects and counts these boards, but this is done in parallel with the USB enumeration/initialization, so the number of chips could increase some time after the miner application request the version string. In theory, the user could even dynamically add some extra boards after the device has been running (although this would not be a common procedure).
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I don't think it is 100% the same. There must be something different somewhere. On BFGMiner with the current driver the current hash rate is show at half the speed it is running at. On the same hand the effective speed shows up properly. I have tried it on 2 different systems with the same results.
Maybe the problem is that the firmware version string still reports "2 chips", but when it submits results, it provides a chip number 0 through 5. That's the only thing I can think of that would be different between the devices.
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The protocol is exactly the same as for the bi*fury devices (and also the same for the One String Miner), so cgminer already supports them.
The code assumes 2 job queues so I assume you worked within that framework despite the extra chips? Not sure where the 2 job queues come from, but the firmware internally uses a single queue with room for 4 jobs. That's the same on bi-fury and hex-fury. The only difference is that the hex-fury jobs are processed faster because there are more chips, but this should be transparent for the driver. For the OneStringMiner version with the serial bus, the job queue has been extended to 16 (but we're still experimenting with that), because it supports a total of 16 boards with 15 chips each, so it goes through the work a lot faster.
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( no, seriously, I'd love to see more of these. There's a gap in my list that would be filled nicely with a QUAD•FURY )
4 chips isn't enough to do a string design, so it would require a 10 Amp DC/DC converter, adding cost and board space. For the same space and price, you could make a 6 chip string design like we did. Then clearly there's mad profit to be made - you should get on that right now Indeed. Obviously, the problem is not the cost of the components, it's the availability.
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I apologize if I missed it, but did you say if it would be supported by cgminer? Where did you see the pricing? I must have looked over it.
The protocol is exactly the same as for the bi*fury devices (and also the same for the One String Miner), so cgminer already supports them. First post has been updated with prices, by the way.
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And one open to the floor but directed at Ben and cscape: is it ok to run these long term at 70-75C?
The higher the temperature, the quicker the chips will wear out, but I don't have hard figures about the expected lifetime at different temperatures. (I don't know that anybody has ever done a thorough characterization) However, considering that the reward of mining goes down as the difficulty rises, I would expect the optimal to be closer to 70-75 than to 50-55. But that's just a WAG.
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but if you can beat technobit 60GHs 189 EURO (~ 260.71 USD)
Maybe not on price, but it's easy to beat them on customer service.
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Congrats! Very happy to see these devices for sale. I'll be glad to assist in answering technical questions on this thread.
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A question that comes to mind does the clock command accept 1 value per chip so clock command for an OSM would be CLOCK followed by 15 space separated values?
Correct. But if you send less values, the last clock value will be replicated for all remaining chips.
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Sending unnecessary flush commands is bad for performance, since it wipes the entire work queue inside the device. For typical bitcoin mining, the device works fine without flush, as it will automatically flush when a new block is detected. Also, it is unnecessary to send target or maxroll repeatedly. They only need to be send again when they're changed.
Also, a low maxroll value is also bad for performance. For instance, with maxroll = 0, a single OSM board needs about 11-12 work items per second to keep busy. And if the boards are chained through the serial link, they could require nearly 200 work items per second. That's a lot. Setting maxroll to 60, only requires 1/60th of the workload, so about 1 work item every 5 seconds for a board.
In addition, it is good to send the pool difficulty to the board using 'target' command, to avoid unnecessary traffic going the other way.
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[2014-03-18 07:42:47] bifury fd=8: DEVPROTO: SEND version [2014-03-18 07:42:47] bifury fd=8: DEVPROTO: RECV hwerror 0 [2014-03-18 07:42:47] bifury fd=8: DEVPROTO: RECV job 67 5327f8d0 0 [2014-03-18 07:42:47] bifury fd=8: DEVPROTO: RECV needwork 3 [2014-03-18 07:42:47] bifury fd=8: DEVPROTO: RECV hwerror 1 [2014-03-18 07:42:47] bifury fd=8: DEVPROTO: RECV hwerror 2 [2014-03-18 07:42:47] bifury fd=8: DEVPROTO: RECV job 69 5327f8d1 2 [2014-03-18 07:42:47] bifury fd=8: DEVPROTO: RECV needwork 3 [2014-03-18 07:42:47] bifury fd=8: DEVPROTO: RECV hwerror 3 [2014-03-18 07:42:47] bifury fd=8: DEVPROTO: RECV hwerror 4 [2014-03-18 07:42:47] bifury fd=8: DEVPROTO: RECV job 6c 5327f8d3 4 [2014-03-18 07:42:47] bifury fd=8: DEVPROTO: RECV needwork 3 [2014-03-18 07:42:47] bifury fd=8: DEVPROTO: RECV version 1.2 rev 1 chips 2 Ben the preceding is a snippet of a log from bfgminer run with --device-protocol-dump it is plainly clear that the firmware shipped on the OSM boards is hard coded with a response the version command. if this is so and you have access to the source it would need modified to 15. if not could you request cscape recompile a fw specifically for the OSM boards with this modification. Following this post, i will be trying to hack together a modification to bfgminer's Bifury driver to see if this fixes the poor performance. the issue lies in the way bfgminer uses the FW response to VERSION to allocate and setup the queue. since it replies only 2 chip in the response the other 12 are left hungry as f*** and any values they find arent being logged since as far as BFG knows they dont exist We'll change the firmware, but note that the 'chip' parameter was never intended to be used to calculate work load. Instead, if the board requires more work, it sends the 'needwork <jobs>' command to the miner. This is a much more accurate representation of exactly how many jobs are required by the firmware to ensure smooth mining.
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Can antone tell me how many bitfury's can be chained? Ive seen the proven 16 bitfury design. metabank has multiple chains. Nowhere is listed how many you can put on one chain.
There's no hard limit, but more chips increases the chance of a single bad chip blocking the communication. Also, the longer the chain, the slower the communication. First generation M/H board design has 256 chips in a single chain, 2nd generation has 4x64.
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I'D like to buy one can I get directions where to buy from? We are working with others to get both the 15-chip One String Miner, as well as the 6-chip hex*fury produced.
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Hey everybody.
I've read that this miner is optimized for USB 3.0 OR for use at an active USB 2.0 Hub.
So is that right? Or will i lose GH/s if i connect it to an USB 2.0 Hub with additional power supply ?!
It's a USB 2.0 miner, but with higher power requirements, so a 2.0 Hub + extra power is just what you need.
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cscape: any updates on whether or not single chip designs will work?
thanks!
-a[g
I tried hashing the test vectors but got no response from the chip. This was still using a single chip. Next step is to assemble a second board with the other sample chip.
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