Supercomputers will not reach that memory 16 Exabyte capacity in the nearer future, but since they don't have a shared memory space then 128-bit won't be that important.
I know a bunch of navy people who would be willing to classify the Zumwalt-class destroyer as a Battleship. The consensus seems to be that it's called a Destroyer only because BB's are presently the butt of the joke about following the old paradigm too long, when everyone should have been building aircraft carriers instead.
It's only 15k tons, which is a far cry from the Iowa class Battleship, but it's still heavier than many of the Pre-DN battleships. It's certainly not a destroyer, because DD's are traditionally used for killing small ships, submarines and aircraft, each of them a task that the Zumwalt does not do. Instead, Zumwalt is meant for engaging surface and ground targets with missiles and guns. It only has 2 guns, but they are water-cooled, fully automated and have fire rates good enough that it can land as many projectiles per minute on the target as the Iowa. The projectiles themselves are, of course, much lighter and guided.
Today's 64-bit Intel CPUs can only address 48-bit memory btw, cost savings because nobody will have that much memory in one machine for the foreseeable future. more $$ for intel and AMD.
In a sense it's both 48-bit and 64-bit at the same time. The actual addresses are 64-bit, but the specification of AMD64 only allows the first 48 bits to be used; bits 48-63 are just a copy of bit 47.
If the memory controller was implemented as 64 bit instead of 48 bit, there would be no performance difference. but using 48 bit math instead of 64-bit, saves you transistors.
The Ext4 file system physically limits the file block count to 48 bits.
The minimal implementation of the x86-64 architecture provides 48-bit addressing encoded into 64 bits; future versions of the architecture can expand this without breaking properly written applications.
The media access control address (MAC address) of a computer uses a 48-bit address space. This can be changed to 64-bit addressing.
A 48-bit memory address can directly address 256 Terabytes. A processor with 64-bit memory addresses can directly access 16 Exabytes.
In principle, a 64-bit microprocessor can address 16 Exabytes of memory. However, not all instruction sets, and not all processors implementing those instruction sets, support a full 64-bit virtual or physical address space.
The x86-64 architecture (as of 2016) allows 48 bits for virtual memory and, for any given processor, up to 52 bits for physical memory. These limits allow memory sizes of 256 Terabytes. A PC cannot currently contain 256 Terabytes of memory (due to the physical size of the memory chips), but AMD envisioned large servers, shared memory clusters, and other uses of physical address space that might approach this in the foreseeable future. Thus the 52-bit physical address provides ample room for expansion while not incurring the cost of implementing full 64-bit physical addresses.
The free software used to implement RISC-V architecture is defined for 32, 64 and 128 bits of integer data width.
ZFS is a 128-bit file system.
https://en.wikipedia.org/wiki/ZFShttps://github.com/zfsonlinux/zfsOne important feature of making a 128 Bit ASIC with high amounts of RAM, is that 1. We can break out the limits of Memory that way using Yitang Zhang algo. 2. 64 bit and 32 bit virus programs cannot be run on 128 bit ASIC machines.
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? Your fix is to make everyone to do it manually, because you have a problem with me? 
