How did you solve the precomputation?
Can't this still be done in the driver like with the Avalon miner? |
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The heatsink (1 per K16) would mount with 4 fasteners, placed in the middle of each 4 groupings of ASICs. These are not the same as the holes for the standoffs which are at each corner.
Which gives me an idea, there is no reason to concentrate the heat pads on the heatsink behind the ASICs. It might be easier to cover the entire heatsink with heat pad and draw the heat away from the entire board instead of just the regions with ASICs. |
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I am waiting on a quote from them once they look over the files. They were one of the less expensive solutions, though I am not sure if they are equipped to handle parts this small.
Just in case you missed it, BKK is talking about component changes to deal with the ASIC signalling. |
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I'm using a single NOR gate on the REPORT_N / _P outputs. This combines the two data signals to extract a separate CLK. I use the EUSART on the PIC in Synchronous Slave Mode. Very clever, I like it. The report pins aren't cascaded, is there 8 EUSARTs on the PIC you've chosen? (In case you're unaware it is fairly common for more than one solution to exist, I've seen four solutions from the same piece of work - sorry my sha terminology is busted, I hope that makes sense). |
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I have 32 in batch one, in for another 34 from batch three, will send the coins tonight.
Sent. |
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I am sourcing assembly based on chip batch size. This means boards will be produced in batches of 625, or 10,000/16 boards per run. I will be accepting chips from sources other than this group buy, but they will obviously be slower to produce as I will have to wait for the full amount of chips to arrive before sending them for assembly.
Super excellent update, really appreciate the details and the work you're putting into this, sounds like you're enjoying it too! Obviously we can't compel everyone in a batch to use your assembly service but it sounds like your goal is to make it too attractive not to? (and hence come close to the 625 board point). One issue that may slow down assembly is the possibility that not all the ASICs will be on the same reel (from different sources). I guess this just adds a little to the cost, the bulk of the components will be on the same reels. I'm very interested in your heatsink plans, I am concerned the klondike design is a little short of hard data in this area (given it affects the board layout significantly). Cheers, Tom |
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The most preferred option for me would be to buy the boards fully assembled with all needed stickers and heatsink to get importet into EU. So that i only have to add the ASIC's myself.
I think you would struggle to solder the asics with the heatsinks installed, the solder won't melt. |
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It looks like there is a absolute timing dependency between the DATA_P and DATA_N signals, are you sure that you will be able to interpret the data correctly with the PIC controller? Is there are way in a PIC controller to get a timing relationship between two captured serial streams?
Right and there is result pair per ASIC, that's a lot of data for a micro analyse in real time. Perhaps a CPLD in front of the PIC would be smart? |
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Finally got a chance to look at the avalon schematics. Seems like he is using differential signalling for all the data, this guy is smart. My homebuilt FPGA rig still struggles with async noise even at 9600 baud...
*edit*
Ok not differential, can't think of the name of the encoding just now.
I wonder if it might be worth simulating an Avalon in an FPGA and wiring it to our PCB as an end-to-end test. I don't understand SHA256 well enough to grok the significance of the pre-calculation they are doing, I do have some experience working with the open source HDL code though.
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In the event Batch three is not ordered, a refund will be issued. Batch one and two chips are accounted for. If this changes, there may be a possibility of purchasing chips from batch one or two. There currently is no time limit, though this may change.
Let's try to keep this batch open even though things are slow. I think/hope once the chips and boards come in there will be a surge of interest from people who're holding back right now. I have 32 in batch one, in for another 34 from batch three, will send the coins tonight. |
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Woot! Quick blocks, quick bucks!
Awesome blocks. Unfortunately with over 900 MH/s I still have not managed to sneak a single share in ether one, according to my stats. Luck is not on my side today. LOL My workers are only 220Mh/s (I have 32 of them). The problem isn't the hardware, it's the system design. The miner needs to support long polling, then immediately flush all current work and start on the new job. If you can do this quick enough you'll get those early shares. The hash rate will affect the number of shares you get (these blocks are below average for me, so someone else is faster) but you will get something. |
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18048 2013-05-15 23:00:36 0:00:22 43608 24 0.01353690 none 236367 25.00000000 96 confirmations left
18047 2013-05-15 23:00:07 0:01:27 165492 94 0.01394973 none 236366 25.14505001 95 confirmations left
18046 2013-05-15 22:58:40 4:06:17 32543599 25921 0.01909319 none 236365 25.28750600 94 confirmations left
Woot! Quick blocks, quick bucks! I re-engineered my FPGAs to flush stale jobs faster sometime back, makes a difference on this pool for sure. Payout is below average but the BTC per hour is superb! |
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Thanks, I'm involved in that thread but I'm more interested in what steamboat has planned. |
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I can't install KiCad and check the layout right now, will in the next few days.
Was wondering about bringing the power and control to each ASIC though cuttable traces so people can bypass/isolate dead chips? Or in pairs perhaps?
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"I am in the process of speaking with US based manufacturers to build and assemble miners based off open source designs. Pricing will be available closer to the ship date, and will depend on the amount of chips/boards built. I will keep this thread updated with developments as they occur. This is by no means finalized. While likely a solution will be developed prior to chip delivery, and I am making every effort to do so, I do not guarantee anything."
Any updates to this FAQ? Seems like there are lots of groups preparing assembly plans but all based on only a few designs.
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In general electrical fires will go out if the source of energy is removed early on. Consider hooking up a power disable to the smoke detector with a latching relay circuit.
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What I know at the moment: 0,18u-0,13u (180nm-130nm) with less than $250k (ASIC development $150k, shattle first test (50 chips) - $40k, chip assembling and final testing $40k)
Development could take 3-4 months, maybe 5.
Altera HardCopy? I wonder why people didn't try this earlier. Their NRE is more like $750k though. |
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Is this Colin Fitzgerald you're talking about? I emailed with him a few weeks back about a small personal run of these boards. He'll be at Vancouver Mini Maker Faire in early June, seems to know his stuff.
Yup, that's him! How'd you find him? "How'd you find him?" Not sure if you're asking me, how I know him or how did I find his work! Colin is on the local hackerspace mailing list and has answered various SMT questions from people like me over the last few years. I got into a thread with BkkCoins about him being from BC and mentioned I had asked Colin about just doing my Avalon asics for me (I was thinking of hand soldering the rest but given they're 0402, seems unlikely). I guess Bkk forwarded the stuff to you that Colin sent me - I pointed him at Bkk's threads and github. So in summary, I think Colin is genuine person who is very helpful and seems to know a lot about SMT. I've not used his operation for anything. You can see some of his posts at https://groups.google.com/forum/?fromgroups#!searchin/VancouverHackSpace/colin$20fitzgerald Unfortunately he is located about 11 hours drive east of here in Kimberley (north of Montana, not north of Washington) so visiting him is not really an option. I am hoping to meet him in a few weeks at the local Maker Faire. I suspect his location makes him somewhat competitive (rural areas have lower costs). I also suspect that since the business is fairly new he might be more available. One other thought, have a chat to Paul from pjrc.com, he is OR based and seems to have a lot of experience with SMT production houses. I worked with him years ago on his mp3 player, a smart guy. |
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I don't think you can do this. The pressure from the heatsink would probably lift the pads from the PCB and pop the ASIC off. There are lots of excellent links here on thermal vias - seems like an industry standard for stuff like LEDs. |
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