Connected the SPI bus of the S-HASH board to a (bare) bitfury test jig. And to make sure things won't get too hot when things start hashing, all boards were insulated with Kapton tape and bolted to a heat sink I found laying around somewhere. http://imgur.com/IpmxrUaWaiting for some components to come in, then I can test the level shifters and the SPI link. As soon I have a bit of time the Avalon S-HASH board will be redesigned for bitfury ASICs. intron (PS: There will be no Rasberry Pi or PC running cgminer or whatever to keep the hashers busy. S-HASH has networking and will work stand-alone if things go as planned.) If You have SPI at 1.2V - 1.8V You can start communicating without shifter. Have an ARM Cortex M3 operating on 3V3, so there is no 1V2 - 1V8 IO. intron |
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Connected the SPI bus of the S-HASH board to a (bare) bitfury test jig. And to make sure things won't get too hot when things start hashing, all boards were insulated with Kapton tape and bolted to a heat sink I found laying around somewhere.  Waiting for some components to come in, then I can test the level shifters and the SPI link. As soon I have a bit of time the Avalon S-HASH board will be redesigned for bitfury ASICs. intron (PS: There will be no Rasberry Pi or PC running cgminer or whatever to keep the hashers busy. S-HASH has networking and will work stand-alone if things go as planned.) |
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Yes, that's ok. I'm usig now a 1K/1K2 voltage divider
with a zener parallel to the 1K2 resistor. In that way
3V3 signals are 'level shifted' to 1V8 signal levels.
A zener is really needed to fight ESD, did tests with
an ESD gun for many many hours years back. Just hoping
that the on-chip PN-juntions will help you withstand ESD
is begging for trouble. Adding a simple zener and you
can withstand 16kV full contact charge injections, almost
without end. You can forget about the 'two shot 4kV human
body model air discharge' and all that when a zener is present.
intron
RasPI is too weak for serial 1kOhm resistor. Bitfury took only 50Ohm parallel to Zener. I hope we will be able to post final setup that can also read MISO. ? Are there any currents running into your inputs then? It's a CMOS process, right? intron |
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@Intron
Ultimate test is if You get the correct signal voltage on chip pins. If yes, the setup is ok.
Bitfury connected resistor parallel to zener (not serial) and removed zener :-).
Yes, that's ok. I'm usig now a 1K/1K2 voltage divider with a zener parallel to the 1K2 resistor. In that way 3V3 signals are 'level shifted' to 1V8 signal levels. A zener is really needed to fight ESD, did tests with an ESD gun for many many hours years back. Just hoping that the on-chip PN-juntions will help you withstand ESD is begging for trouble. Adding a simple zener and you can withstand 16kV full contact charge injections, almost without end. You can forget about the 'two shot 4kV human body model air discharge' and all that when a zener is present. intron |
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For raspberry pi solution was pretty straightforward - just load output with 50 Ohms and you'll get voltage divided to about 1.8 V, nice sharp edges and no ringing!!!
This is what should be done instead of series resistor and zeners. This likely may be reason why Taiwan test failed.
Zeners were choosen to provide for ESD protection and to allow for variable input voltages. The voltage levels of the control processor where unknown during the design, could be 3V3, 5V or even 2V7. Will use a voltage divider also now. Use zeners as input protection all the time, never had issues. intron |
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intron what size of capacitors are used for decoupling? Seems too big for 0402.
Use 0402 for the 15 surrounding the ASIC. The bigger ones are ECAP_SMA. intron |
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We're catching up with you here... Kudos on board, it's got good characteristics as we just measured it with a spectrum analyzer. We killed the only present resonance around 620MHz with some 1uF tantalum caps. It's gonna be a long night  And remember, this is just the lowest cost 1.55 mm bi-layer you can get. Later is will be an 4-layer with 0.1 mm or so GND-to-VDD plane spacing. In theory decoupling should be better then. intron |
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We're catching up with you here... Kudos on board, it's got good characteristics as we just measured it with a spectrum analyzer. We killed the only present resonance around 620MHz with some 1uF tantalum caps. It's gonna be a long night Can you give me the coupling caps you found when you are finished? Will copy it in the design then. intron |
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Looks like they did via in BGA pad. Why? Heat propagation? intron |
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Another picture made by c-scape of a mounted ASIC, now with some decoupling:  Next step is power sequencing. bitfury is rather anxious about "frying" the chip due to applying the power to the different nets in an incorrect manner. Must incorporate an hi-side power switch (might be as simple as an p-FET and some resistors) somewhere and control this switch with firmware. Will work on this before actual ASICs are put in jeopardy:) intron |
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It started:  With thanks to c-scape for picking up the chips from the airport. intron |
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i wll follow this Thread,
i would also buy 10- 50 Chips, 50 Chips for 3750$ by Wire
nice would be if we could share the first Payment 2x 1875$ to proceed faster,
but this depends on the Plans from BFL when and to whom they show it ?
In the Moment we got someone who can produce the PCB's fast, i'm so in (but then its probably too late)
Maybe I could help, did the CAD of S-HASH within a week. It's the 16 Avalon board we are working on posted earlier: http://imgur.com/s7vQDziNeed the pinout + package style first then. Spec and samples can follow later. intron |
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Is there a datasheet on this BFL chip out already?
A pinout and a chip package would be enough at
this point.
intron
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Power consumption feeding it with different voltages (unprogrammed and no clock).
[14.06.13, 20:19:00] Niko: 0.5V = 0.03A
[14.06.13, 20:21:14] Niko: 0.55V = 0.04A
[14.06.13, 20:21:38] Niko: 0.597V = 0.06A
[14.06.13, 20:22:14] Niko: 0.698V = 0.11A
[14.06.13, 20:22:29] Niko: 0.75V = 0.15A
[14.06.13, 20:22:51] Niko: 0.79V = 0.19A
[14.06.13, 20:21:56] Niko: 0.65V = 0.08A
[14.06.13, 20:23:16] Niko: 0.85V = 0.29A
[14.06.13, 20:23:35] Niko: 0.9V = 0.40A
[14.06.13, 20:25:11] Niko: 0.95V = 0.60A..
Now we'll do most important, we'll try to see clock, then we'll try to hash on 0.6 V... I think 1 W / GH/s is easy target for us, very easy :-) Do you see relationship in unprogrammed state ? ;-) So if it computes correctly - then it will beat power limit definitely :-)
Bitbet left only 6 hours as I write this. If chip will work but bitbet would reject proof - those who put bet on YES I'll pay myself. If we'll make however test earlier than 6 hours - but bitbet would reject proof - that's their reputation issue and not ours. As actually we have no fears, this result will be re-verified multiple times and overall costs involved are MUCH higher than those bet value :-) So no sense to lie just to win bet :-))) Already flight to Taiwan and organizing test had quite significant costs :-))))
That`s are really great values, I hope internal clock is working great too. Nice pcb`s intron, that was fast delivery  You should mostly thank mister c-scape, I'm currently on some Nordic fjord trying to get things moving with not more than a tablet:-) Be back in full swing soon.... intron |
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Power consumption feeding it with different voltages (unprogrammed and no clock).
[14.06.13, 20:19:00] Niko: 0.5V = 0.03A
[14.06.13, 20:21:14] Niko: 0.55V = 0.04A
[14.06.13, 20:21:38] Niko: 0.597V = 0.06A
[14.06.13, 20:22:14] Niko: 0.698V = 0.11A
[14.06.13, 20:22:29] Niko: 0.75V = 0.15A
[14.06.13, 20:22:51] Niko: 0.79V = 0.19A
[14.06.13, 20:21:56] Niko: 0.65V = 0.08A
[14.06.13, 20:23:16] Niko: 0.85V = 0.29A
[14.06.13, 20:23:35] Niko: 0.9V = 0.40A
[14.06.13, 20:25:11] Niko: 0.95V = 0.60A..
Now we'll do most important, we'll try to see clock, then we'll try to hash on 0.6 V... I think 1 W / GH/s is easy target for us, very easy :-) Do you see relationship in unprogrammed state ? ;-) So if it computes correctly - then it will beat power limit definitely :-)
Bitbet left only 6 hours as I write this. If chip will work but bitbet would reject proof - those who put bet on YES I'll pay myself. If we'll make however test earlier than 6 hours - but bitbet would reject proof - that's their reputation issue and not ours. As actually we have no fears, this result will be re-verified multiple times and overall costs involved are MUCH higher than those bet value :-) So no sense to lie just to win bet :-))) Already flight to Taiwan and organizing test had quite significant costs :-))))
And now fire up the clock! Luckely power dissipation is linear with frequency and not quadratic as with core voltage:-) intron |
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Earlier then expected the bitfury test jigs arrived:  Together with the solder paste screen for reflow soldering of the ASICs:  Next step is connecting these boards to the SPI link of S-HASH and compiling and running some of bitfury's code. intron |
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S-HASH says 'hello world' :  intron |
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Our miner board S-HASH returned from the factory today. It can host to up to sixteen Avalon ASICs, has Ethernet, some serial links and an NXP ARM Cortex M3 controlling the stuff. Also an adjustable DC/DC converter is present that can deliver to up to 50 A. This board can be used for testing the bitfury ASIC: the test jig that is in production now can be connected to the SPI link and code can be written to tests it's functionality and power consumption. More about this later. Image of S-HASH: http://imgur.com/iBzVq1YImage of the solder stencil: http://imgur.com/O5RU4fOintron |
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