Won't disagree at all on the commodity aspect and I am at a loss to explain the poor designs. What, did they (Bitmine.ch) hire some interns with not even 1st year design experience to make these rigs?  "If AMT had instead focused on prompt delivery and solid support, then maybe they would not be in this mess" Delivery of what? The earlier non-working Bitmine-based designs? Again, read the A1 dev thread. Look at when ANYBODY 1st had chips to experiment with. Look at when the 1st test boards were made. Now consider that BMch et-al had promised full blown systems - not test kits - to be in customer hands months before. There simply was literally zero time left for the commercial entities to make/properly test a salable system. IP does matter. It matters very very much. IP is what will make one design work when others trying to use the same core parts don't work. Right now AMT is competing with HF, Dragon and to some extent Bitmine.ch to get a decent A1 design out the door. Competing against other chip systems is not exactly an issue yet compared with getting things to work and be suitable for large production runs. Bitmaintech will provide design guidelines if you want to use their chips but they will NOT give you their sales product designs. Same with Cointerra. Even Technobit licensed their board design to Bitmine/AMT. They did not just give it away and it is a damn safe bet that if Technobit sold systems vs modules/kits they would not have helped at all. |
|
|
|
I will stay busy reading all those new links just posted, lots of good stuff therein,,,,
Did find the reason all are struggling, noone wanted to share info, till lately.
with a 6month lifespan on high end equiptment, they have no time to act like that.
Community shared it would have gone much faster.
Nobody wanted to share? Folks are just discovering the problems.... AMT is the one not sharing. Heck... they are even asking these folks who are sharing to sign an NDA! For the uninformed.... NDA is NON DISCLOSURE AGREEMENT Swing and a miss. The NDA will be because specific product IP is needed for me and ISA to do the voodoo we do so well. One can only go so far with visuals and conjecture based on the 1 & 2 chip reference boards and schematics. Obviously many things by necessity have to be different with the 8-chip setups. I've read the dev and DIY threads from start to finish before. Those are what pointed me at the various things I've been bringing up here as problems being seen sound a lot like what those threads covered. Somewhere between a reasonably good start and scaling to production systems seems that a lot of A1 company designers fell victim to the NIH attitude and tried to re-write the rules. Even the Technobit designs are still being tinkered with and discovered (and nice job on the power/speed work in their part of the Forum Losh...) but then that seems like what they were made for: stand-alone miners and tinkering toys, not piled in a common box as systems. As with Hashfast, Black Arrow and others in the A1 game things for them have moved past the community-only aspect. Business is business and you can't sell systems unless you can differentiate your product from the others and that takes IP. Or at least systems that work... |
|
|
|
I will stay busy reading all those new links just posted, lots of good stuff therein,,,,
Did find the reason all are struggling, noone wanted to share info, till lately.
with a 6month lifespan on high end equiptment, they have no time to act like that.
Community shared it would have gone much faster.
Can't disagree there. But... Community & business rarely make good bedfellows. <stands up> I design very very expensive industrial systems for a living. A good part of their market is for <drum roll please> chip making. Because the product is in front of the bleeding edge I am often brought in nearly from day-one of our customers customer asking, "Can we do this...?". (Usually after informing them of what it will entail - yes. I love challenges). The folks who commissioned the ASIC's be they Bitmine/InnoSilicon, Cointerra, BFL or whoever aside from Bitmaintech seem to have gone to the Underpants Gnomes school of business. Look it up. It's actually an oft used term  In this case it goes: step-1: Make chips for miners step-2: ? ? ? step-3: Profit! The step-2 that is missing is design what *uses* the chip. Point is I am damn certain of what will need to be addressed for my equipment & process to work 24x7x365 for years and often decades. Why am I certain? Because I and my company have been constantly researching future needs and at our expense already done all the groundwork. My customers are telling me they want to spend several million dollars a year bringing in our systems and I need to be certain the design will work. Period. Yes chips delay hurt massively but more to the point those selling chips did nothing to actually *use* the chips in-house. After that release true engineering samples along with test boards. IF I have the timeline for the A1 right it went from a 1 to 2 chip reference pretty much conceived of/gotten to work in the dev & DIY threads in about a month (Jan-Feb) and then straight to 'production' with 8 chips. Of course the 1st versions have problems. eg. the multiple SPI slave chain matter. The entire design was never characterized to begin with. Just get it running... I understand the pressures that the pre-order syndrome brought on but hell, they threw a baby into battle! At least it seems InnoSilicon/Dragon & Technobit saw what they actually had to deal with and addressed it better then those who relied on the BitMine design team. <sits down again> |
|
|
|
Quote zefir:
Step-by-Step Bring-up Process
1) Physical
Most is depicted in the above figure, this is the prose version:
chip is 1.8V only => use level shifter for all signals from/to host SPI interface
VDD needs to be ~820-850mV with a max. ripple of 70mV (pilot run chips do not support undervolting)
AVDD needs to be 1.8V with a max. ripple of 200mV
power-up PLL settings are based on 12MHz reference clock; if you use a higher value do not start hashing without reducing system clock via PLL or you risk bricking the chip by overclocking it.
if you have a multi-chip board, use a clock distribution device to drive them with a single oscillator
heat-sinks on both sides of the chip needed, monitor and ensure surface temperature does not exceed 50°C
HW reset is mandatory; RSTN needs to be pulled low for at least one second; ensure it was released for at least one second before the first command is issued
Thanks. All are 8-chip boards. Will be checking all levels I can including downstream SPI signals. Hopefully the A1 buffers things between the 2 side of it. |
|
|
|
Which? The HW_reset function, SPI info, or chip voltages? Or all the above?  Elsewhere in the thread they mention liking 0.84v (??) for starting the chip. |
|
|
|
At the end of Zefir's someone has made a data in shifter as well. https://bitcointalk.org/index.php?topic=294235.msg6176799#msg6176799Again the questions: Are level shifter chips used to translate to/from RasPi's 3.3v I/O to/from the A1's required 1.8v for both data in & out on the production boards or using resistor divider network for the input data? Does each A1 have it's own buffered clock signal? |
|
|
|
Thanks, I am not spi usb programmer, Just want to help out, and keep you barking up the right tree  Seems most industry devs already know most of this, It just hit the hobby level and I found it relevant to some of you guys diagnostic posts. AMT must also know this. Seems all three have similar issues HF BA AMT. Would that boil down to Bitmine original design ? 1 SPI for each master slave.... Is correct way. Yes its a good point and most of have gone through that one, but in this we don't think it's the SPI. Zefir outlined this in his thread: https://bitcointalk.org/index.php?topic=294235.0The chip resets itself when: A. when supply voltage is unstable, B. chip gets too hot, C. there is noise on SPI bus and communication gets messed up. Once that happens, we have not found a way to get the chain back to life other then possibly issuing a HW reset which is covered in zefir's thread. Along the SPI com lines... I've been wondering how that is being handled: The the SPI link that ISA posted a while back It says it *does* kinda allow addressing. 4 lines are available for that as I recall. Now as to if each addressed chip can be a master to more in a serial chain from it - dunna know. Gotta dig more. Now even more relevant, from Zefir's thread: "I understood that the eval board used in China (the one you saw in the pictures) for testing has a level shifter for input and output signals, while Bitmine's boards use resistors to lower the input signals and a level shifter for the output signal (MISO) - seem to work both."2 things on that: Just where is that level shifting done? and, Is it still being done with a resistor divider network? Far far better to use a level shifter chip for both data out AND data in! By its nature using a resistor network makes the output signal from the divider highly dependent on what is fed in on the hi side and sensitive to the load presented by the A1. If either changes for any reason so does that signal level... A level shifter chip not only changes the voltage but also acts as a Schmidt trigger (very tolerant to input signal level changes) giving very predictable switching as well as being a decent current source that will always deliver the specified output voltage regardless of load (within chip specs of course). End result is very clean data signals. And also per that thread (and should always be done in ANY logic design until proven unneeded) Is the clock signal to each A1 buffered? |
|
|
|
First, when it comes to electrical components, do NOT rely so much on e-bay. Yeah might be fine for generic connectors but being solidly in the grey-market may not be either. The assembly house AMT used getting parts from the grey market is part of what has caused so many problems. Unless one is a hobbyist, getting components from non-vetted distributors is verboten! You could be getting anything that comes in a similar looking package that has been re-labeled. The PCie connector is Molex Mini-fit Jr. series Molex pn-45732-0001. Fora right angle one, straight should be close to that. Mouser pn http://www.mouser.com/ProductDetail/Molex/45732-0001/?qs=sGAEpiMZZMs%252bGHln7q6pm0yYNlAgQWB%2fw9pdNaIn3qc%3dFor the coms header just measure the pin-to-pin spacing on it and how many pins there are. |
|
|
|
I hope not obvious to ask, but what do working cards report? Also, kicking around in the dusty corners of me mind is there being something in the A1 dev thread about the SPI link speed vs A1 clock. 2,400,000 sticks in ma head. Don't know if good or bad but your logs shows it trying 2,000,000 Along those lines, in the SPI/iC2 link you gave they mentioned that iC2 coms happen in-between the SPI start/stop bits. Is that auto-synced or 2 different clocks used? If so, are they synced so the 2 different coms don't step on each other? Yes, reading the entire dev thread was the 1st thing I did once I um, got snagged, with my order... Is what clued me in to what was going on with the A1 rigs once chips were in the wild. 1st thing noted was the performance spec changes from what had been hoped. As for the boards... I was really hoping that Bitmine had learned some things from doing the Avalon systems on how to run more than just a few chips per-blade much less a box full of them. Rather like BFL it seems not  |
|
|
|
Nice! I just ordered some more s2 antminers. For the price I am quite happy with them. They work well.
Yes! they are very good miners too! I guess if we took a pole here it might be 50/50. I just figured I would put it out there. I paid more for my first round then 2nd round. Finally I am getting somewhere with this mining stuff! I have to be aggressive since I lost so much time already!!! I may look at antminer when they come out with a 5-10Th/s to compare pricing. Ordered my 1st s2 last night, BTC4.609 Just in time as it seems that the Luck factor has been heading South as of late. My pool has been chewing on a block for the past 1d 14:04:47. For once I picked the perfect time to switch pay from DGM to PPS After a good run at normal it will be interesting to see what the s2 does when goosed faster. For a s1 the default s2 clock is super eco-mode. Will need a bigger psu of course... |
|
|
|
Well I am down to 2 working cards. The 3 I have had were running fine for a couple weeks just fine without any messing around.....then poof one dropped dead. Hoping this is just something to do with voltages.
Still have the Vdd voltage present on the dead card? Check across any of the 4 yellowish chip caps in the corners of the chips to measure it. If done right the regulator will have over current sensing (the Bitmine ref one does) and shut down if faulted. As to whether you need to cycle the power to reset it or if auto-recovery, or can use software to ack the fault and restart it unknown. If no Vdd then either a) something major failed resulting in a short or b) the regulator itself has not been told to run (ic2 com to it lost?). If ya got Vdd then I'd guess coms are lost. |
|
|
|
When I run the commands I am expecting to see some kind of error that states why that the card failed or something to that effect. I will look at the i2cset documentation directly and see if I can parse some info before I try anything further. Least knowing the safe ranges gives me a spot to work with and see if I can get the card back up. Assuming thats even possible.
Got a 'scope or better yet data analyzer so you can see if there is data moving around? Many scopes over that last few years can even specifically trigger on SPI & iC2 events to look at the data packets. |
|
|
|
|
No idea there but have to ask, is the I2C only for setting core voltages or does it serve other functions as well? They aren't passing the hashing data over it as well are they?
More to the point, need a current schematic of at least the regulator stage from AMT (Listening AMT_Miners?) The Bitmine reference board uses a fixed value set by resistors (as do Ants - been reading up on undervolting them ergo...)
The A1 regulator should be able to be hard wired to start at any voltage we want by changing a resistor value and still be programmable. Anyone got a part number on the regulator chip? Most likely starts with LTCxxx
Makes for nice safe starting and would allow a more stand-alone kinda operation if we can find a sweet spot vs clock speed. Again - need a current schem.
|
|
|
|
i suppose i need to get some of those server psu's. The desktop ons are way too expensive, like you said.
one of my buddies was telling me about his 5 ants. by undervolting/underclocking, his electric bill goes down $120/month, and his mining revenue only goes down $30-40/month. not a bad trade off. plus they are cooler and quieter.
These are the ones I use, rated for 900w on 115vac, 1,200w on 220vac http://www.amazon.com/1200W-HP-DL580G5-Supply-440785-001/dp/B002P5XUA0/ref=pd_sim_sbs_pc_4?ie=UTF8&refRID=0RR4R5ZBJ24X4E6JSP8N You will use less power as well as they are >96% efficient vs 80-86% for regular PSU. How to wire them http://www.rcgroups.com/forums/showthread.php?t=2100680Instead of using a resistor between pin-1 and pin-4 I wired a lil' switch to them for easy turn-on/off. Close the connections and the outputs turn on. To feed 2 OC's Ants I run two 12ga wire pairs from the PSU and terminate each pair with 2 (4 total) 12" PCIe extender cables from Frozen CPU. Cut the socket ends off of course. Think the cables were around $8 each. |
|
|
|
why buy s2's, when you can underclock/undervolt the s1's, and get the same w/GH as the s2? buy 7 s1's, run them at 160GH/160W, and it will cost you about $1400. then you would need to spend an extra couple hundred for a 1200W PSU, or 2 750-850s. total cost=$1700-1800, instead of $2244 for an s2. s2 price has come down a lot, so i guess having it all in one neat package would be an advantage over 7 s1's. i go for cost savings, as i have plenty of room. link to s1 how-to https://bitcointalk.org/index.php?topic=526060.0Too bulky. Will say my pharm looks pretty neat though with the blue LED fans I put on the Ants. Running them 4 per 24" wide shelf. Hmm, gonna check out undervolting as would not break my heart to lower power a bit. Pulling around 3.8kw right now for the pharm running 1.65-1.9TH total. Couple hundred for a psu? Way to much! I've been paying $40-50 for new HP 1200w 1U high server psu's through Amazon. Takes a little wiring to use them but work great. |
|
|
|
I got 8 chips on my boards........ My thought would be say modular chip docks like a cpu so one chip frazzles itself you just nip out the chip and swap it for another. Bobs ya uncle back in business. And during test you can have a bank of them in test ditch or put aside dead and low hash chips ship best of batch use the slow/unresponsive chips to test alt settings send out to prospective people to use as reference or build on see what they can do with it.
The BGA chips won't let you do that because they require intimate contact with the thermal vias. As in must be soldered. The chip is too fragile to use a pressure plate to press down on it hard enough to run at full power. But - there *is* a low-temp solder made expressly for futzing around... How it would impact later assembly/lifetime don't know but ja, there needs to be some kind of performance binning done with these. |
|
|
|
Well just a suggestion about creating a new board... you know that the A2 chip set has identical pin layouts.. so if we want to get serious about mining then we could source our chips directly from Innosilicon and save a bundle.
I inquired with them and a single A1 chips is around $45. So if you go with your own created boards and maybe a mineral oil (or immerssion)... and then locate yourself beside a hydro-electric damn, then you have a good chance at being profitiable with Bitcoin mining!
Ants, even the power hungry S1's, are very profitable for me. Even without the current rise in BTC value my 9-Ant pharm is 3/4 'paid off' in just under 3 month of running. I used the quotes because tonight I'll be using most of the BTC earned to order a s2 from Bitmine... Solid hardware those S2s. A few people bitching over the shipping snafus but they are making geniuine attempts to remedy that for shipping. I got mine in pretty good shape just needed to reseat the cards is all. I got one and it hashes at 960-1200Ghs. No OC needed. You do know that the S2's are running in what on an s1 would be called super-eco mode don't cha? Last I saw clock is 197mHz and software will let you goose up to 400 same as s1's. If you dunk it in liquid and have one helluva psu that is Take a look at /etc/config/asic-freq for the options you have. The one being used is un-rem'ed. |
|
|
|
|
Show Posts
