For some reason, since the last windows update, i can no longer use the #0 card, it hangs out setting the dag. Has anybody experienced this same problem? I can't go back the windows version, so i'll move to linux (already have a lot of linux rigs so it's not a big problem) but i don't have the time right now, so i wanted to have it fully working for a few days more until the migration Thanx guys!
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Hello! Better late than never... BAMT (R9 280X): Ubuntu 16.04 x64 with AMD GPUPRO drivers (R9 390): Linux BETA 3.0.1 is out. Only works with suprnova SSL pools currently. Non-SSL pool support will be added later. Links in OP. To get it running on Ubuntu 16.04 x64, you would need to install some packages. Do this: sudo apt-get install libssh2-1-dev:i386 libldap-2.4:i386 wget http://security.ubuntu.com/ubuntu/pool/universe/o/openssl098/libssl0.9.8_0.9.8o-7ubuntu3.2.14.04.1_i386.deb sudo dpkg -i libssl0.9.8_0.9.8o-7ubuntu3.2.14.04.1_i386.deb
PS: If you need some info from me, please send direct message. I don't have enough time to read all posts on this forum. Thanks! Sent you pm!
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GPU 3, GpuMiner dk2a failed -4
3 of my 6 gpus rig always throw me this error, but the specific gpu changes with each restart
Any clues?
Found the problem, i needed to raise windows virtual memory
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GPU 3, GpuMiner dk2a failed -4
3 of my 6 gpus rig always throw me this error, but the specific gpu changes with each restart
Any clues?
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What's the masternode value?
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I have reindexed and still no block source.
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:'(Was testing MSI RX580 8GB w/ Samsung memory tonight.
28.9mh/s with * amdgpu-pro 16.60 * 1150/2100mhz * Uber Mix 3.1
28.1 mh/s with * amdgpu-pro 17.10 drivers * 1150/2100mhz * Uber Mix 3.1
And not really stable at all.
Not sure why 17.10 drivers cause such a big drop in hash rate.. Started looking at the timings from the 470's with Samsung vs the 580 with Samsung, and all of the timings on the 580 are slower. trfc's and ras2ras are significant
Anyone have any bright ideas as to why?
Finally got it over 30mh. From uber 3.1 strap, I had to bump up trc, trfc, ras2ras, and clocks now 1185/2125, running stable. Seems like the 580's need a bit more core clock, but they do take a better undervolt, so power remains about the same. What's Uber Mix ?
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ETH: 04/29/17-17:09:50 - New job from eth-us-east1.nanopool.org:9999 ETH - Total Speed: 117.170 Mh/s, Total Shares: 27, Rejected: 0, Time: 00:21 ETH: GPU0 29.127 Mh/s, GPU1 29.127 Mh/s, GPU2 29.789 Mh/s, GPU3 29.127 Mh/s ETH: 04/29/17-17:09:53 - New job from eth-us-east1.nanopool.org:9999 ETH - Total Speed: 117.170 Mh/s, Total Shares: 27, Rejected: 0, Time: 00:21 ETH: GPU0 29.127 Mh/s, GPU1 29.789 Mh/s, GPU2 29.127 Mh/s, GPU3 29.127 Mh/s Unhandled signal in divisionErrorHandler() ./singleeth-nano-br.sh: line 7: 1598 Aborted (core dumped)
Lubuntu 16.04.2 amd gpu-pro 17.10
Any ideas?
Thanx Best regards!
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there is no 2250 strap, but nice card there if you can go over 2200mhz I'll check tomorrow, as it's so strange that the hashrate change happens exactly at that mem clock
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Original Samsung 4G ( your particular GPU ) 1625 555000000000000022CC1C00CE596B44D0570F1531CB2409004AE700 [ 0B03 | 1420 ] 7A8900A003000000170F2E36922A3217 --> MC_SEQ_MISC1 -- MR0 WL = 3, CL = 22, TM = 0, WR = 23, BA0 = 0, BA1 = 0, BA2 = 0, BA3 = 0 -- MR1 DS = 0, DT = 1, ADR = 1, CAL = 0, PLL = 0, RDBI = 0, WDBI = 0, ABI = 0, RES = 0, BA0 = 0, BA1 = 1, BA2 = 0, BA3 = 0
Original Samsung 4G 1750 777000000000000022CC1C0010626C49D0571016B50BD509004AE700 [ 1405 | 1420 ] 7A8900A003000000191131399D2C3617 --> MC_SEQ_MISC1 -- MR0 WL = 4, CL = 23, TM = 0, WR = 25, BA0 = 0, BA1 = 0, BA2 = 0, BA3 = 0 -- MR1 DS = 0, DT = 1, ADR = 1, CAL = 0, PLL = 0, RDBI = 0, WDBI = 0, ABI = 0, RES = 0, BA0 = 0, BA1 = 1, BA2 = 0, BA3 = 0
I think you are off by +1 with the MR0 CAS latency. SEQ_CAS_TIMING has CL=21(0x15) for the 1625 strap, and CL=22(0x16) for the 1750 strap. Excuse my ignorance, but where is a 22 or 21 on 0x2014030B, or a 23 or 22 on 0x20140514 ? 22 binary is 10110, 21 binary is 10101, 23 binary is 10111, none of those patterns are in any of those two numbers... what am i missing? The CAS latency in MR0 is just four bits (A3-A6), so it is based on a table lookup. H5GQ1H24AFR supported all possible latencies from 5 to 20. Micron's EDW4032BABG brief says "Programmable CAS latency: 6–27", so some latencies in the range cannot be programmed. I don't have a Samsung datasheet for the K4G4 series (or any Samsung for that matter), so I would have to reverse-engineer the values from the straps by comparing the MR0 values to CL from SEQ_CAS_TIMING. Timings samsung k4g80325FB 2000 777000000000000022CC1C0031F67E57F05711183FCFB60D006C070124081420FA8900A00300000 01E123A46DB354019 tcl: 24=>25 - MISC1: 0x20140824 0010 0000 0001 0100 0000 1000 0010 0100 1750 777000000000000022CC1C00106A6D4DD0571016B90D060C006AE70014051420FA8900A00300000 01B11333DC0303A17 tcl: 22=>23 - MISC1: 0x20140514 0010 0000 0001 0100 0000 0101 0001 0100 1625 555000000000000022CC1C00CE616C47D0570F15B48C250B006AE7000B031420FA8900A00300000 0190F2F39B22D3517 tcl: 21=>22 - MISC1: 0x2014030B 0010 0000 0001 0100 0000 0011 0000 1011 1500 555000000000000022CC1C00AD595B41C0570E14B00B450A0068C70003011420FA8900A00300000 0170E2B34A42A3116 tcl: 20=>21 - MISC1: 0x20140103 0010 0000 0001 0100 0000 0001 0000 0011 1375 333000000000000022CC1C008C515A3DC0570D132DCB74090048C7007A0014207A8900A00200000 0150D293197282E15 tcl: 19=>20 - MISC1: 0x2014007A 0010 0000 0001 0100 0000 0000 0111 1010 1250 333000000000000022CC1C004A494937B0570C12294A94080046A700720E14207A8900A00000000 0130B252D89252A14 tcl: 18=>19 - MISC1: 0x20140E72 0010 0000 0001 0100 0000 1110 0111 0010 1125 333000000000000022CC1C0029414831A0570C1125C9B3070046A6006A0C14206A8900A00000000 0110A21287B222614 tcl: 17=>18 - MISC1: 0x20140C6A 0010 0000 0001 0100 0000 1100 0110 1010 1000 333000000000000022CC1C000839372B90570B102148D30600448600620A14206A8900A00000000 00F091D236D1F2213 tcl: 16=>17 - MISC1: 0x20140A62 0010 0000 0001 0100 0000 1010 0110 0010 900 333000000000000022CC1C00E7B4362780570B0F9F072306002485005A091420DA8800A00000000 00E081A20621D2012 tcl: 15=>16 - MISC1: 0x2014095A 0010 0000 0001 0100 0000 1001 0101 1010 600 333000000000000022CC1C00A520241A40570B0B97051204002264003A051420CA8800A00000000 00906121541151810 tcl: 11=>12 - MISC1: 0x2014053A 0010 0000 0001 0100 0000 0101 0011 1010 400 333000000000000022CC1C006394121120570A091144B102002042002A021420AA8800A00000000 006040C0E2B10120F tcl: 9=>10 - MISC1: 0x2014022A 0010 0000 0001 0100 0000 0010 0010 1010 250 333000000000000022CC1C00628C110B10570A080EC3B00100204100220114209A8800A00000000 0040308091B0D0F0E tcl: 8=>9 - MISC1: 0x20140122 0010 0000 0001 0100 0000 0001 0010 0010 Hope it helps, boring part of the work done BTW, i think this bios has a 2250 strap also, once i get to 2250mhz mem it gets back to 26 mh even after copying 1750 straps to 2000 Comparing it seems bits 25-28 of misc1 are tcl-5 up until 1375 where it gets back to zero, then the only bit that changes in misc8 is bit 29 that turns to one in 1500 and stays on afterwards up to 2000, so that may be the msb
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Original Samsung 4G ( your particular GPU ) 1625 555000000000000022CC1C00CE596B44D0570F1531CB2409004AE700 [ 0B03 | 1420 ] 7A8900A003000000170F2E36922A3217 --> MC_SEQ_MISC1 -- MR0 WL = 3, CL = 22, TM = 0, WR = 23, BA0 = 0, BA1 = 0, BA2 = 0, BA3 = 0 -- MR1 DS = 0, DT = 1, ADR = 1, CAL = 0, PLL = 0, RDBI = 0, WDBI = 0, ABI = 0, RES = 0, BA0 = 0, BA1 = 1, BA2 = 0, BA3 = 0
Original Samsung 4G 1750 777000000000000022CC1C0010626C49D0571016B50BD509004AE700 [ 1405 | 1420 ] 7A8900A003000000191131399D2C3617 --> MC_SEQ_MISC1 -- MR0 WL = 4, CL = 23, TM = 0, WR = 25, BA0 = 0, BA1 = 0, BA2 = 0, BA3 = 0 -- MR1 DS = 0, DT = 1, ADR = 1, CAL = 0, PLL = 0, RDBI = 0, WDBI = 0, ABI = 0, RES = 0, BA0 = 0, BA1 = 1, BA2 = 0, BA3 = 0
I think you are off by +1 with the MR0 CAS latency. SEQ_CAS_TIMING has CL=21(0x15) for the 1625 strap, and CL=22(0x16) for the 1750 strap. Excuse my ignorance, but where is a 22 or 21 on 0x2014030B, or a 23 or 22 on 0x20140514 ? 22 binary is 10110, 21 binary is 10101, 23 binary is 10111, none of those patterns are in any of those two numbers... what am i missing? The CAS latency in MR0 is just four bits (A3-A6), so it is based on a table lookup. H5GQ1H24AFR supported all possible latencies from 5 to 20. Micron's EDW4032BABG brief says "Programmable CAS latency: 6–27", so some latencies in the range cannot be programmed. I don't have a Samsung datasheet for the K4G4 series (or any Samsung for that matter), so I would have to reverse-engineer the values from the straps by comparing the MR0 values to CL from SEQ_CAS_TIMING. Timings samsung k4g80325FB 2000 777000000000000022CC1C0031F67E57F05711183FCFB60D006C070124081420FA8900A00300000 01E123A46DB354019 tcl: 24=>25 - MISC1: 0x20140824 0010 0000 0001 0100 0000 1000 0010 0100 1750 777000000000000022CC1C00106A6D4DD0571016B90D060C006AE70014051420FA8900A00300000 01B11333DC0303A17 tcl: 22=>23 - MISC1: 0x20140514 0010 0000 0001 0100 0000 0101 0001 0100 1625 555000000000000022CC1C00CE616C47D0570F15B48C250B006AE7000B031420FA8900A00300000 0190F2F39B22D3517 tcl: 21=>22 - MISC1: 0x2014030B 0010 0000 0001 0100 0000 0011 0000 1011 1500 555000000000000022CC1C00AD595B41C0570E14B00B450A0068C70003011420FA8900A00300000 0170E2B34A42A3116 tcl: 20=>21 - MISC1: 0x20140103 0010 0000 0001 0100 0000 0001 0000 0011 1375 333000000000000022CC1C008C515A3DC0570D132DCB74090048C7007A0014207A8900A00200000 0150D293197282E15 tcl: 19=>20 - MISC1: 0x2014007A 0010 0000 0001 0100 0000 0000 0111 1010 1250 333000000000000022CC1C004A494937B0570C12294A94080046A700720E14207A8900A00000000 0130B252D89252A14 tcl: 18=>19 - MISC1: 0x20140E72 0010 0000 0001 0100 0000 1110 0111 0010 1125 333000000000000022CC1C0029414831A0570C1125C9B3070046A6006A0C14206A8900A00000000 0110A21287B222614 tcl: 17=>18 - MISC1: 0x20140C6A 0010 0000 0001 0100 0000 1100 0110 1010 1000 333000000000000022CC1C000839372B90570B102148D30600448600620A14206A8900A00000000 00F091D236D1F2213 tcl: 16=>17 - MISC1: 0x20140A62 0010 0000 0001 0100 0000 1010 0110 0010 900 333000000000000022CC1C00E7B4362780570B0F9F072306002485005A091420DA8800A00000000 00E081A20621D2012 tcl: 15=>16 - MISC1: 0x2014095A 0010 0000 0001 0100 0000 1001 0101 1010 600 333000000000000022CC1C00A520241A40570B0B97051204002264003A051420CA8800A00000000 00906121541151810 tcl: 11=>12 - MISC1: 0x2014053A 0010 0000 0001 0100 0000 0101 0011 1010 400 333000000000000022CC1C006394121120570A091144B102002042002A021420AA8800A00000000 006040C0E2B10120F tcl: 9=>10 - MISC1: 0x2014022A 0010 0000 0001 0100 0000 0010 0010 1010 250 333000000000000022CC1C00628C110B10570A080EC3B00100204100220114209A8800A00000000 0040308091B0D0F0E tcl: 8=>9 - MISC1: 0x20140122 0010 0000 0001 0100 0000 0001 0010 0010 Hope it helps, boring part of the work done BTW, i think this bios has a 2250 strap also, once i get to 2250mhz mem it gets back to 26 mh even after copying 1750 straps to 2000
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It's based on the 1625 strap, since the 1500 strap wasn't stable for me beyond 1875.
That's very strange, I have several rx with hynix and the 1500 strap is the most stable at least up to 2050. Maybe your cards have better cooling for the RAM? This is an Asus Strix. After tuning the 1625 strap, it was stable at ~27.2Mh with a 1950 mem clock. Now I'm testing 2000. If it's a Strix you might have memory voltage control, have you tried/checked this? I believe their custom VRM chip does control the memory voltage, but I haven't looked into it much. Since the RAM is not cooled (no thermal connection to the heatsink), I thought bumping the memory voltage would make things worse. The tuned 1625 strap is working quite well so far. It tested OK at 2000, and now I'm trying 2050. Once I've found the limit, I may look into the memory voltage to control power use, and see if it is stable with lower memory voltages. I have a Strix, pretty sure it doesn't work. EDIT: Wait... wait... there's something here.... Be careful! It may bite!!
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So I need to update MC_SEQ_MISC1, offset 54 in the hex string of the strap (offset 27 in bytes). Are the 3 hex chars at offset 55-57 the 12 bits for MR0, or is that MR1 and MR0 is 59-61? I know I could figure it out by comparing different straps and seeing how the bits map to the register values, but since you seem to have already figured it out...
Original Samsung 4G ( your particular GPU ) 1625 555000000000000022CC1C00CE596B44D0570F1531CB2409004AE700 [ 0B03 | 1420 ] 7A8900A003000000170F2E36922A3217 --> MC_SEQ_MISC1 -- MR0 WL = 3, CL = 22, TM = 0, WR = 23, BA0 = 0, BA1 = 0, BA2 = 0, BA3 = 0 -- MR1 DS = 0, DT = 1, ADR = 1, CAL = 0, PLL = 0, RDBI = 0, WDBI = 0, ABI = 0, RES = 0, BA0 = 0, BA1 = 1, BA2 = 0, BA3 = 0
Original Samsung 4G 1750 777000000000000022CC1C0010626C49D0571016B50BD509004AE700 [ 1405 | 1420 ] 7A8900A003000000191131399D2C3617 --> MC_SEQ_MISC1 -- MR0 WL = 4, CL = 23, TM = 0, WR = 25, BA0 = 0, BA1 = 0, BA2 = 0, BA3 = 0 -- MR1 DS = 0, DT = 1, ADR = 1, CAL = 0, PLL = 0, RDBI = 0, WDBI = 0, ABI = 0, RES = 0, BA0 = 0, BA1 = 1, BA2 = 0, BA3 = 0
I think you are off by +1 with the MR0 CAS latency. SEQ_CAS_TIMING has CL=21(0x15) for the 1625 strap, and CL=22(0x16) for the 1750 strap. Excuse my ignorance, but where is a 22 or 21 on 0x2014030B, or a 23 or 22 on 0x20140514 ? 22 binary is 10110, 21 binary is 10101, 23 binary is 10111, none of those patterns are in any of those two numbers... what am i missing?
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seriously guys , leave aside cherry picked cards and post something that can run for at least 48 hours with 5/6 similar cards all running exactly same clocks and hashing at similar speed . Getting that is the farm administrator work, they're already posting lots of hard to get info
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Sometimes loosening the timings is better, and clocking higher - specifically on Eth.
I've seen you mention loosening the CAS timings. I tried bumping up tCL by 1, but still get crashes on the K4G4 at 2100. So is it just loosening tCL that usually does the trick, or something else too? You have to loosen it on the DRAM, too - you're loosening the tCL on the ASIC, but not the DRAM, throwing them off. Weren't the straps that control the dram settings precisely? You have to change values somewhere else?
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I want to jump on editing the straps, so far i have a general idea of what each of the values mean and i'll use the cheatsheet at http://www.tweakers.fr/timings.html#tRP once i can get to edit them, but i'm not sure on how to get the info for my specific memory to know where is each of the memory timings. Where should i start? Thanx guys! Best regards
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Going forward again, 14000 and 14001 found
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15 blocks to fork fingers crossing
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Stock GTX 1070 = 360 Sol/s @ 150 W OC GTX 1070 (clock @ 2050, mem @ 4500) = 410 Sol/s @ 170 W Efficient GTX 1070 (TDP 50%, mem @ 4500) = 330 Sol/s @ 95 W dead AMD its near Nvidia rules 35% more expensive for 35% more hash. We know. You are not unleashing secrets here... wrong, cost double of a 470 but it hash at double the speed or near that, the difference is the efficiency which is far greater my 470 nitro 8g samsung mem are doing 260 each when properly tuned, so eff is lower but hashrate is more than half the 1070's still not worth it because of density, better to have 4 rig than 9 rig doing the same, you waste money on uselesses components on large scale the 1070 win without doubts Nice point, motherboard, memory, disk and risers also have costs, structure, physical space, heat dissipation So if you have cheap electricity and physical space, it may be better to go with 470's cause the heat dissipation is much less of a problem so 1 motherboard with 6 1070 is no match vs 2 motherboards with 12 470's, but if you have both those problems then 1070's are better.
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Stock GTX 1070 = 360 Sol/s @ 150 W OC GTX 1070 (clock @ 2050, mem @ 4500) = 410 Sol/s @ 170 W Efficient GTX 1070 (TDP 50%, mem @ 4500) = 330 Sol/s @ 95 W dead AMD its near Nvidia rules 35% more expensive for 35% more hash. We know. You are not unleashing secrets here... wrong, cost double of a 470 but it hash at double the speed or near that, the difference is the efficiency which is far greater my 470 nitro 8g samsung mem are doing 260 each when properly tuned, so eff is lower but hashrate is more than half the 1070's Could you share yours settings and BIOS ? I have the same card but only 240 sol/s. I don't have the bios file at hand, but the only thing i did was use the 1750 straps for 2000 mhz. For zec, with wattool i took the gpu to 1420 and left the memory at 2000, i had to give them like around 50mv overvolt, but even with the straps mod i could downvolt the mem to 0.95 so it's not much of a difference with the default tdp. For Eth, i left the gpu at 1360 and instead took the mem to 2190, i had to do some serious overvolt there, 1.12, not all of them reached 2190, some did 2180, but they ended throwing 30.3mh/s on eth, stable, several days now. No dual mining. Hope it helps!
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