OpenCore has a open-soruce SHA core...

[em3rgentOrdr]

I was browsing OpenCores.org and saw that they have an open-source GPL SHA crypto cores:

Description

This is a collection of SHA(Secure Hash Algorithm) cores. These include SHA-1, SHA-2 algorithms.
These cores are non-pipelined version of SHA, and have simple interfaces with the host side.

Overview

• Category: Crypto core
• Language: Verilog
• Development status: Beta
• Additional info: Design done
• WishBone Compliant: No
• License: LGPL

Features

• Support SHA-1(160), SHA-2(256/384/512)
• Use a simple 32-bit I/O bus interface
• High performance
• Share hardware between different SHA processing
• Can operate up to 200MHz at 0.18um Standard cell design
• Written in VerilogHDL

You can download it here.  I'm thinking that it would be cool if someone put this on an FPGA (or even fabricated it) and have it set to constantly generate SHA hashes to find bitcoins .  Probably wouldn't be as fast as a TESLA running CUDA bitcoin generation, but the idea of having a dedicated bitcoin generator piece of hardware sounded cool to me .

Anyone have an FPGA and want to try this out?

(update: here's another free crypto core - Nugroho Free Hash Cores (NFHC) currently support SHA-1, SHA-256, SHA-512 from FIPS-180 standard.)

[nelisky]

I've been meaning to dive into FPGAs for too long now... if there are no takers that have both the hardware and the time/inclination, I can be bribed into doing this in exchange for a dev board donation

I'm just saying...

In fact, this could be the start of a company selling bitcoin generators

[sgtstein]

Problem for me is, I've got the hardware and software(got it to try this) but haven't been good enough with VHDL to figure out how to interface it between that and Bitcoin.

[nelisky]

Problem for me is, I've got the hardware and software(got it to try this) but haven't been good enough with VHDL to figure out how to interface it between that and Bitcoin.

hmmm, for testing I would probably get a UART core and feed the half baked hash, the initial nonce and the 256bit min hash value. It would do one set of parallel hash calculations for incrementing nonces and return the nonce with the lowest hash. This would make interfacing with bitcoin pretty easy, especially after svn r154.

[em3rgentOrdr]

I don't have an FPGA, or else I would do it myself...I'd like to see what type of results other people get...

On a related note, the recently released (Sept 20, 2010) Sparc T3 chip has 16 cores, each with a hardware cryptographic accelerator and 8 hardware threads per core...  I'm wondering how many Hashes/Sec you could get out of a T3 Server .  (on another related note, it is too bad that since Oracle bought Sun, now all their stuff is closed-source...the Sparc T1 and T2 were open-sourced GPL...)

[LZ]

*&^%$# Oracle

[Cdecker]

*&^%$# Oracle

+1