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Author Topic: ethereum mining with FPGA or AISC is possible  (Read 9919 times)
nonamenomoney (OP)
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March 20, 2016, 03:53:26 PM
 #1

We have already analyzed the software (including cpu and GPU) code of the ethereum  miner.  And the miner is possible to be implemented with AISC. The FPGA  prototype of the miner will be completed soon.  Furthermore, the AISC design of the miner has been put on the agenda of our team.
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adaseb
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March 20, 2016, 04:58:42 PM
 #2

He is also spamming the Ethereum forum with this nonsense.

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HagssFIN
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March 20, 2016, 05:01:13 PM
 #3

This is probably the worst so called "manufacturer thread" start ever. Full of jibberish nonsense

takagari
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March 20, 2016, 06:52:18 PM
 #4

I know what an ASIC is, what's an AISC?
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March 20, 2016, 07:33:19 PM
 #5

He is also spamming the Ethereum forum with this nonsense.

+1
AISC, sound scary.

ASIC is totally possible, but what's the point with Eth going PoS soonish? Also, i'm not a low level code/hardware engineering so i can't say in full certainty, but i'm fairly sure the cost for development would be high and take quite some time. It sound like a stupid venture. Eth could die, if it doesnt, ASIC will become useless at PoS/algo update. People may even flat out agree to change algo if an ASIC come by.

Anyways, when you spam this stuff and you can't even get the term's acronym written right, you dont have much credibility.


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ALBORCA
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April 16, 2016, 05:21:28 AM
 #6

wait give him a chance to explain

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Quartx
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April 16, 2016, 05:23:09 AM
 #7

We have already analyzed the software (including cpu and GPU) code of the ethereum  miner.  And the miner is possible to be implemented with AISC. The FPGA  prototype of the miner will be completed soon.  Furthermore, the AISC design of the miner has been put on the agenda of our team.

POS bro... By the time your ASIC (or your AISC) comes out, you wont need it anymore

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April 16, 2016, 06:27:03 AM
 #8

We have already analyzed the software (including cpu and GPU) code of the ethereum  miner.  And the miner is possible to be implemented with AISC. The FPGA  prototype of the miner will be completed soon.  Furthermore, the AISC design of the miner has been put on the agenda of our team.

POS bro... By the time your ASIC (or your AISC) comes out, you wont need it anymore

it may be redirected to another dag coin, there are plenty out there
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April 16, 2016, 07:21:57 AM
 #9

FPGA might be doable in the timeframe Ethereum has left before it goes PoS - ASIC forget it.


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