Bitcoin Forum
November 10, 2024, 10:09:19 AM *
News: Latest Bitcoin Core release: 28.0 [Torrent]
 
   Home   Help Search Login Register More  
Pages: « 1 [2]  All
  Print  
Author Topic: FYI Intel & Altera to Build Next-Generation FPGAs on Intel's 14 nm Tri-Gate Tech  (Read 3677 times)
RoadStress
Legendary
*
Offline Offline

Activity: 1904
Merit: 1007


View Profile
February 28, 2013, 08:44:26 PM
 #21

So this means we will be stuck? No more evolution? I said i don't care about the money because i am only interested in the technical aspect. From what you are saying maybe Intel and the other fabs will just stop at 10 or 5 nm for example, but something else must come next. We must keep evolving so i just wanted to know what could be next.

crazyates
Legendary
*
Offline Offline

Activity: 952
Merit: 1000



View Profile
February 28, 2013, 09:41:12 PM
 #22

The next step is making chips comprised of millions of silicon layers, as opposed to just 10 or so. With each "layer" being a few nanometers thick, that leaves us a relatively big margin to improve performance (30 years of Moore's Law).
I thought the reason they keep it "simple" at only a few layers was heat? You can't just stack layers a half an inch thick, and expect to cool the entire chip evenly.

Tips? 1crazy8pMqgwJ7tX7ZPZmyPwFbc6xZKM9
Previous Trade History - Sale Thread
firefop
Sr. Member
****
Offline Offline

Activity: 420
Merit: 250


View Profile
February 28, 2013, 10:19:33 PM
 #23

Explain like I'm 5 anyone? How does this help bitcoin mining? Do these serve for mining just as well as "asics"? How do they improve on the structure?

Basically it's possible that if this technology is mass produced and becomes cheap enough... quick enough... that we'll be able to see multiple fpga products that will give existing asics a run for the money.
 
It really depends on how cheaply they're available.

Magnate
Member
**
Offline Offline

Activity: 88
Merit: 10


View Profile
February 28, 2013, 11:56:45 PM
 #24

We've already seen how everything will get faster-more core in the one chip.

The chips are so small and heat such a non issue that they just put more cores into the chip. More cores produce more heat which then brings you back tot he same cooling requirements of the larger process chips.
But yes also means coming back to the same power usage per chip, but that chip does more because there are more processing units.

So they might make these 14Nm FPGAs the same wafer size, but with more transistors allowing more engines. So they might be able to compete speed wise with the better ASICs miners, but because they needed more hashing units to do it will they still be in the same power window?

The FPGAs might be a technology step ahead because of their wider commercial applications, but who knows in 2 years time BFL might also get access to the 14Nm process for their ASICs to jump ahead of the market and crush the FPGAs again just like they are with current FPGAs

Maybe somebody will take a new FPGA, put it on a PCB, and program it. I just hope they plan to be out of business within a year or two such is the tech market these days.
mrb
Legendary
*
Offline Offline

Activity: 1512
Merit: 1028


View Profile WWW
March 01, 2013, 02:00:28 AM
 #25

The next step is making chips comprised of millions of silicon layers, as opposed to just 10 or so. With each "layer" being a few nanometers thick, that leaves us a relatively big margin to improve performance (30 years of Moore's Law).
No doubt this allows for an increase in density and more efficient 3-dimensional routing. But how much will this help power consumption?

Reducing voltages? Using superconductivity? Using photons instead of electrons? If I knew, I would be founding the next "Intel" company! Smiley
||bit
Hero Member
*****
Offline Offline

Activity: 924
Merit: 506


View Profile
March 01, 2013, 02:39:42 AM
 #26

The next step is making chips comprised of millions of silicon layers, as opposed to just 10 or so. With each "layer" being a few nanometers thick, that leaves us a relatively big margin to improve performance (30 years of Moore's Law).
No doubt this allows for an increase in density and more efficient 3-dimensional routing. But how much will this help power consumption?

It seems that 3D architecture would miss the original spirit of Moore's Law. Moore's Law pertained to how many transistors could be put onto an IC component. But the prediction was done at the time with the understanding that IC chips were single layers of integrated transistors (2D).

Going vertical with transistors in the architecture doesn't really increase the density of the transistors per each 2D layer. And doesn't even really increase the transistor density by being in 3D space. Well, no more than cutting an iron plate and stacking it increases the density of the iron atoms in the whole.

The only thing is that you do have more transistors on a single component, and only in that sense is it a semblance of Moore's Law. But I think it still misses the mark of what Moore was thinking. I could be wrong, but that's the way I understand it.



Phinnaeus Gage
Legendary
*
Offline Offline

Activity: 1918
Merit: 1570


Bitcoin: An Idea Worth Spending


View Profile WWW
March 01, 2013, 03:06:05 AM
 #27

http://singularityhub.com/2012/12/10/scientists-create-artificial-brain-with-2-3-million-simulated-neurons/
Evan
Hero Member
*****
Offline Offline

Activity: 507
Merit: 500



View Profile
March 01, 2013, 02:32:57 PM
 #28

"Products are targeted at ultra high-performance systems such as military, wireline communications and cloud networking.

Intel has announced that it has reached an agreement with PLD (Programmable logic device) manufacturer Altera to product FPGAs (Field-programmable gate array) on Intel's 14 nm tri-gate transistor technology. According to the announcement, these next generation products will enable breakthrough levels of performance and power efficiencies not otherwise possible and further the company's ability to deliver on the promise of silicon convergence by delivering a more flexible and economical alternative to traditional ASICs and ASSP."

FYI



Source

tried to get a more statistics out of Altera....

Need more info on engineering specs.... ifs its really that big of a game changer..... why am I not requesting samples?

I am poor, but i do work for Coin Smiley
1PtHcavXoakgNkQfEQdvnvEksEY2NvwaLM
firefop
Sr. Member
****
Offline Offline

Activity: 420
Merit: 250


View Profile
March 16, 2013, 04:15:44 AM
 #29

The next step is making chips comprised of millions of silicon layers, as opposed to just 10 or so. With each "layer" being a few nanometers thick, that leaves us a relatively big margin to improve performance (30 years of Moore's Law).
I thought the reason they keep it "simple" at only a few layers was heat? You can't just stack layers a half an inch thick, and expect to cool the entire chip evenly.

Negative - you can go pretty deep. There are even some chip designs that interleave metallic layers to transmit heat out from deep chips.

Puppet
Legendary
*
Offline Offline

Activity: 980
Merit: 1040


View Profile
March 16, 2013, 08:50:53 AM
 #30


tried to get a more statistics out of Altera....

Need more info on engineering specs.... ifs its really that big of a game changer..... why am I not requesting samples?

Do you realize all that altera announced is that they will use intel's upcoming 14nm process? We are several years away from seeing those chips, the fabs still have to built afaik, the node isnt ready, the design of the fpga most likely has not even have begun.  Even intel itself is not expected to be delivering 14nm chips until next year, I wouldnt expect altera to ship a 14nm product in volume until 2015 or 2016.
Pages: « 1 [2]  All
  Print  
 
Jump to:  

Powered by MySQL Powered by PHP Powered by SMF 1.1.19 | SMF © 2006-2009, Simple Machines Valid XHTML 1.0! Valid CSS!