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Author Topic: Exploring existing chips/soc/processor for bitcoin mining  (Read 4016 times)
papamoi
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March 24, 2013, 03:32:58 PM
 #1

hi guys,

i m planning to make build bitcoin mining device with speed similar or better than asic and would need technical helps for this.

as you know we are running after time and the idea is to use programmable existing chips in the markets to achieve this.

i need people who have experience in this already and have ideas so we can start/finish it very quickly

Anyone who have experiences are welcome,please contact me thru pm

thanks
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Photon939
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March 24, 2013, 03:40:47 PM
 #2

This has already been done, it's called FPGAs. They have been made obsolete like the units released by Avalon and BFL (if BFL ever gets around to shipping anything)

At this point, custom silicon is pretty much required to match Avalon level performance at a competitive price.
papamoi
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March 24, 2013, 03:42:15 PM
 #3

there is lot of new chips have came to markets since

maybe there is way to improve this?
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March 24, 2013, 03:42:25 PM
 #4

The question is: have FPGA miners had time to evolve to their technical limits, or the ASIC race took away the resources? Is there room for improvement for FPGAs? By improvement, I mean $s/hash, J/hash, or both.

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Photon939
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March 24, 2013, 03:44:26 PM
 #5

The question is: have FPGA miners had time to evolve to their technical limits, or the ASIC race took away the resources? Is there room for improvement for FPGAs? By improvement, I mean $s/hash, J/hash, or both.

There is certainly room for improvement for FPGAs, but the main problem is that as you go up in FPGA performance their price goes up very quickly. A very modern FPGA may be able to beat Avalon in terms of Mhash/W but would cost thousands of dollars just for the chip, let alone the board and supporting components, housing, power supply, etc.
papamoi
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March 24, 2013, 03:46:27 PM
 #6

hi photon

could give a rough estimate in time and dollar of a machine based on recent chip to achieve something around 100 giga/s/system?

thanks
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March 24, 2013, 04:23:18 PM
 #7

The most profitable FPGA costs about 75 € the cheapest you can get, while an ASIC Avalon is around 5 € if you do the math.
That is unbeatable by any other programmable chip.
Photon939
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March 24, 2013, 04:27:52 PM
 #8

hi photon

could give a rough estimate in time and dollar of a machine based on recent chip to achieve something around 100 giga/s/system?

thanks


Taking a look at Mouser, an Altera Stratix V, a 28nm FPGA with 2560 logic blocks (the smallest in the Stratix IV family they sell) has a chip price of $8,317.00 PER CHIP, with no quantity discounts.

I have no experience with programming FPGAs, but lets say you get 10x the performance of the local community favorite the Spartan 6 LX150 FPGA, while using 1/5th the power requirement. (basically impossible with only 2560 logic blocks)

This gives you 4 GH/s per chip while consuming 4W (keep in mind im pulling these numbers out of my ass), 1GH/J this puts you on par with BFL's estimates for power consumption.

Problem is, you unit now costs $124,755 JUST FOR THE FPGAs. To be comparable with a BFL Single in speed and power consumption.

papamoi
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March 24, 2013, 04:28:36 PM
 #9

atg,

the price avalon is selling is no longer the same and beside you have to wait 2 months to get it

so my math is quickly done unless someone can find these asic in wholesale and we could find assemblers for this

papamoi
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March 24, 2013, 04:33:43 PM
 #10

hi photon

could give a rough estimate in time and dollar of a machine based on recent chip to achieve something around 100 giga/s/system?

thanks


Taking a look at Mouser, an Altera Stratix V, a 28nm FPGA with 2560 logic blocks (the smallest in the Stratix IV family they sell) has a chip price of $8,317.00 PER CHIP, with no quantity discounts.

I have no experience with programming FPGAs, but lets say you get 10x the performance of the local community favorite the Spartan 6 LX150 FPGA, while using 1/5th the power requirement. (basically impossible with only 2560 logic blocks)

This gives you 4 GH/s per chip while consuming 4W (keep in mind im pulling these numbers out of my ass), 1GH/J this puts you on par with BFL's estimates for power consumption.

Problem is, you unit now costs $124,755 JUST FOR THE FPGAs. To be comparable with a BFL Single in speed and power consumption.



i need real and sourced numbers not speculation so if someone have them please let me know

thanks
papamoi
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March 24, 2013, 04:41:31 PM
 #11

The most profitable FPGA costs about 75 € the cheapest you can get, while an ASIC Avalon is around 5 € if you do the math.
That is unbeatable by any other programmable chip.

are you basing your calculation on recent chips?

there was many new chips came to markets since these last 3/6 months

did you done your maths with the recent one ,came in march?

did you done with soc?or with assp?

thanks
Photon939
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March 24, 2013, 05:12:59 PM
 #12

hi photon

could give a rough estimate in time and dollar of a machine based on recent chip to achieve something around 100 giga/s/system?

thanks


Taking a look at Mouser, an Altera Stratix V, a 28nm FPGA with 2560 logic blocks (the smallest in the Stratix IV family they sell) has a chip price of $8,317.00 PER CHIP, with no quantity discounts.

I have no experience with programming FPGAs, but lets say you get 10x the performance of the local community favorite the Spartan 6 LX150 FPGA, while using 1/5th the power requirement. (basically impossible with only 2560 logic blocks)

This gives you 4 GH/s per chip while consuming 4W (keep in mind im pulling these numbers out of my ass), 1GH/J this puts you on par with BFL's estimates for power consumption.

Problem is, you unit now costs $124,755 JUST FOR THE FPGAs. To be comparable with a BFL Single in speed and power consumption.



i need real and sourced numbers not speculation so if someone have them please let me know

thanks


Sorry to disappoint you, but while my numbers are "speculation" they give you a ballpark that tells you that the goal you want to accomplish is basically impossible.

Unless you want to go spin custom silicon at 65nm or lower, you will probably not be able to turn a profit, and that's assuming very good competence in the industry.
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March 24, 2013, 06:50:45 PM
 #13

Has anyone used the Stratix V for mining. What sort of mining speed can be done on it? I know they are expensive, but once it is working on this, how much does it cost to get a Hard Copy made and what are the min numbers for chips to be made.

Also the same with Virtex-6 and Virtex-7, then getting chips made with Easy Path?

I'm assuming this is what Avalon did with their chips. Or something similar anyway.

Phil



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r.willis
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March 24, 2013, 07:33:48 PM
 #14

The only alternative to reals ASICs is structured ASICs. Faster time-to-market, but not as efficient as custom ASIC.

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aTg
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March 24, 2013, 07:38:27 PM
 #15

The only alternative to reals ASICs is structured ASICs. Faster time-to-market, but not as efficient as custom ASIC.

Avalon is a structured asic.
300MH/s for chip, only 44MH/s more than a Spartan6 FPGA
papamoi
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March 24, 2013, 07:50:08 PM
 #16

The only alternative to reals ASICs is structured ASICs. Faster time-to-market, but not as efficient as custom ASIC.

Avalon is a structured asic.
300MH/s for chip, only 44MH/s more than a Spartan6 FPGA

so where to get these?and for yesterday?
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March 24, 2013, 07:55:38 PM
 #17

I believe Avalon is not a sASIC (hard copy), but rather is a "standard cell" ASIC.

Speaking of exploring new processors, I think it would be interesting to see how the upcoming Parallella platform does for Bitcoin mining (or Litecoin).  I don't expect it will be any kind of breakthrough performance, but it would still be interesting to try.

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March 24, 2013, 08:15:08 PM
 #18

The only alternative to reals ASICs is structured ASICs. Faster time-to-market, but not as efficient as custom ASIC.

Avalon is a structured asic.
300MH/s for chip, only 44MH/s more than a Spartan6 FPGA

so where to get these?and for yesterday?


They won't just give you their design, you'd have to create your own.
r.willis
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March 24, 2013, 08:34:09 PM
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Structured ASICs use same/similar tools as FPGA. Languages used to program them are the same used for FPGAs, so existing designs are easy to port (may be with minor adaptations/tuning).
You can find out where to get hardware if you follow link a gave earlier.

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papamoi
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March 24, 2013, 08:36:42 PM
 #20

Structured ASICs use same/similar tools as FPGA. Languages used to program them are the same used for FPGAs, so existing designs are easy to port (may be with minor adaptations/tuning).
You can find out where to get hardware if you follow link a gave earlier.

between the 3 names wich one you suggest?

beside also there is lot of ip cores available for sha256 logic so you have to buy design tweak/tune it and you are ready to go

(i m not techie)so i can be wrong
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