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Author Topic: Wanted: FPGA programmer for custom Virtex-6 platform  (Read 670 times)
bitminter (OP)
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March 28, 2013, 01:57:55 PM
 #1

I'm looking for someone with the tools and experience to create an FPGA for Virtex-6 based mining hardware.  Here's the deal:  The company I work for creates very fast custom hardware for the product we sell.

We build about 2 dozen prototype boards that end up sitting on the shelf when we're done developing the hardware.  I write drivers for these products so I'm very familiar with the architecture and programming but I'm no FPGA designer.

I'm looking for a partner who's interested in writing a bitcoin miner for the Virtex-6 on this board.  I will run the system in our lab and you will receive part of the proceeds.

We normally run these systems for years in our labs, so they may as well be mining bitcoin.  I estimate these Virtex-6 parts should be able to do 800 Mh/s with ease.  As I said, I have access to at least 2 dozen prototype systems.  So we should be able to generate over 19200 Mh/s.

The system are Virtex-6 based with Core i7 processors running CentOS.  The processor is connected to the Xilinx via Gen2 PCIe (not that we would need the I/O performance, but that's how it's designed)

I will provide a device pinnout file (since that can not change), partial schematics, and remote access to a development system. 

I will handle pushing the bitstream to the device at boot and the device driver, and you will either port some open source FPGA code, or write your own for this device.  You'll need your own resources to compile and simulate the FPGA.

Contact me if interested.
writhe
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March 28, 2013, 05:43:50 PM
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Which Virtex-6 parts are you using?

With a SX475 you can get to ~800 Mh/s if you can supply the power.

I can supply an existing FPGA design if you are interested.
kintex_wibble
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March 29, 2013, 06:25:52 PM
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I may be up for this, I'm just getting started with a Kintex7 board, serial interface initially but PCIe is a possibility - my s/w skills aren't up to driver writing so some leverage of synergies possible.
Any pointers to working multicore xilinx designs (vhdl or verilog) with s/w support would be appreciated.
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