nebiz
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April 15, 2013, 03:24:36 PM |
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Sounds good, what other conditions do you require to back the project?
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tips: 1KY4hsybyqpTdxy8nSXh3KUKRi8jeGH8Jx
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Mats8500
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April 15, 2013, 07:58:24 PM |
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So when you say community asic project, are you thinking about something like AsicMiner?
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Lacan82
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April 16, 2013, 11:19:01 AM |
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Interesting still which I was at my old job. They were manufacture...they built lens crafting equipment. We had an R&D department that I could of asked questions too
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atcsecure (OP)
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April 16, 2013, 12:18:02 PM |
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So when you say community asic project, are you thinking about something like AsicMiner?
No, I was thinking that the would be in the hands of the investors, but I'm not opposed to an idea like as asicminer
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Join the revolution - XC - Decentralized Trustless Multi-Node Private Transactions
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mrb
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April 16, 2013, 11:54:41 PM |
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ASIC costs literally millions of dollars to develop, I wish you the best of luck though you will have a pretty long road to get there.
No it doesn't. Avalon designed a 110nm ASIC with NRE costs around $200-300k.
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papamoi
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April 17, 2013, 04:42:01 AM |
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i m working on similar thing but it seems not an easy task....
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Viceroy
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April 17, 2013, 11:43:11 PM |
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where we at OP?
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nebiz
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April 20, 2013, 10:50:38 PM |
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I am also interested in contributing to this. I think we can get a much smaller quantity of asic chips by using what is essentially a cybershuttle program: http://www.tsmc.com/english/dedicatedFoundry/services/cyberShuttle.htmTaiwan semiconductor offers this, and the original 4000 chip run for avalon run 1 was done using this service as far as I can tell. That should bring the cost down to $20,000-$40,000 if the FPGA conversion can done on the cybershuttle service. Thoughts? I'll have the final cost numbers on doing it through this program Tuesday/Wednesday, there are several solutions that offer a lower NRE like this, I'm compiling the data from them all will, different solutions will produce different results (hash speed/heat/power consumption) and different cost Any word? I know there are a number of these prototyping "shuttle" fab houses, but I do not know the process they use to consolidate each individual contributor's design into a completed "composite" design for the shared ASIC chip.
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Phinnaeus Gage
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April 20, 2013, 11:01:30 PM |
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I quit reading after "okay, I'm just throwing down an idea..."
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shibaji
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April 20, 2013, 11:24:01 PM |
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Do we run this idea by local community college first ?
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Phinnaeus Gage
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April 20, 2013, 11:26:47 PM |
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Do we run this idea by local community college first ?
okay, u got me on that 1
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Viceroy
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April 20, 2013, 11:32:06 PM |
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Do we run this idea by local community college first ? Yea, lots of EE PhD's at the local CC! OP went off and ordered himself some Avalon chips. Join the project in my signature.
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Signus
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April 21, 2013, 10:00:02 AM |
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See, while I enjoy the thought of that, I don't think there are too many EE's, excluding myself, on these forums.
I'm not trying to be a downer, and I want people to learn, but I just see a lot of people with no design experience, or even electronics experience throwing down tons of money to start a project they truly don't know how to start. Plus many of them think that it will be the same process as for a FPGA or that they can "use" the open source FPGA designs to begin their initial designs.
Again, not trying to be pessimistic. If you are dedicated and are willing to commit the time and effort to make the project work, and learn (quickly) along the way, you will do well.
We Engineers must unite in a thread or Google Hangout and share our ideas or something of the like and bring it back here to the forums. I think that would be effective.
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atcsecure (OP)
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April 22, 2013, 11:46:30 AM |
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With the avalon chip hitting the mass's sooner or late, I've been working on some PCB designs for them...
for this gen 2 asic design, for $5mil we could design/build a very fast chip, for $500k a slow chip :-) - but I don't think there is enough support to get this off the ground ATM
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Signus
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April 22, 2013, 11:50:13 AM |
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With the avalon chip hitting the mass's sooner or late, I've been working on some PCB designs for them...
for this gen 2 asic design, for $5mil we could design/build a very fast chip, for $500k a slow chip :-) - but I don't think there is enough support to get this off the ground ATM
5 million if you didn't screw up, and if you're lucky. I don't even know if the pooled resources among this forum would be able to develop the funds to get a new chip fabbed. That's the significant advantage those companies have over us obviously.
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Hiroaki
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April 25, 2013, 07:47:32 PM |
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I really like your idea as some of my friends and me planned a similar crowd funding project... If you're serious, we would like to contribute or join a community asic project.
In what part of the world are you located ?
Cheers, and don t let yourself fooled by others with the right people and spirit it is def. possible and it would contribute to the whole Bitcoin community...
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Viceroy
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April 28, 2013, 10:40:41 PM |
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5 million if you didn't screw up, and if you're lucky.
And if BFL already made this $5million dollar chip you are wasting all your money. Is why bitcoin died.
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