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Author Topic: future AMD GPU chips  (Read 736 times)
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June 15, 2011, 10:42:50 PM

one of most important innnovation - switching from [also finally deprecated even by iNtel/HP]VLIW to non-VLIW arch.
this mean two important things: with slighty degraded single-theaded workload efficiency, multi-threaded appz will boost considerably. and what MORE Important for both GPU and GPGPU usage, GPU will have significantly DECREASED latency.
ie, become more handy for real-time applications, from psysics , sound, math workload to real-time 3D-processing, ie more suitable to real-time procedual synth of textures/poly[instead of pumping pre-rendered ones thru onboard/system memory]
surely all developers[not only .theprodukkt] praise/warmly welcome such changes as well as promised improved SDK.
DP and QP computing power will reduece per/silicon, but overage performance "per watt" and flexibility, let alone lowest FPS in games - will tremendously boost.
major drawbacks is still in brains[not hardware]of engineers: they stick to shared memory concept/architecture/programming, not message-passing one,  well-developed, most suitable and dominating in mass-parallel computing/HPC market.
ie its step back from non-blocking dataflow to early UMA ages
some consider its advantage, citing Amiga, Acorn RISC , SGI Indy2/Octane and other DMA-based transparen IO-based boxes, but its passed away not w/o reasons and x86 still consist numerous armchairs/obstacles to defeat, like artificial/creepy innumerable/inefficient/unusable/dangerous interrupts usage.
so, moving to UMA arch will beneficiary only when box will break free from x86 legacy.
heil almighty/glorious MPI, Erlang and ARM !! Tongue
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