Why is the cost of ASIC development >1M??

[pizza]

Love reading all the threads of ASIC development costing over a million billion gazillion dollars. I'm sure Avalon with Asian guy in his basement or slash closet invested 1M dollars before he started batch #1, and he only had 1 million dollars for development only, he didn't have a few hundred thousands left over to actually build units and not take pre orders.

Can anyone say where these numbers are being thrown out randomly from?

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[Signus]

Well he probably had an initial design in place, developed a platform to verify his idea, and then took the idea to somebody with money. Who wouldn't throw a few million at an Asian guy with a genius idea?

But the cost goes to the manufacturing of the chips themselves, because they have to be designed and manufactured. If you think getting millions of chips fabricated from silicon die is a cheap process, you are sorely mistaken.

Why do you think Engineers make good money? An initial design is the most expensive, and then you alter it 2 or three times until you have a product you can sell, and then you mass-produce it, and sell it for a pretty penny a few hundred thousand to million times.

IC fabrication is a HUGE market, you make them millions at a time.

[pizza]

Well he probably had an initial design in place, developed a platform to verify his idea, and then took the idea to somebody with money. Who wouldn't throw a few million at an Asian guy with a genius idea?

But the cost goes to the manufacturing of the chips themselves, because they have to be designed and manufactured. If you think getting millions of chips fabricated from silicon die is a cheap process, you are sorely mistaken.

Why do you think Engineers make good money? An initial design is the most expensive, and then you alter it 2 or three times until you have a product you can sell, and then you mass-produce it, and sell it for a pretty penny a few hundred thousand to million times.

IC fabrication is a HUGE market, you make them millions at a time.

Even if he raised money I'm sure it wasn't anywhere 1M or the ridiculous sums of money you hear, because if that was true then they would have no need for pre orders, and they would just sell already made units.

[Viceroy]

it costs 200-400k to add to a structured ASIC.

it costs 2-3 million to create a typical ASIC

it costs 30 million to more than a billion to devope a state of the art ASIC.

these are well accepted numbers from various manufacturers.


https://bitcointalk.org/index.php?topic=179033.0

[Signus]

Well he probably had an initial design in place, developed a platform to verify his idea, and then took the idea to somebody with money. Who wouldn't throw a few million at an Asian guy with a genius idea?

But the cost goes to the manufacturing of the chips themselves, because they have to be designed and manufactured. If you think getting millions of chips fabricated from silicon die is a cheap process, you are sorely mistaken.

Why do you think Engineers make good money? An initial design is the most expensive, and then you alter it 2 or three times until you have a product you can sell, and then you mass-produce it, and sell it for a pretty penny a few hundred thousand to million times.

IC fabrication is a HUGE market, you make them millions at a time.

Even if he raised money I'm sure it wasn't anywhere 1M or the ridiculous sums of money you hear, because if that was true then they would have no need for pre orders, and they would just sell already made units.

I'm not saying he had all of that money. He probably got enough to get started up and produce the first rig, the 'concept' and then started taking pre-orders to further fund the process. However, the fabrication process on its own probably was running very high in costs once he started building all of those rigs, requiring more chips.

[pizza]

it costs 200-400k to add to a structured ASIC.

it costs 2-3 million to create a typical ASIC

it costs 30 million to more than a billion to devope a state of the art ASIC.

these are well accepted numbers from various manufacturers.


https://bitcointalk.org/index.php?topic=179033.0

200-400K is reasonable I doubt Avalon had 3-4Million for development. Or he could have just developed it himself and spend much less money.

[pizza]

Well he probably had an initial design in place, developed a platform to verify his idea, and then took the idea to somebody with money. Who wouldn't throw a few million at an Asian guy with a genius idea?

But the cost goes to the manufacturing of the chips themselves, because they have to be designed and manufactured. If you think getting millions of chips fabricated from silicon die is a cheap process, you are sorely mistaken.

Why do you think Engineers make good money? An initial design is the most expensive, and then you alter it 2 or three times until you have a product you can sell, and then you mass-produce it, and sell it for a pretty penny a few hundred thousand to million times.

IC fabrication is a HUGE market, you make them millions at a time.

Even if he raised money I'm sure it wasn't anywhere 1M or the ridiculous sums of money you hear, because if that was true then they would have no need for pre orders, and they would just sell already made units.

I'm not saying he had all of that money. He probably got enough to get started up and produce the first rig, the 'concept' and then started taking pre-orders to further fund the process. However, the fabrication process on its own probably was running very high in costs once he started building all of those rigs, requiring more chips.

I know I'm just speaking with myself lol. It seems very unlikely that he raised anywhere near 1M dollars, nobody is going to fucking invest 1M in a random bitcoin mining machine with BFL plus other competitors on the scene. And again if that kind of money was raised enough would of also been raised to build units, and bypass pre orders, pre orders just shows the lack of money in the project. So the costs seem to be highly exaggerated, probably going by the numbers posted closers to the 200K range. 

[Viceroy]

it cannt be done.  the chip that bfl is alleging to have made cost millions.  it cannot be done for less.  they raised more than 2 million by selling pre-orders.

[pizza]

it cannt be done.  the chip that bfl is alleging to have made cost millions.  it cannot be done for less.  they raised more than 2 million by selling pre-orders.

What do you mean you just mentioned adding to an existing ASIC can cost 200K, can't Avalon just modify an existing ASIC and create their current product? Because like I said Avalon does not seem like a company that raised millions of dollars lol.

[johnyj]

Avalon raised 300x$1299=$389700 for just prototyping and they made 2 prototypes using those money, I think a large part of this money went to R&D and first wafer of chips

[samurai1200]

@pizza's OP:

For a typical new-tech ASIC, 600k-1M seems reasonable.

I have been through a couple ASIC design cycles at my last job (longwave data receiver, which is arguably much different than a purely digital ASIC like Avalon's/BFL's). As the company was small, as an engineer I was also part of the budget meetings. It cost roughly 1M to get to our first working ASIC wafer. 400-500k went to development and the engineering runs of chips. First, everything was "simulated" on a mix of FPGA hardware (for the digital side of things) and analog hardware (for signal reception/analog side of things). About 250k went into the first two engineering wafers (first prototype batch, first revision batch), and the remaining amount 250k-ish went into manufacturing 10k chips + verification and validation hardware. Built into these numbers is roughly 1 year of employee salaries (there were roughly 10 of us working on this stuff).

So yeah TL;DR is 1M total, where 50% is employee costs, 50% is manufacturing costs (including ASIC fab and PCBs and whatnot).

[pizza]

Avalon raised 300x$1299=$389700 for just prototyping and they made 2 prototypes using those money, I think a large part of this money went to R&D and first wafer of chips

this seems like a very reasonable assumption.

[pizza]

@pizza's OP:

For a typical new-tech ASIC, 600k-1M seems reasonable.

I have been through a couple ASIC design cycles at my last job (longwave data receiver, which is arguably much different than a purely digital ASIC like Avalon's/BFL's). As the company was small, as an engineer I was also part of the budget meetings. It cost roughly 1M to get to our first working ASIC wafer. 400-500k went to development and the engineering runs of chips. First, everything was "simulated" on a mix of FPGA hardware (for the digital side of things) and analog hardware (for signal reception/analog side of things). About 250k went into the first two engineering wafers (first prototype batch, first revision batch), and the remaining amount 250k-ish went into manufacturing 10k chips + verification and validation hardware. Built into these numbers is roughly 1 year of employee salaries (there were roughly 10 of us working on this stuff).

So yeah TL;DR is 1M total, where 50% is employee costs, 50% is manufacturing costs (including ASIC fab and PCBs and whatnot).

so can digital ASIC like Avalon be done for much less?

[BkkCoins]

Avalon was created by the same guy that made Icarus FPGAs last year. So he had that experience as a starting point. He sold lots and lots of those before discontinuing to start work on the ASIC product. My guess is he had four things:

1. Brains - very smart Chinese electronics engineering student, with access to others with right tools.

2. Lots of profit from Icarus project.

3. Lots of up front money from pre-paid orders.

4. Perhaps additional investors within the sizeable network of people he did good for with Icarus.

[samurai1200]

@pizza's OP:

For a typical new-tech ASIC, 600k-1M seems reasonable.

I have been through a couple ASIC design cycles at my last job (longwave data receiver, which is arguably much different than a purely digital ASIC like Avalon's/BFL's). As the company was small, as an engineer I was also part of the budget meetings. It cost roughly 1M to get to our first working ASIC wafer. 400-500k went to development and the engineering runs of chips. First, everything was "simulated" on a mix of FPGA hardware (for the digital side of things) and analog hardware (for signal reception/analog side of things). About 250k went into the first two engineering wafers (first prototype batch, first revision batch), and the remaining amount 250k-ish went into manufacturing 10k chips + verification and validation hardware. Built into these numbers is roughly 1 year of employee salaries (there were roughly 10 of us working on this stuff).

So yeah TL;DR is 1M total, where 50% is employee costs, 50% is manufacturing costs (including ASIC fab and PCBs and whatnot).

so can digital ASIC like Avalon be done for much less?

My guess is yes, since the whole of whats inside a digital ASIC can be done fully on an FPGA first (hence less time/effort in producing PCBs to test analog sections). The only difference is that a FPGA would be less efficient than an ASIC would end up being (obviously). But this can all be accurately simulated.

So chop my numbers in half and they start approaching the Avalon pre-order range.

[edit] Ah, so based on what BkkCoins said, he had a little capital from the Icarus project. Add that to preorders cash and previous FPGA bitstreams, and he probably developed the Avalon ASIC for 250k or less.

[Viceroy]

it cannt be done.  the chip that bfl is alleging to have made cost millions.  it cannot be done for less.  they raised more than 2 million by selling pre-orders.

What do you mean you just mentioned adding to an existing ASIC can cost 200K, can't Avalon just modify an existing ASIC and create their current product? Because like I said Avalon does not seem like a company that raised millions of dollars lol.

they are offering a fully custom ASIC... not a structured ASIC.  10 fold price increase.   research and find that bfl sold 30,000 preorders.

[pizza]

it cannt be done.  the chip that bfl is alleging to have made cost millions.  it cannot be done for less.  they raised more than 2 million by selling pre-orders.

What do you mean you just mentioned adding to an existing ASIC can cost 200K, can't Avalon just modify an existing ASIC and create their current product? Because like I said Avalon does not seem like a company that raised millions of dollars lol.

they are offering a fully custom ASIC... not a structured ASIC.  10 fold price increase.   research and find that bfl sold 30,000 preorders.

I'm talking about Avalon not BFL, I know BFL has the money to develop a multi million dollar ASIC.

[mrb]

Why is it >$1M? Because it is not.

From two horses' mouths: ~150k USD for 130nm, 200-300k USD for 110nm, and ~500k USD for 65nm, as of 2013.

[pizza]

@pizza's OP:

For a typical new-tech ASIC, 600k-1M seems reasonable.

I have been through a couple ASIC design cycles at my last job (longwave data receiver, which is arguably much different than a purely digital ASIC like Avalon's/BFL's). As the company was small, as an engineer I was also part of the budget meetings. It cost roughly 1M to get to our first working ASIC wafer. 400-500k went to development and the engineering runs of chips. First, everything was "simulated" on a mix of FPGA hardware (for the digital side of things) and analog hardware (for signal reception/analog side of things). About 250k went into the first two engineering wafers (first prototype batch, first revision batch), and the remaining amount 250k-ish went into manufacturing 10k chips + verification and validation hardware. Built into these numbers is roughly 1 year of employee salaries (there were roughly 10 of us working on this stuff).

So yeah TL;DR is 1M total, where 50% is employee costs, 50% is manufacturing costs (including ASIC fab and PCBs and whatnot).

so can digital ASIC like Avalon be done for much less?

My guess is yes, since the whole of whats inside a digital ASIC can be done fully on an FPGA first (hence less time/effort in producing PCBs to test analog sections). The only difference is that a FPGA would be less efficient than an ASIC would end up being (obviously). But this can all be accurately simulated.

So chop my numbers in half and they start approaching the Avalon pre-order range.

[edit] Ah, so based on what BkkCoins said, he had a little capital from the Icarus project. Add that to preorders cash and previous FPGA bitstreams, and he probably developed the Avalon ASIC for 250k or less.

This makes much more sense and reasonable.

[mmeijeri]

So yeah TL;DR is 1M total, where 50% is employee costs, 50% is manufacturing costs (including ASIC fab and PCBs and whatnot).

What if they had simply used the open source FPGA designs for the first version of their ASICs?