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Author Topic: - Avalon chips - firmware -  (Read 1547 times)
intron (OP)
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May 24, 2013, 06:02:38 AM
 #1

Is there open source firmware for interfacing these
Avalon chips already? New to this, might be asking
the obvious here...Smiley

intron
one4many
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May 28, 2013, 08:56:15 PM
 #2

Hi there.

If you mean the firmware for the FPGA driving the Avalon chips then no. You can only get the binary images you can upload to FPGA ... I think it is a Xilinx chip. The comment on the github repository states that they use propriety features in this image from the chip manufacturer. An open source version will be available in the future. Never the less, everything should work fine as long you have all the parts, equipment and software to upload the binary image.

Hope this helps.
intron (OP)
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May 29, 2013, 09:20:25 PM
 #3

Hi there.

If you mean the firmware for the FPGA driving the Avalon chips then no. You can only get the binary images you can upload to FPGA ... I think it is a Xilinx chip. The comment on the github repository states that they use propriety features in this image from the chip manufacturer. An open source version will be available in the future. Never the less, everything should work fine as long you have all the parts, equipment and software to upload the binary image.

Hope this helps.

Yes, it's the Xilinx I guess. I've been studying the Avalon datasheet and
there are some points that are rather vague. The HDL driving the ASICs
could help a lot to clarify things.

I don't own a Avalon device, just trying to figure out how to get
data to and from these chips. Clock rates are rather high (4 Mc
as it seems, even that is not 100% clear), might be rather hard
to connect them to a microprocessor.

Whish they had just picked a 1 Mc SPI link:)

intron
one4many
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May 30, 2013, 11:32:31 AM
 #4

I understand the code in hand would make things much easier.  Wink

Depending on the chip they use and your technical understanding of the chips inner workings. I would recommend to have a closer look at this paper: http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.117.6043&rep=rep1&type=pdf
They developed a proof of concept software (debit) which helps to de-compile the bitstream, but only when the bit image is not encrypted (something I highly doubt in Avalons case, because those Xilinx chips with encryption features are quite expensive).

   All the best!

       one4many

P.S.: The paper is from 2008 ... so you might need to adjust the software (if you can it obtain it from somewhere).
intron (OP)
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May 30, 2013, 11:59:55 AM
 #5

I understand the code in hand would make things much easier.  Wink

Depending on the chip they use and your technical understanding of the chips inner workings. I would recommend to have a closer look at this paper: http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.117.6043&rep=rep1&type=pdf
They developed a proof of concept software (debit) which helps to de-compile the bitstream, but only when the bit image is not encrypted (something I highly doubt in Avalons case, because those Xilinx chips with encryption features are quite expensive).

   All the best!

       one4many

P.S.: The paper is from 2008 ... so you might need to adjust the software (if you can it obtain it from somewhere).

LOL, that would something:) No idea if I can this one off though...

Thnx,
intron
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