QUOTE from
www.avalon-asics.comUnit Batches
Batch three have completely left our hands, may DHL be swift in their deliveries. The refunds will shortly follow, this is the same for any tradein orders ( ran into issues such as some people were receiving their address to pay while other are not). we understand we are very late in this department of processing any customer support related issue, we will not be making any excuses, but this is literally the only thing left on our plate now. In the future we hope to eliminate this problem by selling only in stock products that will ship in under 3 days.
On the horizon are two new product designs, we are fairly happy with the batch 3 design, which will conclude as the Avalon Version 1 final design. In addition we will have a new 2 module unit coming to market and a 2U 17inch deep server blade slated as Avalon Version 2.
Chips
While we have send out some chip orders, there is currently ~200k chips stuck in custom right at this moment for about 2 weeks now, this matter is very painful for us and our customers. As majority of the chip orders ( 70% ) totaling ~800k is made between early and mid-may resulting in a tight time frame to work with. We do have more chips coming in via different route next week which will ease this a little bit. (you can take this as chips will resume shipping by end of next week for now.)
We will take this time to fulfill a promise to announce the next generation chip 2 month ahead of schedule so potential buyers can make a decision. Soon we will be disabling the pre-order of Avalon Gen1 chips and only sell the remaining stock as we phase out old technology for a new 55nm, which goes on sale for immediate delivery at mid October 2013. This 55nm will retain the same physical dimension as the 110nm Gen1, only few pads were changed so getting them up and running requires very little change to existing design.
In addition, there is 2 more chip designs in the pipeline, we have decided to proceed developing Gen3 and Gen4 in parallel due to the long R&D time of low processor nodes, both of these will be a Full Custom ASIC design.
