Consolidated BFL Board Development Thread

[crazyates]

I'm starting this thread as a place where people can check in and collaborate on the development of a board (or boards) that can use the BFL ASIC chips. This is not a group buy or a lets-bash-BFL thread. Once a board design is established, cooling issues and case design can be discussed later.

Note: I'm only starting this thread to organize all efforts into one place. I myself can't really design anything. I'm not an EE, and I don't know what I'm doing. I will help out where I can, tho.

Ok here's the information we have available:

BFL's Order Page. That page also has some basic specs:

Specifications

• Technology: Global Foundries advanced 65nm technology (IBM core)
• Die size: 7.5 x 7.5 mm
• Substrate package: 10 x 10 mm
• Package type: Standard BGA 144
• Design type: 100% Hand routed for performance density
• Power consumption: 3.2 Watt per GH/s
• Performance: 4 GH/s
• Performance design: 16 engines @ 250mhz nominal (294mhz max)

Advantages of Butterfly Labs chips:

• 1/2 the power usage per GH as the closest competitor
• 1/10th the silicon area per GH as the closest competitor (Very high performance density)
• Proven design currently operating in the field and ready to go.
• Unlike some QFN packages which require underside heat sinks, you can use off the shelf heat sinks due to the FCBGA package. No need to design and manufacture heat sinks!

Considerations:

• Chip grades:  Chips come in four grades of performance.  Chips are sold in mixed grade lots.  A grade has 16 engines, B grade has 15 engines, C grade has 14 engines and D grade has no less than 12 engines.  All chips run at a minimum of 250 mhz.  Higher grade chips will run up to 294mhz.  The percentage distribution in each lot is 60% Grade A, 20% Grade B, 15% Grade C and 5% Grade D.
• Reference documentation:  Butterfly Labs is releasing it's PCB schematics & MCU code to open source.  Links to this documentation will follow shortly.

Those reference documents mentioned have already been released. The Jalapeno's board schematics and PCB can be found HERE. The SC Firmware Source Code was release HERE. If you have any issues downloading those files, I can send them to ya by some other means.

I see we've got a few people already working on designs, but if you guys want to coordinate here, that would be great!

[1714853900]

1714853900

[1714853900]

1714853900

[1714853900]

1714853900

[1714853900]

1714853900

[crazyates]

I want to just post my initial ideas and tired ramblings. This really doesn't have any bearing on the rest of this discussion.

The BFL chips are a lot more dense than Avalon or ASICMiner chips, for both power and heat, cramming 4GH/s into a 7.5x7.5mm die. A board like the original Avalon or K64 where the chips are all spread out and share one giant heatsink prolly wont work very well. I mean we could put a little VGA heatsink with a tiny fan on each individual chip, but that gets expensive fast. A giant heatsink like the original Avalon won't work, because unlike the Avalon, if one chip isn't making good contact with the heatsink, it will overheat.

For power, those K16s use an estimated 32W for 16 chips, while a Jalapeno uses that much for 2 chips. If we wanted a full 16 chip board, we're looking at ~250Watts.

Now BFL dealt with the heat limitations by grouping all the chips up in the center, and using one heatsink (with a large enough base) to cover each group of 6/8 chips, and cool them all at once. They're using a thermal pad instead of thermal paste to account for the potential for a height difference, although it is such a small area it can't be that much of a difference between chips. For power, they're using 2x PCIe 6-pin power cables.

Now if we're looking at making a board for Bitcoin Miners to replace their GPUs with, and it already requires the same power connectors as a GPU, has similar cooling requirements as a GPU, why would we not put it in a PCIe form factor? For anyone running a GPU farm, it's a seamless upgrade: You take out your 7970, plug this in, and start up CGMiner. If there are issues where USB is needed, it's pretty cheap to add a pcieX1->USB controller, and then run the ASIC controller off the USB. Wouldn't be much different than what we have today, from a software perspective, except the USB controller and USB device would be on the same board, and not using cables to do it all.

As for cooling, we could treat it just like a GPU, with a giant heatsink in the middle, or two heatsinks, if needed. I don't know, that part can be figured out later.

The only other formfactor I could see being popular is a 19" rack mount option, but that could be built with smaller boards.

Ok, I'm tired, so I'll stop rambling now. GN.

[bitpop]

If each chip does 4ghs. Why does my jalapeno use 2 for 5ghs?

[marto74]

Using GPU setups is a good idea a very useful to GPU miners.
On the other hand there will be some limitations.
After finishing the Avalon miner design and production (K16,K1, Tbxx) We are going to get into the design of BFL chip based miner.
For the moment I ordered 100 chips my self, other 100 ordered in a group buy with me , next group buy is 1/2 full already.
I'll be watching this thread

[marto74]

If each chip does 4ghs. Why does my jalapeno use 2 for 5ghs?

simple
POWER and HEAT issues ....
May be using lower grades
Also You are not able to make 5 GH/s with 4 GH/s chip

[ct1aic]

If each chip does 4ghs. Why does my jalapeno use 2 for 5ghs?

If you had paid more 100 US$, for the proposed BFL upgrade, it would be giving you 7 GH/s instead 5 GH/s, with the same 2 ASIC ships...

[pvtbrutus]

If each chip does 4ghs. Why does my jalapeno use 2 for 5ghs?

Basically its firmware and a frequency setting. Yours has setting 1 (189mhz) while the chips have a minimum possible mhz of 250 (which is around setting 5). Higher grade chips can clock even higher.

These topics are about the firmware and these freq settings:
https://bitcointalk.org/index.php?topic=235312.0
https://bitcointalk.org/index.php?topic=236875.0

[erk]

If each chip does 4ghs. Why does my jalapeno use 2 for 5ghs?

Because some of the chips may not have all their engines working, and are obviously still good enough to make up 5GH/s but might not make 7GH/s.

[titomane]

The first minirig 500Ghs has a consumption of 2400w.
If its 65nm chips have a 3.2w/ghs consumption. The minirig would have a theoretical consumption of 1600w. This is 50% more

[crazyates]

The first minirig 500Ghs has a consumption of 2400w.
If its 65nm chips have a 3.2w/ghs consumption. The minirig would have a theoretical consumption of 1600w. This is 50% more

The chip itself consumes 3.2W/GHs. The board will be higher than that, and that doesn't include the power costs of running a shit ton of large fans, and then the PSU inefficiencies.

Each chip is 4GH/s @ 3.2W/GHs for ~12.8W per chip. Each board has 16 chips, which is 205W just for the chips. Then you add in the voltage regulators (assume 90% inefficient) that's 205W X 1.1 = 225W. Add 2 fans per board (another 10W), power for the board controller and all other various components, and you're looking at 250W per board.

Each MR has 8 boards, so that brings the total to 2000W. Then you add in the 18 case fans (9 on each side). Lets assume a typical case 12V case fan, so you're talking 10W per fan, or another 180W total. That's 2180Watts.

Then your PSUs are inefficient as well. Even if they're 80PlusGold, they're 90% efficient at max load, which adds another 10% of your total power. 2180W X 1.1 = 2398Watts, almost exactly the 2400W prediction. If you're using 220V for your PSUs, they'll be ~92% efficient at max load, which brings your draw down to 2180W X 1.08 = 2355W, which is again almost exactly what was predicted if you run them off 220V.

Hope this answers your question.

[tom99]

If each chip does 4ghs. Why does my jalapeno use 2 for 5ghs?

On 5Gh/s Jal got 2 chip on it and one is dummy chip for balance heat sink.

please someone check your 5Gh/s Jal chips if 1 or 2 is working.


use:
Getinfo to get an idea which grade processors you have?

DEVICE: BitFORCE SC                                                         
FIRMWARE: 1.2.5                                                               
IAR Executed: NO                                                             
CHIP PARALLELIZATION: YES @ 2                                               
QUEUE DEPTH:40                                                               
PROCESSOR 3: 15 engines @ 289 MHz -- MAP: FFFE                               
PROCESSOR 7: 14 engines @ 275 MHz -- MAP: BFFE                               
THEORETICAL MAX: 8185 MH/s                                                   
ENGINES: 29                                                                 
FREQUENCY: 274 MHz                                                           
XLINK MODE: MASTER                                                             
CRITICAL TEMPERATURE: 0                                             
XLINK PRESENT: NO                     

[titomane]

The first minirig 500Ghs has a consumption of 2400w.
If its 65nm chips have a 3.2w/ghs consumption. The minirig would have a theoretical consumption of 1600w. This is 50% more

The chip itself consumes 3.2W/GHs. The board will be higher than that, and that doesn't include the power costs of running a shit ton of large fans, and then the PSU inefficiencies.

Each chip is 4GH/s @ 3.2W/GHs for ~12.8W per chip. Each board has 16 chips, which is 205W just for the chips. Then you add in the voltage regulators (assume 90% inefficient) that's 205W X 1.1 = 225W. Add 2 fans per board (another 10W), power for the board controller and all other various components, and you're looking at 250W per board.

Each MR has 8 boards, so that brings the total to 2000W. Then you add in the 18 case fans (9 on each side). Lets assume a typical case 12V case fan, so you're talking 10W per fan, or another 180W total. That's 2180Watts.

Then your PSUs are inefficient as well. Even if they're 80PlusGold, they're 90% efficient at max load, which adds another 10% of your total power. 2180W X 1.1 = 2398Watts, almost exactly the 2400W prediction. If you're using 220V for your PSUs, they'll be ~92% efficient at max load, which brings your draw down to 2180W X 1.08 = 2355W, which is again almost exactly what was predicted if you run them off 220V.

Hope this answers your question.

Thanks

[Nemo1024]

+1 for PCIe/PCI form factror board to easily upgrade GPU mining rigs and possibly use PCI slots on the omder motherboards.

[salfter]

If each chip does 4ghs. Why does my jalapeno use 2 for 5ghs?

On 5Gh/s Jal got 2 chip on it and one is dummy chip for balance heat sink.

please someone check your 5Gh/s Jal chips if 1 or 2 is working.

I have two.  Both have two running chips. One has 30 operational cores between the two chips (15+15); the other has 29 (15+14).  They tend to deliver about 5.5 GH/s each.

[joeventura]

If each chip does 4ghs. Why does my jalapeno use 2 for 5ghs?

On 5Gh/s Jal got 2 chip on it and one is dummy chip for balance heat sink.

please someone check your 5Gh/s Jal chips if 1 or 2 is working.


use:
Getinfo to get an idea which grade processors you have?

DEVICE: BitFORCE SC                                                         
FIRMWARE: 1.2.5                                                               
IAR Executed: NO                                                             
CHIP PARALLELIZATION: YES @ 2                                               
QUEUE DEPTH:40                                                               
PROCESSOR 3: 15 engines @ 289 MHz -- MAP: FFFE                               
PROCESSOR 7: 14 engines @ 275 MHz -- MAP: BFFE                               
THEORETICAL MAX: 8185 MH/s                                                   
ENGINES: 29                                                                 
FREQUENCY: 274 MHz                                                           
XLINK MODE: MASTER                                                             
CRITICAL TEMPERATURE: 0                                             
XLINK PRESENT: NO                     

Math is a real stretch for some of you huh?

[dwdoc]

Possible use for BFL sample chips:

https://bitcointalk.org/index.php?topic=270977.msg2901974#msg2901974