Cyclone V, want to increase speed. How?

[magnusha]

Hello!

I have a Terasic SocKit board with a Cyclone V FPGA. I have compiled and programmed the FPGA with the open source code from this forum. The FPGA is running nicely at 50MH/s. But I want to increase the MH/s. Can the Cyclone V handle more than 50MH/s without any cooling? I put my finger on it when it have going on for half an hour and the die was not that hot. How much can I speed up before it is dangerous? And the last thing, where in the code do I increase the speed?

[1715210271]

1715210271

[1715210271]

1715210271

[J35st3r]

Provided the chip does not get too hot to touch for several seconds (around 60C which will be <80C die temperature) you should be fine.

HOWEVER you should also check the temperature of the onboard voltage regulators. These should also not be allowed to get too hot to touch. The DE0-Nano board was notorious for overheating its regulators when running bitcoin miners, perhaps Teresic have improved the design for the SocKit board, but best to check for sure.

You can ramp the speed up until it starts getting hot, or until the hash error rate starts to rise (from zero!). Speed is set by the multiplier/divider  settings in main_pll.v

BTW did you get that board for $99 on the Arrow training program, or pay full price ($249, still a bargain IMHO)? Are they available on general sale yet (last I saw was a 2 month backorder)?

[magnusha]

Thx for answer. Which one of the multiplier/divider should i adjust? I have not bought it, I'm only testing it from my school 

[J35st3r]

Thx for answer. Which one of the multiplier/divider should i adjust? I have not bought it, I'm only testing it from my school 

Lucky school, it looks like a nice dev board. The PLL output clock is simply the input clock speed (usually 50MHz on the Terasic boards, but you should check the documentation) multiplied by "clk0_multiply_by" and divided by "clk0_divide_by". Pretty simple really. The fpgaminer defaults are 5 and 5, giving 50MHz. So for 100MHz you'd use 10 and 5, while for 75MHz use 15 and 10. There are limits to the range (255 I think, so nothing to worry about normally).

Have fun. And ask permission from your school before setting up a mining botnet, you wouldn't want to get into trouble 

[magnusha]

What speed do you think is safe before the die gets to hot?

[J35st3r]

What speed do you think is safe before the die gets to hot?

You'll just have to take it slowly and push the speed up by say 10MHz at a time. The limitation is more likely to be the power regulators rather than the fpga, but I'm not familiar with the one used in the SocKit so as to be able to give an estimate. Talk to your teachers if you are in any doubt.