omshree
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November 26, 2017, 06:55:28 AM |
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thanks!
also do you know how to turn on api access to can control from awesome miner
+1
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Donate if you like 1ANALSEXXGMd6HaN6CzQXtURLC5H9TjKoo
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Each block is stacked on top of the previous one. Adding another block to the top makes all lower blocks more difficult to remove: there is more "weight" above each block. A transaction in a block 6 blocks deep (6 confirmations) will be very difficult to remove.
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gvsrusa
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November 26, 2017, 08:40:02 PM Last edit: November 26, 2017, 08:57:00 PM by gvsrusa |
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Thanks to whoever sent me the LTC, it's much appreciated gvsrusa I would suggest downloading and writing the firmware to a microSD card as per the innosilicon manual. Then boot it up using the microSD card in the slot and leave it a couple of hours to flash (not sure exactly how long it takes but the img was several GB). Then if you can ping it on 192.168.1.254, pop out the card, and reboot the A5. Assuming you can now access the web interface, download the other firmware (smaller one) and flash that .bin file via the web admin interface. If that works then after the reboot, re-configure your network and re-enter your mining pool details. Good luck! I've had no replies at all from Inno via their web support form yet ... FB One more miner is down again. This time not even able to reset the password. I can only access the web interface and network settings.What’s going on with these miners? No response from inno. No support for A5.
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gvsrusa
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November 27, 2017, 05:03:36 PM |
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Thanks to whoever sent me the LTC, it's much appreciated gvsrusa I would suggest downloading and writing the firmware to a microSD card as per the innosilicon manual. Then boot it up using the microSD card in the slot and leave it a couple of hours to flash (not sure exactly how long it takes but the img was several GB). Then if you can ping it on 192.168.1.254, pop out the card, and reboot the A5. Assuming you can now access the web interface, download the other firmware (smaller one) and flash that .bin file via the web admin interface. If that works then after the reboot, re-configure your network and re-enter your mining pool details. Good luck! I've had no replies at all from Inno via their web support form yet ... FB One more miner is down again. This time not even able to reset the password. I can only access the web interface and network settings.What’s going on with these miners? No response from inno. No support for A5. It’s good that they released another upgrade. All my miners are up and running @660watts. That’s surprising. Good job Innosilicon
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BestSumo
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December 02, 2017, 09:39:08 PM |
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Does anyone have a picture of where to put the MicroSD card in the A5 Dash Miner? I am not home and my wife claims it is not there at all.
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funbuxx (OP)
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December 04, 2017, 01:46:58 PM |
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Assume you've found it now but if not, the micro-SD card slot is to the left of the "IP SET" button on the front of the A5 miner.
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zukolega
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December 04, 2017, 03:18:10 PM |
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dhb220
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December 04, 2017, 08:08:33 PM |
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My A5 is missing the slot as well. I've tried everything to get this unit to mine. They even shipped me a DOA power supply.....I simply had a Bitmain APW5 already in the house. The frustration is real.....
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BestSumo
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December 04, 2017, 08:59:18 PM Last edit: December 04, 2017, 09:10:46 PM by BestSumo |
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https://farm5.staticflickr.com/4535/38820057441_bea2651f61_z.jpgHere is a picture, as you can see there is no TF card slot. Their tech support got back to me and said I should be able to flash it without the TF Slot to which I replied that I have tried that repeatedly and nothing happens. I believe I have found the python script they execute when you flash the firmware through their management page. I will call them today and if they don't offer a way to flash this that is possible I will modify the script so I can run it on my own and hope it works. If anyone wants to help modify this script I am all in. I've made web servers in python before so I figure this is doable, but I am not a programmer by trade so there's a good chance I'll break it. Here is the script which is found in /home/www/cgi-bin/upload.py: #!/bin/python3 # -*- coding: utf-8 -*-
import os import sys import cgi import json import time import struct import binascii import logging import logging.handlers
from inno_config import * from inno_lib import * from update_file import *
# upgrade logger gInnoUpgrLogger = None # max bytes of single log file gInnoUpgrLogMax = 20 * 1024 # log backup count gInnoUpgrLogBakCnt = 2
gInnoUpgrDir = '/tmp/' gInnoUpgrLogDir = '/innocfg/log/' gInnoUpgrLogFile = 'upgrade.log' gInnoShowFifoFile = 'show_fifo'
gInnoUpgrFileSize = 100 * 1024 * 1024 # 100M
# form key gInnoUpgrFileKey = 'upfile' gInnoUpgrRetainCfgKey = 'keepsettings'
def WritePercentToShowFile(percent, text): obj = {'percent' : str(percent), 'text': str(text)} jsonStr = json.dumps(obj, indent = gInnoJsonIndent) + '\n'
data = open(gInnoUpgrDir + gInnoShowFifoFile, 'w') data.write(jsonStr) data.close()
def InitUpgrLog(): # ............logger global gInnoUpgrLogger gInnoUpgrLogger = logging.getLogger('Upgrade Log') gInnoUpgrLogger.setLevel(logging.DEBUG)
# ............handler........................... fh = logging.handlers.RotatingFileHandler(gInnoUpgrLogDir + gInnoUpgrLogFile, \ maxBytes = gInnoUpgrLogMax, backupCount = gInnoUpgrLogBakCnt) fh.setLevel(logging.DEBUG)
# ...............handler........................... # ch = logging.StreamHandler() # ch.setLevel(logging.DEBUG)
# ......handler............... fmt = logging.Formatter('%(asctime)s: %(levelname)s - %(message)s') fh.setFormatter(fmt) # ch.setFormatter(fmt)
# ...logger......handler gInnoUpgrLogger.addHandler(fh) # gInnoUpgrLogger.addHandler(ch)
def PrintUpgrLog(percent, text): if None == gInnoUpgrLogger: InitUpgrLog()
gInnoUpgrLogger.info('<' + str(percent) + '%> ' + text) # write log WritePercentToShowFile(percent, text) # write to web
def PrintUpgrException(text): if None == gInnoUpgrLogger: InitUpgrLog()
gInnoUpgrLogger.exception(text)
def GetFile(): form = cgi.FieldStorage()
fileitem = form[gInnoUpgrFileKey] fileName = None isRetainCfg = form[gInnoUpgrRetainCfgKey].value # ......form[key]........................FieldStorage........ if isRetainCfg != '1': isRetainCfg = '0' InnoPrintSysLog('upload', gInnoUpgrRetainCfgKey + '=' + isRetainCfg)
# ............ if fileitem.filename: fileName = gInnoUpgrDir + gInnoUpgrFile fileData = fileitem.file.read() # ............ fileLen = sys.getsizeof(fileData) InnoPrintSysLog('upload', 'upgrade file size: ' + str(fileLen)) if fileLen > gInnoUpgrFileSize: InnoPrintJsonHeader() obj = {gInnoResultKey : gInnoResultValFalse} InnoPrintJson(obj) sys.exit(0) # ............ fd = open(fileName, 'wb') fd.write(fileData) fd.close() # ............ #cmd = 'chmod -x ' + fileName #InnoGetCmdRst(cmd)
return isRetainCfg
def ParseUpgrFile(isRetainCfg): # ........................ fdUpgr = open(gInnoUpgrDir + gInnoUpgrFile, 'rb') headLen = struct.unpack(gInnoUpgrPackFmt, fdUpgr.read(4))[0] crc32Val = struct.unpack(gInnoUpgrPackFmt, fdUpgr.read(4))[0] nameLen = struct.unpack(gInnoUpgrPackFmt, fdUpgr.read(4))[0] name = fdUpgr.read(nameLen).decode(encoding='UTF-8', errors='strict') resv = fdUpgr.read(16) dataLen = struct.unpack(gInnoUpgrPackFmt, fdUpgr.read(4))[0] position = fdUpgr.tell() upgrData = fdUpgr.read(dataLen)
# CRC...... crc32Calc = binascii.crc32(upgrData) if crc32Calc != crc32Val: InnoPrintSysLog('upload', 'ERROR: CRC32 not match.') PrintUpgrLog(100, 'ERROR: CRC32 not match.') #print('ERROR: CRC32 not match.') exit()
# ......script segment fdUpgr.seek(position) segHeadLen = struct.unpack(gInnoUpgrPackFmt, fdUpgr.read(4))[0] segNameLen = struct.unpack(gInnoUpgrPackFmt, fdUpgr.read(4))[0] segName = fdUpgr.read(segNameLen) segName = TextDecrypt(segName) # ............ segName = segName.decode(encoding='UTF-8', errors='strict') # utf-8...... segResv = fdUpgr.read(16) segDataLen = struct.unpack(gInnoUpgrPackFmt, fdUpgr.read(4))[0] segData = fdUpgr.read(segDataLen) #segData = segData.decode(encoding='UTF-8', errors='strict') # ............... if segName != gInnoUpgrScriptFile: InnoPrintSysLog('upload', 'ERROR: script name not match.') PrintUpgrLog(100, 'ERROR: script name not match.') #print('ERROR: script name not match.') exit() # ............ decryptData = TextDecrypt(segData)
# ......upgrade script fdScript = open(gInnoUpgrDir + gInnoUpgrScriptFile, 'wb') fdScript.write(decryptData) fdScript.close()
# ......data segment segHeadLen = struct.unpack(gInnoUpgrPackFmt, fdUpgr.read(4))[0] segNameLen = struct.unpack(gInnoUpgrPackFmt, fdUpgr.read(4))[0] segName = fdUpgr.read(segNameLen).decode(encoding='UTF-8', errors='strict') segPkgNum = struct.unpack(gInnoUpgrPackFmt, fdUpgr.read(4))[0] segResv = fdUpgr.read(12) segDataLen = struct.unpack(gInnoUpgrPackFmt, fdUpgr.read(4))[0] segData = fdUpgr.read(segDataLen) # ............... if segName != gInnoUpgrDataFile: InnoPrintSysLog('upload', 'ERROR: data segment name not match.') PrintUpgrLog(100, 'ERROR: data segment name not match.') #print('ERROR: data segment name not match.') exit() # ......upgrade data filedata = b'' filedata += struct.pack(gInnoUpgrPackFmt, int(isRetainCfg)) filedata += struct.pack(gInnoUpgrPackFmt, segPkgNum) filedata += struct.pack(gInnoUpgrPackFmt, segDataLen) filedata += segData fdData = open(gInnoUpgrDir + gInnoUpgrDataFile, 'wb') fdData.write(filedata) fdData.close()
fdUpgr.close()
# ......update.bin..................... cmd = 'rm -f ' + gInnoUpgrDir + gInnoUpgrFile InnoGetCmdRst(cmd)
def Upgrade(): # log InnoPrintSysLog('upload', 'start upgrading') PrintUpgrLog(1, 'start upgrading.')
# step1: ............ PrintUpgrLog(2, 'transferring upgrade file...') isRetainCfg = GetFile() PrintUpgrLog(10, 'transferring upgrade file... done.')
# step2: ............ ParseUpgrFile(isRetainCfg) PrintUpgrLog(20, 'parsing upgrade file... done.')
# ............ scriptPath = gInnoUpgrDir + gInnoUpgrScriptFile cmd = 'chmod 777 ' + scriptPath InnoGetCmdRst(cmd)
# ............ cmd = 'sync' InnoGetCmdRst(cmd)
# ......upgrade script InnoPrintSysLog('upload', 'start running %s' % scriptPath) cmd = scriptPath InnoGetCmdRst(cmd)
if __name__ == '__main__': try: # ...... Upgrade() except: PrintUpgrException('Exception Logged')
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MrBlutarsky
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December 05, 2017, 05:00:10 AM |
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Hi, i have 3 A5 and that's my experience... =P first run, 1st and 2nd miner ok, 3rd run 2/3 (middle board no red light) 2 days later i do some power and ethernet cable management (changed cables and switch) 1st miner stop mining (all 3 board red led on but no hash) 2 still work 100% 3 back to full life from 2/3 to 3/3 (10.9 11.0 11.0 ghs) next day on 1st miner i discover that the config password is no more the default one (i never change it) tryed to access via telnet... no success (not innot1t2) next day 2nd miner still work like a champ 3rd miner seems to have some chip not working on the first board (9.5ghs instead of 11) and discovered that also 3rd miner got default pass not working... (DAFUQ?!?!?!?) lucky me telnet login win and i recover it sent mail to innosilicon they reply after a week with a new firmware as fix so flashed 1st miner, nothing new happened, miner boot, web interface popup regulary, 3 red light stay on but no hashing (still can't edit pool config, fortunatly config is correct for now) flashed 3rd miner, before 9.5 11.0 11.0 ghs per board, after 10.7 7.2 6.9 ghs per board... and i don't have the old firmware to stepback... (anyone got it?!?) that's the debug log: root@miner/bin: ./innominer_T3 --debug [2017-12-05 04:40:45] Started sgminer 4.4.2 [2017-12-05 04:40:45] A1 detect [2017-12-05 04:40:45] hardware version is G19 [2017-12-05 04:40:45] miner type is T3 auto_fan true, fan_speed 50 pwm name:/dev/pwmgen0.0. pwm step:5. duty max: 100. targ freq:7000. freq rate:7142. fan speed thrd:100. fan up thrd:55. fan down thrd:35. [2017-12-05 04:40:45] A1 = 1100,98 [2017-12-05 04:40:45] A1 PLL Clock = 1092MHz [2017-12-05 04:40:45] A1 = 1100,98 [2017-12-05 04:40:45] A1 PLL Clock = 1092MHz [2017-12-05 04:40:45] A1 = 1100,98 [2017-12-05 04:40:45] A1 PLL Clock = 1092MHz [2017-12-05 04:40:45] A1 = 1100,98 [2017-12-05 04:40:45] A1 PLL Clock = 1092MHz [2017-12-05 04:40:45] A1 = 1100,98 [2017-12-05 04:40:45] A1 PLL Clock = 1092MHz [2017-12-05 04:40:45] A1 = 1100,98 [2017-12-05 04:40:45] A1 PLL Clock = 1092MHz [2017-12-05 04:40:45] A1 = 1100,98 [2017-12-05 04:40:45] A1 PLL Clock = 1092MHz [2017-12-05 04:40:45] A1 = 1100,98 [2017-12-05 04:40:45] A1 PLL Clock = 1092MHz [2017-12-05 04:40:45] A1: checking A1 chain [2017-12-05 04:40:45] SPI '/dev/spidev0.0': mode=1, bits=8, speed=1500000 [2017-12-05 04:40:45] SPI '/dev/spidev1.0': mode=1, bits=8, speed=1500000 [2017-12-05 04:40:45] SPI '/dev/spidev2.0': mode=1, bits=8, speed=1500000 [2017-12-05 04:40:45] SPI '/dev/spidev3.0': mode=1, bits=8, speed=1500000 [2017-12-05 04:40:45] SPI '/dev/spidev4.0': mode=1, bits=8, speed=1500000 [2017-12-05 04:40:45] SPI '/dev/spidev5.0': mode=1, bits=8, speed=1500000 set_vid_value:8. [2017-12-05 04:40:49] Plug Status[0] = 0
[2017-12-05 04:40:50] Plug Status[1] = 0
[2017-12-05 04:40:52] Plug Status[2] = 0
[2017-12-05 04:40:53] Plug Status[3] = 1
[2017-12-05 04:40:55] Plug Status[4] = 1
[2017-12-05 04:40:56] Plug Status[5] = 1
[2017-12-05 04:40:56] 0: A1 init chain [2017-12-05 04:40:56] 0: detected 33 chips [2017-12-05 04:40:57] #####Write t/v sensor Value Success!
[2017-12-05 04:40:57] spidev0.0: 0: Found 33 A1 chips [2017-12-05 04:40:57] [chain_ID:0]: Found 33 Chips [2017-12-05 04:40:57] Detected the 0 A1 chain with 33 chips [2017-12-05 04:40:57] 1: A1 init chain [2017-12-05 04:40:57] 1: detected 33 chips [2017-12-05 04:40:57] #####Write t/v sensor Value Success!
[2017-12-05 04:40:57] spidev1.0: 1: Found 33 A1 chips [2017-12-05 04:40:57] [chain_ID:1]: Found 33 Chips [2017-12-05 04:40:57] Detected the 1 A1 chain with 33 chips [2017-12-05 04:40:57] 2: A1 init chain [2017-12-05 04:40:57] 2: detected 33 chips [2017-12-05 04:40:57] #####Write t/v sensor Value Success!
[2017-12-05 04:40:57] spidev2.0: 2: Found 33 A1 chips [2017-12-05 04:40:57] [chain_ID:2]: Found 33 Chips [2017-12-05 04:40:57] Detected the 2 A1 chain with 33 chips [2017-12-05 04:40:57] 3: A1 init chain [2017-12-05 04:40:57] cmd bist start: poll fail ! [2017-12-05 04:40:57] bist start fail [2017-12-05 04:40:57] init a1 chain fail [2017-12-05 04:40:57] 4: A1 init chain [2017-12-05 04:40:57] cmd bist start: poll fail ! [2017-12-05 04:40:57] bist start fail [2017-12-05 04:40:57] init a1 chain fail [2017-12-05 04:40:57] 5: A1 init chain [2017-12-05 04:40:57] cmd bist start: poll fail ! [2017-12-05 04:40:57] bist start fail [2017-12-05 04:40:57] init a1 chain fail [2017-12-05 04:40:57] 0: A1 init chain [2017-12-05 04:40:57] cmd reset: poll fail ! [2017-12-05 04:41:10] 1: A1 init chain [2017-12-05 04:41:18] cmd write reg: poll fail ! [2017-12-05 04:41:18] Set Default PLL Five Times! [2017-12-05 04:41:18] cmd write reg: poll fail ! [2017-12-05 04:41:18] set default PLL 3 Times Success [2017-12-05 04:41:22] 2: A1 init chain [2017-12-05 04:41:25] cmd write reg: poll fail ! [2017-12-05 04:41:25] Set Default PLL Five Times! [2017-12-05 04:41:25] set default PLL 2 Times Success [2017-12-05 04:41:25] cmd write reg: poll fail ! [2017-12-05 04:41:25] Set Default PLL Five Times! [2017-12-05 04:41:25] cmd write reg: poll fail ! [2017-12-05 04:41:25] set default PLL 3 Times Success [2017-12-05 04:41:27] cmd write reg: poll fail ! [2017-12-05 04:41:27] Set Default PLL Five Times! [2017-12-05 04:41:27] set default PLL 2 Times Success [2017-12-05 04:41:27] cmd write reg: poll fail ! [2017-12-05 04:41:27] Set Default PLL Five Times! [2017-12-05 04:41:27] cmd write reg: poll fail ! [2017-12-05 04:41:27] cmd write reg: poll fail ! [2017-12-05 04:41:27] cmd write reg: poll fail ! [2017-12-05 04:41:27] cmd write reg: poll fail ! [2017-12-05 04:41:34] init_ReadTemp... [2017-12-05 04:41:34] 0: A1 init chain reload [2017-12-05 04:41:34] [reload]0: detected 33 chips send command [bist_collect] [2017-12-05 04:41:34] collect core success [2017-12-05 04:41:34] 0: A1 chip-chain detected [2017-12-05 04:41:34] spidev0.0: 0: Found 33 A1 chips [2017-12-05 04:41:34] cmd write reg: poll fail ! [2017-12-05 04:41:34] cmd write reg: poll fail ! crc:6631,0 [2017-12-05 04:41:34] 0: Failed to read register for chip 1 -> disabling crc:a731,0 [2017-12-05 04:41:34] 0: Failed to read register for chip 2 -> disabling crc:6037,0 [2017-12-05 04:41:34] 0: Failed to read register for chip 3 -> disabling [2017-12-05 04:41:34] 0: Failed to read register for chip 4 -> disabling crc:a731,0 [2017-12-05 04:41:34] 0: Failed to read register for chip 5 -> disabling crc:6a3d,0 [2017-12-05 04:41:34] 0: Failed to read register for chip 6 -> disabling [2017-12-05 04:41:35] 0: Failed to read register for chip 7 -> disabling crc:6631,0 [2017-12-05 04:41:35] 0: Failed to read register for chip 8 -> disabling crc:a731,0 [2017-12-05 04:41:35] 0: Failed to read register for chip 9 -> disabling crc:6631,0 [2017-12-05 04:41:35] 0: Failed to read register for chip 10 -> disabling crc:6037,0 [2017-12-05 04:41:35] 0: Failed to read register for chip 11 -> disabling [2017-12-05 04:41:35] 0: Failed to read register for chip 12 -> disabling crc:6631,0 [2017-12-05 04:41:35] 0: Failed to read register for chip 13 -> disabling crc:a731,0 [2017-12-05 04:41:35] 0: Failed to read register for chip 14 -> disabling [2017-12-05 04:41:35] 0: Failed to read register for chip 15 -> disabling crc:6631,0 [2017-12-05 04:41:35] 0: Failed to read register for chip 16 -> disabling crc:a731,0 [2017-12-05 04:41:35] 0: Failed to read register for chip 17 -> disabling crc:6037,0 [2017-12-05 04:41:35] 0: Failed to read register for chip 18 -> disabling [2017-12-05 04:41:35] 0: Failed to read register for chip 19 -> disabling crc:6631,0 [2017-12-05 04:41:35] 0: Failed to read register for chip 20 -> disabling crc:a731,0 [2017-12-05 04:41:35] 0: Failed to read register for chip 21 -> disabling crc:ba2c,0 [2017-12-05 04:41:35] 0: Failed to read register for chip 22 -> disabling crc:6037,0 [2017-12-05 04:41:35] 0: Failed to read register for chip 23 -> disabling crc:7423,0 [2017-12-05 04:41:35] 0: Failed to read register for chip 24 -> disabling crc:6631,0 [2017-12-05 04:41:35] 0: Failed to read register for chip 25 -> disabling crc:b620,0 [2017-12-05 04:41:35] 0: Failed to read register for chip 26 -> disabling crc:a731,0 [2017-12-05 04:41:35] 0: Failed to read register for chip 27 -> disabling crc:6037,0 [2017-12-05 04:41:35] 0: Failed to read register for chip 28 -> disabling crc:b026,0 [2017-12-05 04:41:35] 0: Failed to read register for chip 29 -> disabling crc:7126,0 [2017-12-05 04:41:35] 0: Failed to read register for chip 30 -> disabling crc:b325,0 [2017-12-05 04:41:35] 0: Failed to read register for chip 31 -> disabling crc:e79d,4142 [2017-12-05 04:41:35] 0: Failed to read register for chip 32 -> disabling crc:a731,0 [2017-12-05 04:41:35] 0: Failed to read register for chip 33 -> disabling [2017-12-05 04:41:35] cmd write reg: poll fail ! [2017-12-05 04:41:35] cmd write reg: poll fail ! [2017-12-05 04:41:35] cmd write reg: poll fail ! [2017-12-05 04:41:35] cmd write reg: poll fail ! [2017-12-05 04:41:35] cmd write reg: poll fail ! [2017-12-05 04:41:35] cmd write reg: poll fail ! [2017-12-05 04:41:35] cmd write reg: poll fail ! [2017-12-05 04:41:35] 0: Failed to read register for chip 1 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:35] 0: Failed to read register for chip 2 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:35] 0: Failed to read register for chip 3 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:35] 0: Failed to read register for chip 4 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:35] 0: Failed to read register for chip 5 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:35] 0: Failed to read register for chip 6 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:35] 0: Failed to read register for chip 7 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:35] 0: Failed to read register for chip 8 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:35] 0: Failed to read register for chip 9 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:35] 0: Failed to read register for chip 10 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:35] 0: Failed to read register for chip 11 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:35] 0: Failed to read register for chip 12 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:35] 0: Failed to read register for chip 13 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:35] 0: Failed to read register for chip 14 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:35] 0: Failed to read register for chip 15 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:35] 0: Failed to read register for chip 16 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:35] 0: Failed to read register for chip 17 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:35] 0: Failed to read register for chip 18 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:35] 0: Failed to read register for chip 19 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:35] 0: Failed to read register for chip 20 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:35] 0: Failed to read register for chip 21 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:35] 0: Failed to read register for chip 22 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:35] 0: Failed to read register for chip 23 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:35] 0: Failed to read register for chip 24 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:35] 0: Failed to read register for chip 25 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:35] 0: Failed to read register for chip 26 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:35] 0: Failed to read register for chip 27 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:35] 0: Failed to read register for chip 28 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:35] 0: Failed to read register for chip 29 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:35] 0: Failed to read register for chip 30 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:35] 0: Failed to read register for chip 31 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:35] 0: Failed to read register for chip 32 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:35] 0: Failed to read register for chip 33 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:35] [chain_ID:0]: Found 33 Chips With Total 0 Active Cores [2017-12-05 04:41:35] [chain_ID]: Temp:0
[2017-12-05 04:41:35] reload init a1 chain0 fail [2017-12-05 04:41:35] 1: A1 init chain reload [2017-12-05 04:41:35] [reload]1: detected 33 chips send command [bist_collect] [2017-12-05 04:41:35] collect core success [2017-12-05 04:41:35] 1: A1 chip-chain detected [2017-12-05 04:41:35] spidev1.0: 1: Found 33 A1 chips [2017-12-05 04:41:35] cmd write reg: poll fail ! crc:6d18,0 [2017-12-05 04:41:35] 1: Failed to read register for chip 1 -> disabling crc:6e1b,0 [2017-12-05 04:41:35] 1: Failed to read register for chip 2 -> disabling crc:a014,0 [2017-12-05 04:41:35] 1: Failed to read register for chip 3 -> disabling [2017-12-05 04:41:35] 1: Failed to read register for chip 4 -> disabling crc:a612,0 [2017-12-05 04:41:35] 1: Failed to read register for chip 5 -> disabling crc:6712,0 [2017-12-05 04:41:35] 1: Failed to read register for chip 6 -> disabling [2017-12-05 04:41:35] 1: Failed to read register for chip 7 -> disabling crc:a612,0 [2017-12-05 04:41:35] 1: Failed to read register for chip 8 -> disabling crc:a511,0 [2017-12-05 04:41:35] 1: Failed to read register for chip 9 -> disabling crc:febb,0 [2017-12-05 04:41:35] 1: Failed to read register for chip 10 -> disabling crc:6712,0 [2017-12-05 04:41:35] 1: Failed to read register for chip 11 -> disabling crc:a014,0 [2017-12-05 04:41:35] 1: Failed to read register for chip 12 -> disabling [2017-12-05 04:41:35] 1: Failed to read register for chip 13 -> disabling crc:a612,0 [2017-12-05 04:41:35] 1: Failed to read register for chip 14 -> disabling crc:a317,0 [2017-12-05 04:41:35] 1: Failed to read register for chip 15 -> disabling crc:6712,0 [2017-12-05 04:41:35] 1: Failed to read register for chip 16 -> disabling crc:a014,0 [2017-12-05 04:41:35] 1: Failed to read register for chip 17 -> disabling [2017-12-05 04:41:35] 1: Failed to read register for chip 18 -> disabling crc:a612,0 [2017-12-05 04:41:35] 1: Failed to read register for chip 19 -> disabling crc:1a69,0 [2017-12-05 04:41:35] 1: Failed to read register for chip 20 -> disabling crc:6712,0 [2017-12-05 04:41:35] 1: Failed to read register for chip 21 -> disabling [2017-12-05 04:41:35] 1: Failed to read register for chip 22 -> disabling crc:a656,0 [2017-12-05 04:41:35] 1: Failed to read register for chip 23 -> disabling crc:6712,0 [2017-12-05 04:41:35] 1: Failed to read register for chip 24 -> disabling crc:a014,0 [2017-12-05 04:41:35] 1: Failed to read register for chip 25 -> disabling crc:7603,0 [2017-12-05 04:41:35] 1: Failed to read register for chip 26 -> disabling crc:b703,0 [2017-12-05 04:41:35] 1: Failed to read register for chip 27 -> disabling crc:7005,0 [2017-12-05 04:41:35] 1: Failed to read register for chip 28 -> disabling crc:a612,0 [2017-12-05 04:41:35] 1: Failed to read register for chip 29 -> disabling crc:b206,0 [2017-12-05 04:41:35] 1: Failed to read register for chip 30 -> disabling crc:6712,0 [2017-12-05 04:41:35] 1: Failed to read register for chip 31 -> disabling [2017-12-05 04:41:35] 1: Failed to read register for chip 32 -> disabling crc:a612,0 [2017-12-05 04:41:35] 1: Failed to read register for chip 33 -> disabling crc:a014,0 [2017-12-05 04:41:35] cmd write reg: poll fail ! [2017-12-05 04:41:35] cmd write reg: poll fail ! [2017-12-05 04:41:35] cmd write reg: poll fail ! [2017-12-05 04:41:36] cmd write reg: poll fail ! [2017-12-05 04:41:36] cmd write reg: poll fail ! [2017-12-05 04:41:36] cmd write reg: poll fail ! [2017-12-05 04:41:36] cmd write reg: poll fail ! crc:672,0 [2017-12-05 04:41:36] 1: Failed to read register for chip 1 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:36] 1: Failed to read register for chip 2 -> disabling Notice!!! Error temperature 0 crc:de0,0 [2017-12-05 04:41:36] 1: Failed to read register for chip 3 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:36] 1: Failed to read register for chip 4 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:36] 1: Failed to read register for chip 5 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:36] 1: Failed to read register for chip 6 -> disabling Notice!!! Error temperature 0 crc:c9e5,0 [2017-12-05 04:41:36] 1: Failed to read register for chip 7 -> disabling Notice!!! Error temperature 0 crc:c6ea,0 [2017-12-05 04:41:36] 1: Failed to read register for chip 8 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:36] 1: Failed to read register for chip 9 -> disabling Notice!!! Error temperature 0 crc:b87b,0 [2017-12-05 04:41:36] 1: Failed to read register for chip 10 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:36] 1: Failed to read register for chip 11 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:36] 1: Failed to read register for chip 12 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:36] 1: Failed to read register for chip 13 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:36] 1: Failed to read register for chip 14 -> disabling Notice!!! Error temperature 0 crc:a612,0 [2017-12-05 04:41:36] 1: Failed to read register for chip 15 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:36] 1: Failed to read register for chip 16 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:36] 1: Failed to read register for chip 17 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:36] 1: Failed to read register for chip 18 -> disabling Notice!!! Error temperature 0 crc:a612,0 [2017-12-05 04:41:36] 1: Failed to read register for chip 19 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:36] 1: Failed to read register for chip 20 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:36] 1: Failed to read register for chip 21 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:36] 1: Failed to read register for chip 22 -> disabling Notice!!! Error temperature 0 crc:a612,0 [2017-12-05 04:41:36] 1: Failed to read register for chip 23 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:36] 1: Failed to read register for chip 24 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:36] 1: Failed to read register for chip 25 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:36] 1: Failed to read register for chip 26 -> disabling Notice!!! Error temperature 0 crc:a612,0 [2017-12-05 04:41:36] 1: Failed to read register for chip 27 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:36] 1: Failed to read register for chip 28 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:36] 1: Failed to read register for chip 29 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:36] 1: Failed to read register for chip 30 -> disabling Notice!!! Error temperature 0 crc:a612,0 [2017-12-05 04:41:36] 1: Failed to read register for chip 31 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:36] 1: Failed to read register for chip 32 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:36] 1: Failed to read register for chip 33 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:36] [chain_ID:1]: Found 33 Chips With Total 0 Active Cores [2017-12-05 04:41:36] [chain_ID]: Temp:0
[2017-12-05 04:41:36] reload init a1 chain1 fail [2017-12-05 04:41:36] 2: A1 init chain reload [2017-12-05 04:41:36] [reload]2: detected 33 chips send command [bist_collect] [2017-12-05 04:41:36] collect core success [2017-12-05 04:41:36] 2: A1 chip-chain detected [2017-12-05 04:41:36] spidev2.0: 2: Found 33 A1 chips [2017-12-05 04:41:36] cmd write reg: poll fail ! [2017-12-05 04:41:36] cmd write reg: poll fail ! [2017-12-05 04:41:36] cmd write reg: poll fail ! [2017-12-05 04:41:36] cmd write reg: poll fail ! [2017-12-05 04:41:36] cmd write reg: poll fail ! crc:a014,0 [2017-12-05 04:41:36] 2: Failed to read register for chip 1 -> disabling [2017-12-05 04:41:36] 2: Failed to read register for chip 2 -> disabling crc:a612,0 [2017-12-05 04:41:36] 2: Failed to read register for chip 3 -> disabling crc:6712,0 [2017-12-05 04:41:36] 2: Failed to read register for chip 4 -> disabling crc:a014,0 [2017-12-05 04:41:36] 2: Failed to read register for chip 5 -> disabling [2017-12-05 04:41:36] 2: Failed to read register for chip 6 -> disabling crc:6b1e,0 [2017-12-05 04:41:36] 2: Failed to read register for chip 7 -> disabling crc:e16b,0 [2017-12-05 04:41:36] 2: Failed to read register for chip 8 -> disabling crc:6712,0 [2017-12-05 04:41:36] 2: Failed to read register for chip 9 -> disabling crc:a014,0 [2017-12-05 04:41:36] 2: Failed to read register for chip 10 -> disabling crc:6712,0 [2017-12-05 04:41:36] 2: Failed to read register for chip 11 -> disabling [2017-12-05 04:41:36] 2: Failed to read register for chip 12 -> disabling crc:a612,0 [2017-12-05 04:41:36] 2: Failed to read register for chip 13 -> disabling crc:a014,0 [2017-12-05 04:41:36] 2: Failed to read register for chip 14 -> disabling [2017-12-05 04:41:36] 2: Failed to read register for chip 15 -> disabling crc:7c09,0 [2017-12-05 04:41:36] 2: Failed to read register for chip 16 -> disabling crc:a612,0 [2017-12-05 04:41:36] 2: Failed to read register for chip 17 -> disabling crc:2031,bc82 [2017-12-05 04:41:36] 2: Failed to read register for chip 18 -> disabling [2017-12-05 04:41:36] 2: Failed to read register for chip 19 -> disabling crc:a612,0 [2017-12-05 04:41:36] 2: Failed to read register for chip 20 -> disabling crc:a014,0 [2017-12-05 04:41:36] 2: Failed to read register for chip 21 -> disabling [2017-12-05 04:41:36] 2: Failed to read register for chip 22 -> disabling crc:a612,0 [2017-12-05 04:41:36] 2: Failed to read register for chip 23 -> disabling [2017-12-05 04:41:36] 2: Failed to read register for chip 27 -> disabling [2017-12-05 04:41:36] 2: Failed to read register for chip 28 -> disabling crc:856f,0 [2017-12-05 04:41:36] 2: Failed to read register for chip 29 -> disabling crc:8f2c,0 [2017-12-05 04:41:36] 2: Failed to read register for chip 30 -> disabling crc:aca3,0 [2017-12-05 04:41:36] 2: Failed to read register for chip 31 -> disabling [2017-12-05 04:41:36] cmd write reg: poll fail ! [2017-12-05 04:41:36] cmd write reg: poll fail ! [2017-12-05 04:41:36] cmd write reg: poll fail ! crc:1488,0 [2017-12-05 04:41:36] 2: Failed to read register for chip 1 -> disabling Notice!!! Error temperature 0 crc:a032,2321 [2017-12-05 04:41:36] 2: Failed to read register for chip 2 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:36] 2: broken chip 3 with 0 active cores (threshold = 1) [2017-12-05 04:41:36] new.PLL: 8 bytes:00 00 00 00 00 00 00 00 [2017-12-05 04:41:36] 2: broken chip 4 with 0 active cores (threshold = 1) [2017-12-05 04:41:36] new.PLL: 8 bytes:00 00 00 00 00 00 00 00 [2017-12-05 04:41:36] 2: Failed to read register for chip 5 -> disabling Notice!!! Error temperature 0 crc:a942,0 [2017-12-05 04:41:36] 2: Failed to read register for chip 6 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:36] 2: Failed to read register for chip 7 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:36] 2: broken chip 8 with 0 active cores (threshold = 1) [2017-12-05 04:41:36] new.PLL: 8 bytes:00 00 00 00 00 00 00 00 crc:984a,0 [2017-12-05 04:41:36] 2: Failed to read register for chip 9 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:36] 2: broken chip 10 with 0 active cores (threshold = 1) [2017-12-05 04:41:36] new.PLL: 8 bytes:00 00 00 00 00 00 00 00 [2017-12-05 04:41:36] 2: broken chip 11 with 0 active cores (threshold = 1) [2017-12-05 04:41:36] new.PLL: 8 bytes:00 00 00 00 00 00 00 00 [2017-12-05 04:41:36] 2: broken chip 12 with 0 active cores (threshold = 1) [2017-12-05 04:41:36] new.PLL: 8 bytes:00 00 00 00 00 00 00 00 [2017-12-05 04:41:36] 2: Failed to read register for chip 13 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:36] 2: Failed to read register for chip 14 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:36] 2: broken chip 15 with 0 active cores (threshold = 1) [2017-12-05 04:41:36] new.PLL: 8 bytes:00 00 00 00 00 00 00 00 crc:1b43,0 [2017-12-05 04:41:36] 2: Failed to read register for chip 16 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:36] 2: broken chip 17 with 0 active cores (threshold = 1) [2017-12-05 04:41:36] new.PLL: 8 bytes:00 00 00 00 00 00 00 00 [2017-12-05 04:41:36] 2: broken chip 18 with 0 active cores (threshold = 1) [2017-12-05 04:41:36] new.PLL: 8 bytes:00 00 00 00 00 00 00 00 crc:b922,0 [2017-12-05 04:41:36] 2: Failed to read register for chip 19 -> disabling Notice!!! Error temperature 0 crc:3f0b,0 [2017-12-05 04:41:36] 2: Failed to read register for chip 20 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:36] 2: Failed to read register for chip 21 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:37] 2: Failed to read register for chip 22 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:37] 2: broken chip 23 with 0 active cores (threshold = 1) [2017-12-05 04:41:37] new.PLL: 8 bytes:00 00 00 00 00 00 00 00 [2017-12-05 04:41:37] 2: Failed to read register for chip 24 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:37] 2: broken chip 25 with 0 active cores (threshold = 1) [2017-12-05 04:41:37] new.PLL: 8 bytes:00 00 00 00 00 00 00 00 crc:259c,0 [2017-12-05 04:41:37] 2: Failed to read register for chip 26 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:37] 2: broken chip 27 with 0 active cores (threshold = 1) [2017-12-05 04:41:37] new.PLL: 8 bytes:00 00 00 00 00 00 00 00 crc:fb47,0 [2017-12-05 04:41:37] 2: Failed to read register for chip 28 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:37] 2: broken chip 29 with 0 active cores (threshold = 1) [2017-12-05 04:41:37] new.PLL: 8 bytes:00 00 00 00 00 00 00 00 [2017-12-05 04:41:37] 2: broken chip 30 with 0 active cores (threshold = 1) [2017-12-05 04:41:37] new.PLL: 8 bytes:00 00 00 00 00 00 00 00 crc:5087,0 [2017-12-05 04:41:37] 2: Failed to read register for chip 31 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:37] 2: broken chip 32 with 0 active cores (threshold = 1) [2017-12-05 04:41:37] new.PLL: 8 bytes:00 00 00 00 00 00 00 00 crc:147b,0 [2017-12-05 04:41:37] 2: Failed to read register for chip 33 -> disabling Notice!!! Error temperature 0 [2017-12-05 04:41:37] [chain_ID:2]: Found 33 Chips With Total 0 Active Cores [2017-12-05 04:41:37] [chain_ID]: Temp:0
[2017-12-05 04:41:37] reload init a1 chain2 fail [2017-12-05 04:41:37] reload init a1 chain3 fail [2017-12-05 04:41:37] reload init a1 chain4 fail [2017-12-05 04:41:37] reload init a1 chain5 fail [2017-12-05 04:41:37] All devices disabled, cannot mine!
do anyone else has troubles like me or i'm the only one so unlucky!?!? any advice before innosilicon weekly support or holy water? =)
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funbuxx (OP)
Newbie
Offline
Activity: 33
Merit: 0
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December 11, 2017, 09:49:24 AM |
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Sorry to hear you guys having same problems as me (red light goes out).
I've got 2 A5s and one of them is rock solid and the other mines on 2 out of 3 boards (red light goes out on the leftmost board).
I'm not convinced about their firmware fixing things and for some it seems to make it worse.
No response to my emails apart from "update firmware". Am probably going to have to try and open mine up and see if I can find anything wrong with the fault board (cabling etc.) and possibly try adding some heatsinks since I think their "wind tunnel" cooling solution is pretty ghetto!
Also, thanks to whoever donated me some BTC for finding the root password.
Cheers,
FB
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patrike
Legendary
Offline
Activity: 3318
Merit: 1084
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December 11, 2017, 08:45:51 PM |
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thanks!
also do you know how to turn on api access to can control from awesome miner
+1 Hi, As the author of Awesome Miner, I'm actually having the same question. I've received some questions about how to enable the API of the miner and if it's running Cgminer or something compatible. If anyone knows, please let me know as well. Many thanks!
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Awesome Miner - Complete solution to manage and monitor mining operations of ASIC, GPU and CPU miners Optimized Antminer firmware - Increased hashrate, improved power efficiency and more features. For S9, S9i, S9j, T9+, L3+, S17, S17 Pro, S17+, T17, T17+, S19, S19 Pro, S19j, S19j Pro, T19 Up to 200,000 miners | Notifications | Native overclocking | Profit switching | Customizable rules | API | Windows application | Mobile web
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diaahussein
Jr. Member
Offline
Activity: 35
Merit: 3
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December 23, 2017, 04:36:10 PM |
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To find this password I had to disassemble the firmware, find the encrypted password, and then crack it. The whole thing took me 2 days but this method works and will give you back control of your very expensive miner!
Innosilicon have changed the password in the 22nd Dec firmware release will you be willing to share how did you disassemble the firmware so we can get the new root password or share with us the new Encrypted Password file and we would try to crack it, or do the ultimate and share the new root password
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funbuxx (OP)
Newbie
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Activity: 33
Merit: 0
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December 23, 2017, 09:04:11 PM |
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Hi, I will download the 22 Dec firmware and try to crack it. It's possible they have made it harder because the only reason they would change the password is if they didn't want people getting root access. FB My LTC address for donations is LgWgzgw9dC5UfiEhLfuT75h37wzzkaYXZo Thanks!
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diaahussein
Jr. Member
Offline
Activity: 35
Merit: 3
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December 23, 2017, 10:43:47 PM |
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thanks!
also do you know how to turn on api access to can control from awesome miner
+1 Hi, As the author of Awesome Miner, I'm actually having the same question. I've received some questions about how to enable the API of the miner and if it's running Cgminer or something compatible. If anyone knows, please let me know as well. Many thanks! to enable the API Mode just follow the following post https://bitcointalk.org/index.php?topic=2549898.0under the advanced Config section
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funbuxx (OP)
Newbie
Offline
Activity: 33
Merit: 0
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December 24, 2017, 10:14:03 PM |
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Root password for 22 Dec firmware is t1t2t3a5 Merry Christmas all My LTC address for donations is LgWgzgw9dC5UfiEhLfuT75h37wzzkaYXZo Thanks!
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diaahussein
Jr. Member
Offline
Activity: 35
Merit: 3
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December 24, 2017, 10:32:18 PM |
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Root password for 22 Dec firmware is t1t2t3a5 Merry Christmas all My LTC address for donations is LgWgzgw9dC5UfiEhLfuT75h37wzzkaYXZo Thanks! Great work, Funbuxx thanks for all the hardwork
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BestSumo
Newbie
Offline
Activity: 21
Merit: 0
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January 12, 2018, 11:12:17 PM |
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Root password for 22 Dec firmware is t1t2t3a5 Merry Christmas all My LTC address for donations is LgWgzgw9dC5UfiEhLfuT75h37wzzkaYXZo Thanks! Thanks for the help funbuxx. Can you PM me the script/cracker you use to brute force the password? I have an old armory wallet I want to brute force. I remember the characters I used but not the order. I'll send some LTC/BTC if it works.
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m0nkOne
Newbie
Offline
Activity: 18
Merit: 0
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March 15, 2018, 12:31:19 PM |
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Hi, thanks for the great work funbuxx! I have one A5 and was able to get the nov 22 firmware running, but the Password innot1t2 seems not to be working Does anyone have the dec 22 firmware? Could someone pls upload it, I couldn't find it anywhere... Thanks in advance!!!
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induktor
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April 12, 2018, 07:38:33 PM |
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Hello Someone bring me this machine to check it, and the controller is not responding i can PING to the default address and i get a response but when i telnet to the unit port 8100 i get connection refused also connection refused when i try to access the webpage
i programmed a router in the same subnet to test it.
the chains have a steady red light on. the unit is using 160W at the wall, and the fans are at near full speed (PWM)
at the board there is only 1 green led on. i se link and activity on the eth port but green and red light are off. any ideas what could be wrong? what can i test?
thank you! indkt.
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BTC addr: 1vTGnFgaM2WJjswwmbj6N2AQBWcHfimSc
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